MC10ELT20DG [ONSEMI]
5VTTL to Differential PECL Translator; 5V ? TTL至差分PECL转换器型号: | MC10ELT20DG |
厂家: | ONSEMI |
描述: | 5VTTL to Differential PECL Translator |
文件: | 总8页 (文件大小:130K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
MC10ELT20, MC100ELT20
5VꢀTTL to Differential PECL
Translator
Description
The MC10ELT/100ELT20 is a TTL to differential PECL translator.
Because PECL (Positive ECL) levels are used, only +5 V and ground
are required. The small outline 8-lead package and the single gate of
the ELT20 makes it ideal for those applications where space,
performance, and low power are at a premium.
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MARKING DIAGRAMS*
The 100 Series contains temperature compensation.
8
8
8
HLT20
ALYW
G
KLT20
ALYW
G
Features
1
• 1.2 ns Typical Propagation Delay
• PNP TTL Inputs for Minimal Loading
• Flow Through Pinouts
SO−8
1
1
D SUFFIX
CASE 751
• Operating Range: V = 4.75 V to 5.25 V with GND = 0 V
CC
• Pb−Free Packages are Available
8
8
1
8
1
HT20
KT20
ALYWG
ALYWG
TSSOP−8
DT SUFFIX
CASE 948R
G
G
1
1
4
1
4
DFN8
MN SUFFIX
CASE 506AA
A
L
Y
W
M
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Date Code
= Pb−Free Package
H
K
5B
2P
= MC10
= MC100
= MC10
= MC100
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
©
Semiconductor Components Industries, LLC, 2006
1
Publication Order Number:
December, 2006 − Rev. 5
MC10ELT20/D
MC10ELT20, MC100ELT20
Table 1. PIN DESCRIPTION
1
NC
8
7
6
V
CC
Pin
Q, Q
Function
PECL Differential Outputs*
TTL
2
3
D
Q
Q
D
TTL Input
PECL
V
Positive Supply
Ground
CC
NC
GND
NC
No Connect
NC
4
GND
5
EP
Exposed pad must be connected to a sufficient
thermal conduit. Electrically connect to the most
negative supply or leave floating open.
Figure 1. 8−Lead Pinout (Top View)
and Logic Diagram
*Output state undetermined when inputs are open.
Table 2. ATTRIBUTES
Characteristics
Value
N/A
Internal Input Pulldown Resistor
Internal Input Pullup Resistor
ESD Protection
N/A
Human Body Model
Machine Model
> 4 kV
> 200 V
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1)
Pb Pkg
Pb−Free Pkg
SO−8
Level 1
Level 1
Level 1
Level 1
Level 3
Level 1
TSSOP−8
DFN8
Flammability Rating
Transistor Count
Oxygen Index: 28 to 34
UL 94 V−0 @ 0.125 in
51 Devices
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
1. For additional information, see Application Note AND8003/D.
Table 3. MAXIMUM RATINGS
Symbol
Parameter
Positive Power Supply
Condition 1
GND = 0 V
Condition 2
Rating
Unit
V
V
V
7
7
CC
IN
Input Voltage
GND = 0 V
V ꢀ V
V
I
CC
I
Output Current
Continuous
Surge
50
100
mA
mA
out
T
Operating Temperature Range
−40 to +85
°C
°C
A
T
Storage Temperature Range
−65 to +150
stg
JA
q
Thermal Resistance (Junction−to−Ambient)
0 lfpm
500 lfpm
SO−8
SO−8
190
130
°C/W
°C/W
q
q
Thermal Resistance (Junction−to−Case)
Thermal Resistance (Junction−to−Ambient)
Standard Board
SO−8
41 to 44
°C/W
JC
JA
0 lfpm
500 lfpm
TSSOP−8
TSSOP−8
185
140
°C/W
°C/W
q
q
Thermal Resistance (Junction−to−Case)
Thermal Resistance (Junction−to−Ambient)
Standard Board
TSSOP−8
41 to 44
°C/W
JC
JA
0 lfpm
500 lfpm
DFN8
DFN8
129
84
°C/W
°C/W
T
sol
Wave Solder
Pb < 3 s @ 248°C
Pb−Free < 3 s @ 260°C
265
265
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
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2
MC10ELT20, MC100ELT20
Table 4. 10ELT SERIES PECL DC CHARACTERISTICS V = 5.0 V; GND = 0.0 V (Note 2)
CC
−40°C
25°C
85°C
Min
Typ
Max
16
Min
Typ
Max
16
Min
Typ
Max
16
Symbol
Characteristic
Power Supply Current
Unit
mA
mV
mV
I
CC
V
V
Output HIGH Voltage (Note 3)
Output LOW Voltage (Note 3)
3920
3050
4010
3200
4110
3350
4020
3050
4105
3210
4190
3370
4090
3050
4185
3227
4280
3405
OH
OL
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
2. Output parameters vary 1:1 with V . V can vary ±0.25 V.
CC
CC
3. Outputs are terminated through a 50 W resistor to V − 2 V.
CC
Table 5. 100ELT SERIES PECL DC CHARACTERISTICS V = 5.0 V; GND = 0.0 V (Note 4)
CC
−40°C
25°C
85°C
Min
Typ
Max
16
Min
Typ
Max
16
Min
Typ
Max
16
Symbol
Characteristic
Power Supply Current
Unit
mA
mV
mV
mA
I
CC
V
V
Output HIGH Voltage (Note 5)
Output LOW Voltage (Note 5)
Input HIGH Current
3915
3170
3995
3305
4120
3445
150
3975
3190
4045
3295
4120
3380
150
3975
3190
4050
3295
4120
3380
150
OH
OL
I
I
IH
IL
Input LOW Current
0.5
0.5
0.5
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
4. Output parameters vary 1:1 with V . V can vary ±0.25 V.
CC
CC
5. Outputs are terminated through a 50 W resistor to V − 2 V.
CC
Table 6. TTL INPUT DC CHARACTERISTICS V = 4.7 V to 5.27 V; T = −40°C to 85°C
CC
A
Symbol
Characteristic
Input HIGH Current
Condition
= 2.7 V
Min
Typ
Max
20
Unit
mA
mA
mA
V
I
I
I
V
V
V
IH
IN
IN
IN
Input HIGH Current
Input LOW Current
Input Clamp Diode Voltage
Input HIGH Voltage
Input LOW Voltage
= 7.0 V
= 0.5 V
100
−0.6
−1.2
IHH
IL
V
V
V
I
= −18 mA
IN
IK
IH
IL
2.0
V
0.8
V
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
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3
MC10ELT20, MC100ELT20
Table 7. AC CHARACTERISTICS V = 4.75 V to 5.25 V; GND = 0.0 V
CC
−40°C
25°C
85°C
Min
100
0.6
Typ
Max
Min
100
0.6
Typ
Max
Min
100
0.6
Typ
Max
Symbol
Characteristic
Unit
MHz
ns
f
t
Maximum Toggle Frequency
max
PLH
Propagation Delay
1.5 V to 50%
0.82
TBD
1.2
1.0
0.82
0.8
1.25
1.1
0.83
TBD
1.35
1.30
t
Propagation Delay
1.5 V to 50%
0.4
0.5
0.7
ns
PHL
t
Cycle−to−Cycle Jitter
TBD
ps
ns
JITTER
t /t
r
Output Rise/Fall Time
0.15
1.5
0.15
1.5
0.15
1.5
f
(20−80%)
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
Z = 50 W
Q
Q
D
D
o
Receiver
Device
Driver
Device
Z = 50 W
o
50 W
50 W
V
TT
V
= V − 2.0 V
TT
CC
Figure 2. Typical Termination for Output Driver and Device Evaluation
(See Application Note AND8020/D − Termination of ECL Logic Devices.)
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4
MC10ELT20, MC100ELT20
ORDERING INFORMATION
Device
†
Package
Shipping
MC10ELT20D
SO−8
98 Units / Rail
98 Units / Rail
MC10ELT20DG
SO−8
(Pb−Free)
MC10ELT20DR2
SO−8
2500 / Tape & Reel
2500 / Tape & Reel
MC10ELT20DR2G
SO−8
(Pb−Free)
MC10ELT20DT
TSSOP−8
100 Units / Rail
100 Units / Rail
MC10ELT20DTG
TSSOP−8
(Pb−Free)
MC10ELT20DTR2
MC10ELT20DTR2G
TSSOP−8
2500 / Tape & Reel
2500 / Tape & Reel
TSSOP−8
(Pb−Free)
MC10ELT20MNR4
MC10ELT20MNR4G
DFN8
1000 / Tape & Reel
1000 / Tape & Reel
DFN8
(Pb−Free)
MC100ELT20D
SO−8
98 Units / Rail
98 Units / Rail
MC100ELT20DG
SO−8
(Pb−Free)
MC100ELT20DR2
MC100ELT20DR2G
SO−8
2500 / Tape & Reel
2500 / Tape & Reel
SO−8
(Pb−Free)
MC100ELT20DT
TSSOP−8
100 Units / Rail
100 Units / Rail
MC100ELT20DTG
TSSOP−8
(Pb−Free)
MC100ELT20DTR2
MC100ELT20DTR2G
TSSOP−8
2500 / Tape & Reel
2500 / Tape & Reel
TSSOP−8
(Pb−Free)
MC100ELT20MNR4
MC100ELT20MNR4G
DFN8
1000 / Tape & Reel
1000 / Tape & Reel
DFN8
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
Resource Reference of Application Notes
AN1405/D
AN1406/D
AN1503/D
AN1504/D
AN1568/D
AN1672/D
AND8001/D
AND8002/D
AND8020/D
AND8066/D
AND8090/D
−
−
−
−
−
−
−
−
−
−
−
ECL Clock Distribution Techniques
Designing with PECL (ECL at +5.0 V)
ECLinPSt I/O SPiCE Modeling Kit
Metastability and the ECLinPS Family
Interfacing Between LVDS and ECL
The ECL Translator Guide
Odd Number Counters Design
Marking and Date Codes
Termination of ECL Logic Devices
Interfacing with ECLinPS
AC Characteristics of ECL Devices
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5
MC10ELT20, MC100ELT20
PACKAGE DIMENSIONS
SOIC−8 NB
CASE 751−07
ISSUE AH
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE
MOLD PROTRUSION.
−X−
A
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
8
5
4
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. 751−01 THRU 751−06 ARE OBSOLETE. NEW
STANDARD IS 751−07.
S
M
M
B
0.25 (0.010)
Y
1
K
−Y−
G
MILLIMETERS
DIM MIN MAX
INCHES
MIN
MAX
0.197
0.157
0.069
0.020
A
B
C
D
G
H
J
K
M
N
S
4.80
3.80
1.35
0.33
5.00 0.189
4.00 0.150
1.75 0.053
0.51 0.013
C
N X 45
_
SEATING
PLANE
−Z−
1.27 BSC
0.050 BSC
0.10 (0.004)
0.10
0.19
0.40
0
0.25 0.004
0.25 0.007
1.27 0.016
0.010
0.010
0.050
8
0.020
0.244
M
J
H
D
8
0
_
_
_
_
0.25
5.80
0.50 0.010
6.20 0.228
M
S
S
X
0.25 (0.010)
Z
Y
SOLDERING FOOTPRINT*
1.52
0.060
7.0
4.0
0.275
0.155
0.6
0.024
1.270
0.050
mm
inches
ǒ
Ǔ
SCALE 6:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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6
MC10ELT20, MC100ELT20
PACKAGE DIMENSIONS
TSSOP−8
DT SUFFIX
PLASTIC TSSOP PACKAGE
CASE 948R−02
ISSUE A
8x K REF
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
M
S
S
V
0.10 (0.004)
T U
S
0.15 (0.006) T U
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD FLASH.
PROTRUSIONS OR GATE BURRS. MOLD FLASH
OR GATE BURRS SHALL NOT EXCEED 0.15
(0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE INTERLEAD
FLASH OR PROTRUSION. INTERLEAD FLASH OR
PROTRUSION SHALL NOT EXCEED 0.25 (0.010)
PER SIDE.
2X L/2
8
5
4
0.25 (0.010)
B
−U−
L
1
M
PIN 1
IDENT
5. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
6. DIMENSION A AND B ARE TO BE DETERMINED
AT DATUM PLANE −W−.
S
0.15 (0.006) T U
A
−V−
F
DETAIL E
MILLIMETERS
INCHES
MIN
DIM MIN
MAX
3.10
3.10
MAX
0.122
0.122
0.043
0.006
0.028
A
B
C
D
F
2.90
2.90
0.80
0.05
0.40
0.114
0.114
C
1.10 0.031
0.15 0.002
0.70 0.016
0.10 (0.004)
−W−
SEATING
D
−T−
G
G
K
L
0.65 BSC
0.026 BSC
PLANE
0.25
0.40 0.010
0.016
4.90 BSC
0.193 BSC
0
DETAIL E
M
0
6
6
_
_
_
_
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7
MC10ELT20, MC100ELT20
PACKAGE DIMENSIONS
DFN8
CASE 506AA−01
ISSUE D
NOTES:
D
A
B
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994 .
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.25 AND 0.30 MM FROM TERMINAL.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
PIN ONE
REFERENCE
MILLIMETERS
DIM MIN
MAX
1.00
0.05
E
A
A1
A3
b
0.80
0.00
0.20 REF
0.20
0.30
2 X
D
D2
E
E2
e
K
2.00 BSC
0.10
C
1.10
1.30
2.00 BSC
2 X
0.70
0.90
0.50 BSC
0.10
C
TOP VIEW
0.20
0.25
−−−
0.35
L
A
0.10
0.08
C
C
8 X
(A3)
SIDE VIEW
D2
A1
SEATING
PLANE
C
e
e/2
4
1
8 X L
E2
K
8
5
0.10 C A B
8 X b
0.05
C
NOTE 3
BOTTOM VIEW
ECLinPS is a trademark of Semiconductor Components Industries, LLC (SCILLC).
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
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MC10ELT20/D
相关型号:
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