MC10EP17DTR2 [ONSEMI]

3.3V / 5VECL Quad Differential Driver/Receiver; 3.3V / 5V ? ECL四路差分驱动器/接收器
MC10EP17DTR2
型号: MC10EP17DTR2
厂家: ONSEMI    ONSEMI
描述:

3.3V / 5VECL Quad Differential Driver/Receiver
3.3V / 5V ? ECL四路差分驱动器/接收器

线路驱动器或接收器 驱动程序和接口 接口集成电路 光电二极管
文件: 总8页 (文件大小:87K)
中文:  中文翻译
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MC10EP17, MC100EP17  
3.3V / 5VĄECL Quad  
Differential Driver/Receiver  
The MC10/100EP17 is a 4-bit differential line receiver based on the  
EP16 device. The >3.0 GHz maximum frequency provided by the high  
frequency outputs makes the device ideal for buffering of very high  
speed oscillators.  
http://onsemi.com  
MARKING  
The V pin, an internally generated voltage supply, is available to  
BB  
this device only. For single-ended input conditions, the unused  
DIAGRAMS*  
differential input is connected to V as a switching reference voltage.  
BB  
V
BB  
may also rebias AC coupled inputs. When used, decouple V  
BB  
20  
and V via a 0.01 mF capacitor and limit current sourcing or sinking  
CC  
20  
to 0.5 mA. When not used, V should be left open.  
BB  
XXXX  
EP17  
ALYW  
1
The design incorporates two stages of gain, internal to the device,  
making it an excellent choice for use in high bandwidth amplifier  
applications.  
TSSOP–20  
DT SUFFIX  
CASE 948E  
1
Inputs of unused gates can be left open and will not affect the  
operation of the rest of the device. All V and V pins must be  
externally connected to power supply to guarantee proper operation.  
The 100 Series contains temperature compensation.  
CC  
EE  
20  
20  
MCXXXEP17  
AWLYYWW  
220 ps Typical Propagation Delay  
1
Maximum Frequency >3.0 GHz Typical  
SO–20  
DW SUFFIX  
CASE 751D  
1
PECL Mode Operating Range: V = 3.0 V to 5.5 V  
CC  
with V = 0 V  
EE  
NECL Mode Operating Range: V = 0 V  
XXXX = MC10 or 100  
CC  
XXX  
A
L,  
WL  
Y, YY  
= 10 or 100  
with V = –3.0 V to –5.5 V  
EE  
= Assembly Location  
= Assembly Lot  
= Wafer Lot  
Open Input Default State  
Safety Clamp on Inputs  
Q Output Will Default LOW with Inputs Open or at V  
= Year  
EE  
W, WW = Work Week  
V Output  
BB  
*For additional information, see Application Note  
AND8002/D  
ORDERING INFORMATION  
Device  
Package  
Shipping  
MC10EP17DT  
TSSOP–20  
75 Units/Rail  
MC10EP17DTR2 TSSOP–20 2500 Tape & Reel  
MC100EP17DT TSSOP–20 75 Units/Rail  
MC100EP17DTR2 TSSOP–20 2500 Tape & Reel  
MC10EP17DW  
SO–20  
38 Units/Rail  
MC10EP17DWR2  
MC100EP17DW  
SO–20  
SO–20  
1000 Tape & Reel  
38 Units/Rail  
MC100EP17DWR2  
SO–20  
1000 Tape & Reel  
Semiconductor Components Industries, LLC, 2002  
1
Publication Order Number:  
September, 2002 – Rev. 4  
MC10EP17/D  
MC10EP17, MC100EP17  
V
CC  
Q0  
Q0  
Q1  
Q1  
Q2  
Q2  
Q3  
Q3  
V
EE  
PIN DESCRIPTION  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
PIN  
FUNCTION  
D[0:3]*, D[0:3]*  
Q[0:3], Q[0:3]  
ECL Differential Data Inputs  
ECL Differential Data Outputs  
Reference Voltage Output  
Positive Supply  
V
BB  
V
V
CC  
Negative Supply  
EE  
*
Pins will default LOW when left open.  
1
2
3
4
5
6
7
8
9
10  
V
CC  
D0  
D0  
D1  
D1  
D2  
D2  
D3  
D3  
V
BB  
Figure 1. 20–Lead Pinout (Top View) and Logic Diagram  
ATTRIBUTES  
Characteristics  
Value  
75 kW  
N/A  
Internal Input Pulldown Resistor  
Internal Input Pullup Resistor  
ESD Protection  
Human Body Model  
Machine Model  
Charged Device Model  
> 2 kV  
> 100 V  
> 2 kV  
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1)  
Level 1  
Flammability Rating  
Transistor Count  
Oxygen Index: 28 to 34  
UL94 V–0 @ 0.125 in  
259 Devices  
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test  
1. For additional information, see Application Note AND8003/D.  
MAXIMUM RATINGS (Note 2)  
Symbol Parameter  
Condition 1  
= 0 V  
Condition 2  
Rating  
Units  
V
CC  
V
EE  
V
I
PECL Mode Power Supply  
NECL Mode Power Supply  
V
V
6
V
V
EE  
= 0 V  
–6  
CC  
PECL Mode Input Voltage  
NECL Mode Input Voltage  
V
V
= 0 V  
= 0 V  
V V  
6
V
V
EE  
I
CC  
V V  
–6  
CC  
I
EE  
I
Output Current  
Continuous  
Surge  
50  
mA  
mA  
out  
100  
I
V
Sink/Source  
± 0.5  
mA  
°C  
BB  
BB  
TA  
Operating Temperature Range  
Storage Temperature Range  
–40 to +85  
–65 to +150  
T
°C  
stg  
q
Thermal Resistance (Junction–to–Ambient) 0 LFPM  
500 LFPM  
20 TSSOP  
20 TSSOP  
140  
100  
°C/W  
°C/W  
JA  
q
q
Thermal Resistance (Junction–to–Case)  
std bd  
20 TSSOP  
23 to 41  
°C/W  
JC  
JA  
Thermal Resistance (Junction–to–Ambient) 0 LFPM  
500 LFPM  
20 SOIC  
20 SOIC  
90  
60  
°C/W  
°C/W  
q
Thermal Resistance (Junction–to–Case)  
Wave Solder  
std bd  
20 SOIC  
30 to 35  
265  
°C/W  
°C  
JC  
T
sol  
<2 to 3 sec @ 248°C  
2. Maximum Ratings are those values beyond which device damage may occur.  
http://onsemi.com  
2
MC10EP17, MC100EP17  
10EP DC CHARACTERISTICS, PECL V = 3.3 V, V = 0 V (Note 3)  
CC  
EE  
–40°C  
Typ  
50  
25°C  
Typ  
52  
85°C  
Typ  
54  
Min  
Max  
65  
Min  
44  
Max  
66  
Min  
46  
Max  
68  
Symbol  
Characteristic  
Power Supply Current  
Unit  
mA  
mV  
mV  
mV  
mV  
mV  
V
I
EE  
42  
V
V
V
V
V
V
Output HIGH Voltage (Note 4)  
Output LOW Voltage (Note 4)  
2165  
1365  
2090  
365  
2290  
1490  
2415  
1615  
2415  
1690  
1990  
3.3  
2230  
1430  
2155  
1430  
1855  
2.0  
2355  
1555  
2480  
1680  
2480  
1755  
2055  
3.3  
2290  
1490  
2215  
1490  
1915  
2.0  
2415  
1615  
2540  
1740  
2540  
1815  
2115  
3.3  
OH  
OL  
Input HIGH Voltage (Single–Ended)  
Input LOW Voltage (Single–Ended)  
Output Voltage Reference  
IH  
IL  
1790  
2.0  
1890  
1955  
2015  
BB  
Input HIGH Voltage Common Mode  
Range (Differential) (Note 5)  
IHCMR  
I
I
Input HIGH Current  
Input LOW Current  
150  
150  
150  
mA  
mA  
IH  
0.5  
0.5  
0.5  
IL  
NOTE: EP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The  
circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500 lfpm is maintained.  
3. Input and output parameters vary 1:1 with V . V can vary +0.3 V to –2.2 V.  
CC  
EE  
4. All loading with 50 W to V –2.0 volts.  
CC  
5. V  
min varies 1:1 with V , V  
max varies 1:1 with V . The V  
range is referenced to the most positive side of the differential  
IHCMR  
EE IHCMR  
CC  
IHCMR  
input signal.  
10EP DC CHARACTERISTICS, PECL V = 5.0 V, V = 0 V (Note 6)  
CC  
EE  
–40°C  
Typ  
50  
25°C  
Typ  
52  
85°C  
Typ  
54  
Min  
Max  
65  
Min  
44  
Max  
66  
Min  
46  
Max  
68  
Symbol  
Characteristic  
Power Supply Current  
Unit  
mA  
mV  
mV  
mV  
mV  
mV  
V
I
EE  
42  
V
V
V
V
V
V
Output HIGH Voltage (Note 7)  
Output LOW Voltage (Note 7)  
3865  
3065  
3790  
3065  
3490  
2.0  
3990  
3190  
4115  
3315  
4115  
3390  
3690  
5.0  
3930  
3130  
3855  
3130  
3555  
2.0  
4055  
3255  
4180  
3380  
4180  
3455  
3755  
5.0  
3990  
3190  
3915  
3190  
3615  
2.0  
4115  
3315  
4240  
3440  
4240  
3515  
3815  
5.0  
OH  
OL  
Input HIGH Voltage (Single–Ended)  
Input LOW Voltage (Single–Ended)  
Output Voltage Reference  
IH  
IL  
3590  
3655  
3715  
BB  
Input HIGH Voltage Common Mode  
Range (Differential) (Note 8)  
IHCMR  
I
I
Input HIGH Current  
Input LOW Current  
150  
150  
150  
mA  
mA  
IH  
0.5  
0.5  
0.5  
IL  
NOTE: EP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The  
circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500 lfpm is maintained.  
6. Input and output parameters vary 1:1 with V . V can vary +2.0 V to –0.5 V.  
CC  
EE  
7. All loading with 50 W to V –2.0 volts.  
CC  
8. V  
min varies 1:1 with V , V  
max varies 1:1 with V . The V  
range is referenced to the most positive side of the differential  
IHCMR  
EE IHCMR  
CC  
IHCMR  
input signal.  
10EP DC CHARACTERISTICS, NECL V = 0 V; V = –5.5 V to –3.0 V (Note 9)  
CC  
EE  
–40°C  
Typ  
50  
25°C  
Typ  
52  
85°C  
Typ  
54  
Min  
42  
Max  
Min  
Max  
Min  
Max  
68  
Symbol  
Characteristic  
Power Supply Current  
Unit  
mA  
mV  
mV  
mV  
mV  
mV  
V
I
EE  
65  
44  
66  
46  
V
V
V
V
V
V
Output HIGH Voltage (Note 10)  
Output LOW Voltage (Note 10)  
–1135 –1010 –885 –1070 –945  
–820 –1010 –885  
–760  
OH  
–1935 –1810 –1685 –1870 –1745 –1620 –1810 –1685 –1560  
OL  
Input HIGH Voltage (Single–Ended)  
Input LOW Voltage (Single–Ended)  
Output Voltage Reference  
–1210  
–1935  
–885 –1145  
–1610 –1870  
–820 –1085  
–1545 –1810  
–760  
IH  
–1485  
IL  
–1510 –1410 –1310 –1445 –1345 –1245 –1385 –1285 –1185  
BB  
Input HIGH Voltage Common Mode  
Range (Differential) (Note 11)  
V
EE  
+2.0  
0.0  
V
EE  
+2.0  
0.0  
V
EE  
+2.0  
0.0  
IHCMR  
I
I
Input HIGH Current  
Input LOW Current  
150  
150  
150  
mA  
mA  
IH  
0.5  
0.5  
0.5  
IL  
NOTE: EP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The  
circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500 lfpm is maintained.  
9. Input and output parameters vary 1:1 with V  
.
CC  
10.All loading with 50 W to V –2.0 volts.  
CC  
11. V  
min varies 1:1 with V , V  
max varies 1:1 with V . The V  
range is referenced to the most positive side of the differential  
IHCMR  
EE IHCMR  
CC  
IHCMR  
input signal.  
http://onsemi.com  
3
MC10EP17, MC100EP17  
100EP DC CHARACTERISTICS, PECL V = 3.3 V, V = 0 V (Note 12)  
CC  
EE  
–40°C  
Typ  
55  
25°C  
Typ  
58  
85°C  
Typ  
62  
Min  
Max  
63  
Min  
50  
Max  
66  
Min  
54  
Max  
70  
Symbol  
Characteristic  
Power Supply Current  
Unit  
mA  
mV  
mV  
mV  
mV  
mV  
V
I
EE  
47  
V
V
V
V
V
V
Output HIGH Voltage (Note 13)  
Output LOW Voltage (Note 13)  
2155  
1355  
2075  
1355  
1775  
2.0  
2280  
1480  
2405  
1605  
2420  
1675  
1975  
3.3  
2155  
1355  
2075  
1355  
1775  
2.0  
2280  
1480  
2405  
1605  
2420  
1675  
1975  
3.3  
2155  
1355  
2075  
1355  
1775  
2.0  
2280  
1480  
2405  
1605  
2420  
1675  
1975  
3.3  
OH  
OL  
Input HIGH Voltage (Single–Ended)  
Input LOW Voltage (Single–Ended)  
Output Voltage Reference  
IH  
IL  
1875  
1875  
1875  
BB  
Input HIGH Voltage Common Mode  
Range (Differential) (Note 14)  
IHCMR  
I
I
Input HIGH Current  
Input LOW Current  
150  
150  
150  
mA  
mA  
IH  
0.5  
0.5  
0.5  
IL  
NOTE: EP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The  
circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500 lfpm is maintained.  
12.Input and output parameters vary 1:1 with V . V can vary +0.3 V to –2.2 V.  
CC  
EE  
13.All loading with 50 W to V –2.0 volts.  
CC  
14.V  
min varies 1:1 with V , V  
max varies 1:1 with V . The V  
range is referenced to the most positive side of the differential  
IHCMR  
EE IHCMR  
CC  
IHCMR  
input signal.  
100EP DC CHARACTERISTICS, PECL V = 5.0 V, V = 0 V (Note 15)  
CC  
EE  
–40°C  
Typ  
55  
25°C  
Typ  
58  
85°C  
Typ  
62  
Min  
Max  
63  
Min  
50  
Max  
66  
Min  
54  
Max  
70  
Symbol  
Characteristic  
Power Supply Current  
Unit  
mA  
mV  
mV  
mV  
mV  
mV  
V
I
EE  
47  
V
V
V
V
V
V
Output HIGH Voltage (Note 16)  
Output LOW Voltage (Note 16)  
3855  
3055  
3775  
3055  
3475  
2.0  
3980  
3180  
4105  
3305  
4120  
3375  
3675  
5.0  
3855  
3055  
3775  
3055  
3475  
2.0  
3980  
3180  
4105  
3305  
4120  
3375  
3675  
5.0  
3855  
3055  
3775  
3055  
3475  
2.0  
3980  
3180  
4105  
3305  
4120  
3375  
3675  
5.0  
OH  
OL  
Input HIGH Voltage (Single–Ended)  
Input LOW Voltage (Single–Ended)  
Output Voltage Reference  
IH  
IL  
3575  
3575  
3575  
BB  
Input HIGH Voltage Common Mode  
Range (Differential) (Note 17)  
IHCMR  
I
I
Input HIGH Current  
Input LOW Current  
150  
150  
150  
mA  
mA  
IH  
0.5  
0.5  
0.5  
IL  
NOTE: EP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The  
circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500 lfpm is maintained.  
15.Input and output parameters vary 1:1 with V . V can vary +2.0 V to –0.5 V.  
CC  
EE  
16.All loading with 50 W to V –2.0 volts.  
CC  
17.V  
min varies 1:1 with V , V  
max varies 1:1 with V . The V  
range is referenced to the most positive side of the differential  
IHCMR  
EE IHCMR  
CC  
IHCMR  
input signal.  
100EP DC CHARACTERISTICS, NECL V = 0 V; V = –5.5 V to –3.0 V (Note 18)  
CC  
EE  
–40°C  
Typ  
55  
25°C  
Typ  
58  
85°C  
Typ  
62  
Min  
Max  
Min  
Max  
Min  
Max  
Symbol  
Characteristic  
Power Supply Current  
Unit  
mA  
mV  
mV  
mV  
mV  
mV  
V
I
EE  
47  
63  
50  
66  
54  
70  
V
V
V
V
V
V
Output HIGH Voltage (Note 19)  
Output LOW Voltage (Note 19)  
–1145 –1020 –895 –1145 –1020 –895 –1145 –1020 –895  
–1945 –1820 –1695 –1945 –1820 –1695 –1945 –1820 –1695  
OH  
OL  
Input HIGH Voltage (Single–Ended)  
Input LOW Voltage (Single–Ended)  
Output Voltage Reference  
–1225  
–1945  
–880 –1225  
–1625 –1945  
–880 –1225  
–1625 –1945  
–880  
IH  
–1625  
IL  
–1525 –1425 –1325 –1525 –1425 –1325 –1525 –1425 –1325  
BB  
Input HIGH Voltage Common Mode  
Range (Differential) (Note 20)  
V
EE  
+2.0  
0.0  
V
EE  
+2.0  
0.0  
V
EE  
+2.0  
0.0  
IHCMR  
I
I
Input HIGH Current  
Input LOW Current  
150  
150  
150  
mA  
mA  
IH  
0.5  
0.5  
0.5  
IL  
NOTE: EP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The  
circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500 lfpm is maintained.  
18.Input and output parameters vary 1:1 with V  
.
CC  
19.All loading with 50 W to V –2.0 volts.  
CC  
20.V  
min varies 1:1 with V , V  
max varies 1:1 with V . The V  
range is referenced to the most positive side of the differential  
IHCMR  
EE IHCMR  
CC  
IHCMR  
input signal.  
http://onsemi.com  
4
MC10EP17, MC100EP17  
AC CHARACTERISTICS V = 0 V; V = –3.0 V to –5.5 V or  
V
–40°C  
Typ  
= 3.0 V to 5.5 V; V = 0 V (Note 21)  
CC  
EE  
CC EE  
25°C  
85°C  
Typ  
> 3  
Min  
Max  
Min  
Typ  
Max  
Min  
Max  
Symbol  
Characteristic  
Unit  
f
Maximum Frequency  
(See Figure 2 F /JITTER)  
> 3  
> 3  
GHz  
max  
max  
t
t
,
Propagation Delay to Output Differential  
10 Series  
100 Series  
ps  
ps  
PLH  
PHL  
125  
150  
200  
220  
275  
300  
150  
180  
220  
250  
300  
320  
200  
200  
260  
290  
350  
360  
t
Cycle–to–Cycle Jitter  
(See Figure 2 F /JITTER)  
.2  
< 1  
.2  
< 1  
.2  
< 1  
JITTER  
max  
V
Input Voltage Swing (Differential)  
150  
100  
800  
160  
1200  
220  
150  
100  
800  
170  
1200  
230  
150  
120  
800  
190  
1200  
250  
mV  
ps  
PP  
t
r
t
f
Output Rise/Fall Times  
(20% – 80%)  
Q, Q  
21.Measured using a 750 mV source, 50% duty cycle clock source. All loading with 50 W to V –2.0 V.  
CC  
800  
700  
600  
500  
400  
300  
200  
8
7
6
5
4
3
2
1
100  
(JITTER)  
3000  
0
0
1000  
2000  
4000  
5000  
6000  
FREQUENCY (MHz)  
Figure 2. Fmax/Jitter  
http://onsemi.com  
5
MC10EP17, MC100EP17  
Q
D
D
Receiver  
Device  
Driver  
Device  
Q
50  
TT  
50  
W
W
V
TT  
V
V
=
– 2.0 V  
CC  
Figure 3. Typical Termination for Output Driver and Device Evaluation  
(See Application Note AND8020 – Termination of ECL Logic Devices.)  
Resource Reference of Application Notes  
AN1404  
AN1405  
AN1406  
AN1504  
AN1568  
AN1650  
AN1672  
AND8001  
AND8002  
AND8009  
AND8020  
ECLinPS Circuit Performance at Non–Standard V Levels  
IH  
ECL Clock Distribution Techniques  
Designing with PECL (ECL at +5.0 V)  
Metastability and the ECLinPS Family  
Interfacing Between LVDS and ECL  
Using Wire–OR Ties in ECLinPS Designs  
The ECL Translator Guide  
Odd Number Counters Design  
Marking and Date Codes  
ECLinPS Plus Spice I/O Model Kit  
Termination of ECL Logic Devices  
For an updated list of Application Notes, please see our website at http://onsemi.com.  
http://onsemi.com  
6
MC10EP17, MC100EP17  
PACKAGE DIMENSIONS  
TSSOP–20  
DT SUFFIX  
PLASTIC TSSOP PACKAGE  
CASE 948E–02  
ISSUE A  
NOTES:  
1. DIMENSIONING AND TOLERANCING PER ANSI  
Y14.5M, 1982.  
2. ICONTROLLING DIMENSION: MILLIMETER.  
3. DIMENSION A DOES NOT INCLUDE MOLD FLASH,  
PROTRUSIONS OR GATE BURRS. MOLD FLASH  
OR GATE BURRS SHALL NOT EXCEED 0.15  
(0.006) PER SIDE.  
4. DIMENSION B DOES NOT INCLUDE INTERLEAD  
FLASH OR PROTRUSION. INTERLEAD FLASH OR  
PROTRUSION SHALL NOT EXCEED 0.25 (0.010)  
PER SIDE.  
5. DIMENSION K DOES NOT INCLUDE DAMBAR  
PROTRUSION. ALLOWABLE DAMBAR  
PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN  
EXCESS OF THE K DIMENSION AT MAXIMUM  
MATERIAL CONDITION.  
20X K REF  
M
S
S
V
0.10 (0.004)  
T
U
S
U
0.15 (0.006) T  
K
K1  
20  
11  
2X L/2  
J J1  
B
L
–U–  
PIN 1  
IDENT  
SECTION N–N  
1
10  
0.25 (0.010)  
6. TERMINAL NUMBERS ARE SHOWN FOR  
REFERENCE ONLY.  
N
7. DIMENSION A AND B ARE TO BE DETERMINED  
AT DATUM PLANE -W-.  
S
0.15 (0.006) T  
U
M
A
–V–  
MILLIMETERS  
DIM MIN MAX  
INCHES  
MIN  
MAX  
0.260  
0.177  
0.047  
0.006  
0.030  
A
B
6.40  
4.30  
---  
6.60 0.252  
4.50 0.169  
N
C
1.20  
---  
D
0.05  
0.50  
0.15 0.002  
0.75 0.020  
F
F
G
H
0.65 BSC  
0.026 BSC  
DETAIL E  
0.27  
0.09  
0.09  
0.19  
0.19  
0.37  
0.011  
0.015  
0.008  
0.006  
0.012  
0.010  
J
0.20 0.004  
0.16 0.004  
0.30 0.007  
0.25 0.007  
–W–  
J1  
K
C
K1  
L
6.40 BSC  
0.252 BSC  
0
G
D
M
0
8
8
_
_
_
_
H
DETAIL E  
0.100 (0.004)  
–T– SEATING  
PLANE  
SO–20  
DW SUFFIX  
PLASTIC SOIC PACKAGE  
CASE 751D–05  
ISSUE F  
D
A
q
NOTES:  
1. DIMENSIONS ARE IN MILLIMETERS.  
2. INTERPRET DIMENSIONS AND TOLERANCES  
PER ASME Y14.5M, 1994.  
20  
11  
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD  
PROTRUSION.  
E
4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE.  
5. DIMENSION B DOES NOT INCLUDE DAMBAR  
PROTRUSION. ALLOWABLE PROTRUSION SHALL  
BE 0.13 TOTAL IN EXCESS OF B DIMENSION AT  
MAXIMUM MATERIAL CONDITION.  
1
10  
MILLIMETERS  
DIM MIN  
MAX  
2.65  
0.25  
0.49  
0.32  
12.95  
7.60  
B
20X B  
A
A1  
B
C
D
E
2.35  
0.10  
0.35  
0.23  
12.65  
7.40  
M
S
S
B
T
0.25  
A
e
1.27 BSC  
A
H
h
10.05  
0.25  
0.50  
0
10.55  
0.75  
0.90  
7
L
SEATING  
PLANE  
q
_
_
18X e  
A1  
C
T
http://onsemi.com  
7
MC10EP17, MC100EP17  
ON Semiconductor and  
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make  
changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any  
particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all  
liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or  
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be  
validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others.  
SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications  
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death  
may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC  
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arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that  
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PUBLICATION ORDERING INFORMATION  
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MC10EP17/D  

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