MC10H601FNG [ONSEMI]
9−Bit ECL to TTL Translator; 9位ECL至TTL转换器型号: | MC10H601FNG |
厂家: | ONSEMI |
描述: | 9−Bit ECL to TTL Translator |
文件: | 总6页 (文件大小:111K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
MC10H601, MC100H601
9−Bit ECLꢀ to ꢀTTL Translator
Description
The MC10H/100H601 is a 9−bit, dual supply ECL to TTL
translator. Devices in the ON Semiconductor 9−bit translator series
utilize the 28−lead PLCC for optimal power pinning, signal
flow−through and electrical performance.
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The devices feature a 48 mA TTL output stage, and AC
performance is specified into both a 50 pF and 200 pF load
capacitance. For the 3−state output disable, both ECL and TTL control
inputs are provided, allowing maximum design flexibility.
The 10H version is compatible with MECL 10H™ ECL logic levels.
The 100H version is compatible with 100K levels.
Features
PLCC−28
FN SUFFIX
CASE 776
• 9−Bit Ideal for Byte−Parity Applications
• 3−State TTL Outputs
• Flow−Through Configuration
• Extra TTL and ECL Power Pins to Minimize Switching Noise
• ECL and TTL 3−State Control Inputs
• Dual Supply
MARKING DIAGRAM*
• 4.8 ns Max Delay into 50 pF, 9.6 ns into 200 pF
(all Outputs Switching)
• PNP TTL Inputs for Low Loading
MCxxxH601G
AWLYYWW
• Pb−Free Packages are Available*
xxx
= 10 or 100
A
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
WL
YY
WW
G
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
©
Semiconductor Components Industries, LLC, 2006
1
Publication Order Number:
November, 2006 − Rev. 12
MC10H601/D
MC10H601, MC100H601
Q5 GND V
Q6 GND Q7 Q8
Table 1. PIN NAMES
CCT
25
24
23
22
21
20
19
PIN
FUNCTION
26
27
28
18
17
16
D8
Q4
Q3
GND
TTL Ground (0 V)
ECL V (0 V)
Supply (+5.0 V)
ECL Supply (−5.2 /−4.5 V)
Data Inputs (ECL)
Data Outputs (TTL)
3−State Control (ECL)
3−State Control (TTL)
D7
V
V
V
V
CCE
CCT
EE
D0−D8
Q0−Q8
OEECL
OETTL
CC
V
CCT
Q2
CCE
15
14
13
12
D6
D5
D4
D3
GND
Q1
2
3
4
Q0
5
6
7
8
9
10
11
OETTL NC OEECL V D0 D1 D2
EE
Figure 1. PLCC−28 Pinout (Top View)
OEECL
OETTL
Table 2. TRUTH TABLE
OEECL
OETTL
D
Q
D0
D1
D2
D3
D4
D5
D6
D7
D8
Q0
Q1
Q2
Q3
Q4
Q5
Q6
L
L
H
X
L
L
X
H
L
H
X
X
L
H
Z
Z
ECL
TTL
Q7
Q8
Figure 2. Logic Diagram
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2
MC10H601, MC100H601
Table 3. 10H ECL DC CHARACTERISTICS: V
= 5.0 V ± 10%; V = −5.2 V ± 5%
CCT
EE
0°C
25°C
85°C
Min
Max
−51
255
Min
Max
−51
175
Min
Max
−51
175
Symbol
Parameter
Unit
I
Power Supply Current
mA
EE
I
I
Input HIGH Current
Input LOW Current
mA
mA
INH
INL
0.5
0.5
0.5
V
V
Input HIGH Voltage
Input LOW Voltage
−1170
−840 −1130
−810 −1060
−720
mV
IH
IL
−1950 −1480 −1950 −1480 −1950 −1445
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
Table 4. 100H ECL DC CHARACTERISTICS: V
= 5.0 V ± 10%; V = −4.2 V to −5.5 V
CCT
EE
0°C
25°C
85°C
Min
Max
−51
255
Min
Max
−51
175
Min
Max
−53
175
Symbol
Parameter
Unit
I
Power Supply Current
mA
EE
I
I
Input HIGH Current
Input LOW Current
mA
mA
INH
INL
0.5
0.5
0.5
V
V
Input HIGH Voltage
Input LOW Voltage
−1165
−880 −1165
−880 −1165
−880
mV
IH
IL
−1810 −1475 −1810 −1475 −1810 −1475
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
Table 5. TTL DC CHARACTERISTICS: V
= 5.0 V ± 10%; V = −5.2 V ± 5% (10H version);
EE
CCT
V
= −4.2 V to −5.5 V (100H version)
EE
0°C
25°C
85°C
Min
Max
110
110
105
Min
Max
110
110
105
Min
Max
110
110
105
Symbol
CCH
Parameter
Condition
Unit
I
I
I
I
Power Supply Current
mA
CCL
Power Supply Current
Input HIGH Current
CCZ
V
V
= 2.7 V
= 7.0 V
20
100
20
100
20
100
mA
IH
IN
IN
I
I
Input LOW Current
V
V
= 0.5 V
−0.6
−225
50
−0.6
−225
50
−0.6
−225
50
mA
mA
mA
IL
IN
Output Short Circuit Current
= 0 V
−100
−100
−100
OS
OUT
I
I
Output Disable Current HIGH
Output Disable Current LOW
V
= 2.7 V
= 0.5 V
OZH
OZL
OUT
OUT
V
−50
−50
−50
V
V
Input HIGH Voltage
Input LOW Voltage
2.0
2.0
2.0
V
V
IHT
ILT
0.8
0.8
0.8
V
Output HIGH Voltage
I
= −3.0 mA
= −15 mA
2.5
2.0
2.5
2.0
2.5
2.0
OHT
OH
OH
I
V
V
Output LOW Voltage
Input Clamp Voltage
I
= 48 mA
OL
0.55
0.55
0.55
V
V
OLT
IK
I
= −18 mA
−1.2
−1.2
−1.2
IN
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
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3
MC10H601, MC100H601
Table 6. AC CHARACTERISTICS: V
= 5.0 V ± 10%; V = −5.2 V ± 5% (10H version); V = −4.2 V to −5.5 V (100H version)
CCT
EE
EE
0°C
25°C
85°C
Min
Max
Min
Max
Min
Max
Symbol
Parameter
Condition
Unit
t
t
Propagation Delay
to Output
C = 50 pF
L
1.7
3.4
4.8
9.6
1.7
3.4
4.8
9.6
1.7
3.4
4.8
9.6
ns
ns
PLH
PHL
L
C = 200 pF
t
t
Output Disable Time
OEECL
OETTL
OEECL
OETTL
C = 50 pF
L
3.7
5.4
6.5
13
3.7
5.4
6.5
13
3.7
5.4
6.5
13
ns
ns
PLZ
PHZ
L
C = 200 pF
t
t
C = 50 pF
4.3
7.0
7.5
15
4.3
7.0
7.5
15
4.3
7.0
7.5
15
ns
ns
PLZ
PHZ
L
C = 200 pF
L
t
t
Output Enable Time
C = 50 pF
3.5
5.0
6.0
12
3.5
5.0
6.0
12
3.5
5.0
6.0
12
ns
ns
PZL
PZH
L
C = 200 pF
L
t
t
C = 50 pF
4.2
6.0
7.0
14
4.2
6.0
7.0
14
4.2
6.0
7.0
14
ns
ns
PZL
PZH
L
C = 200 pF
L
t
t
Output Rise/Fall Time
1.0 V−2.0 V
C = 50 pF
L
1.2
3.0
1.2
3.0
1.2
3.0
ns
ns
R
F
L
C = 200 pF
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
ORDERING INFORMATION
†
Device
Package
Shipping
MC10H601FN
PLCC−28
37 Units / Rail
37 Units / Rail
MC10H601FNG
PLCC−28
(Pb−Free)
MC10H601FNR2
PLCC−28
500 / Tape & Reel
500 / Tape & Reel
MC10H601FNR2G
PLCC−28
(Pb−Free)
MC100H601FN
PLCC−28
37 Units / Rail
37 Units / Rail
MC100H601FNG
PLCC−28
(Pb−Free)
MC100H601FNR2
MC100H601FNR2G
PLCC−28
500 / Tape & Reel
500 / Tape & Reel
PLCC−28
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
Resource Reference of Application Notes
AN1405/D
AN1406/D
AN1503/D
AN1504/D
AN1568/D
AN1672/D
AND8001/D
AND8002/D
AND8020/D
AND8066/D
AND8090/D
−
−
−
−
−
−
−
−
−
−
−
ECL Clock Distribution Techniques
Designing with PECL (ECL at +5.0 V)
ECLinPSt I/O SPiCE Modeling Kit
Metastability and the ECLinPS Family
Interfacing Between LVDS and ECL
The ECL Translator Guide
Odd Number Counters Design
Marking and Date Codes
Termination of ECL Logic Devices
Interfacing with ECLinPS
AC Characteristics of ECL Devices
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4
MC10H601, MC100H601
PACKAGE DIMENSIONS
PLCC−28
FN SUFFIX
PLASTIC PLCC PACKAGE
CASE 776−02
ISSUE E
M
S
S
0.007 (0.180)
T
L−M
N
B
Y BRK
D
−N−
M
S
S
N
0.007 (0.180)
T
L−M
U
Z
−M−
−L−
W
D
S
S
S
N
0.010 (0.250)
T
L−M
X
G1
V
28
1
VIEW D−D
M
S
S
S
A
0.007 (0.180)
0.007 (0.180)
T
L−M
L−M
N
M
S
S
N
0.007 (0.180)
T
L−M
H
Z
M
S
T
N
R
K1
C
E
0.004 (0.100)
G
K
SEATING
PLANE
−T−
J
M
S
S
N
0.007 (0.180)
T
L−M
F
VIEW S
G1
S
S
S
N
0.010 (0.250)
T
L−M
VIEW S
NOTES:
INCHES
MILLIMETERS
1. DATUMS −L−, −M−, AND −N− DETERMINED
WHERE TOP OF LEAD SHOULDER EXITS
PLASTIC BODY AT MOLD PARTING LINE.
2. DIMENSION G1, TRUE POSITION TO BE
MEASURED AT DATUM −T−, SEATING PLANE.
3. DIMENSIONS R AND U DO NOT INCLUDE
MOLD FLASH. ALLOWABLE MOLD FLASH IS
0.010 (0.250) PER SIDE.
4. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
5. CONTROLLING DIMENSION: INCH.
6. THE PACKAGE TOP MAY BE SMALLER THAN
THE PACKAGE BOTTOM BY UP TO 0.012
(0.300). DIMENSIONS R AND U ARE
DETERMINED AT THE OUTERMOST
EXTREMES OF THE PLASTIC BODY
EXCLUSIVE OF MOLD FLASH, TIE BAR
BURRS, GATE BURRS AND INTERLEAD
FLASH, BUT INCLUDING ANY MISMATCH
BETWEEN THE TOP AND BOTTOM OF THE
PLASTIC BODY.
DIM MIN
MAX
0.495
0.495
0.180
0.110
0.019
MIN
12.32
12.32
4.20
MAX
12.57
12.57
4.57
A
B
C
E
F
0.485
0.485
0.165
0.090
0.013
2.29
0.33
2.79
0.48
G
H
J
0.050 BSC
1.27 BSC
0.026
0.020
0.025
0.450
0.450
0.042
0.042
0.042
0.032
−−−
−−−
0.66
0.51
0.64
11.43
11.43
1.07
1.07
1.07
−−−
0.81
−−−
K
R
U
V
W
X
Y
Z
−−−
0.456
0.456
0.048
0.048
0.056
11.58
11.58
1.21
1.21
1.42
0.50
10
−−− 0.020
10
2
2
_
_
_
_
G1 0.410
K1 0.040
0.430
−−−
10.42
1.02
10.92
−−−
7. DIMENSION H DOES NOT INCLUDE DAMBAR
PROTRUSION OR INTRUSION. THE DAMBAR
PROTRUSION(S) SHALL NOT CAUSE THE H
DIMENSION TO BE GREATER THAN 0.037
(0.940). THE DAMBAR INTRUSION(S) SHALL
NOT CAUSE THE H DIMENSION TO BE
SMALLER THAN 0.025 (0.635).
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5
MC10H601, MC100H601
ECLinPS is a trademark of Semiconductor Components Industries, LLC (SCILLC).
MECL 10H is a trademark of Motorola, Inc.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
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For additional information, please contact your local
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MC10H601/D
相关型号:
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