MC33349N-5R1 [ONSEMI]
MC33349N-5R1;型号: | MC33349N-5R1 |
厂家: | ONSEMI |
描述: | MC33349N-5R1 |
文件: | 总12页 (文件大小:116K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
MC33349
Lithium Battery Protection
Circuit for One Cell
Battery Packs
The MC33349 is a monolithic lithium battery protection circuit that
is designed to enhance the useful operating life of a one cell
rechargeable battery pack. Cell protection features consist of
internally trimmed charge and discharge voltage limits, discharge
current limit detection, and a low current standby mode when the cell
is discharged. This protection circuit requires a minimum number of
external components and is targeted for inclusion within the battery
pack.
• Internally Trimmed Charge and Discharge Voltage Limits
• Discharge Current Limit Detection
• Low Current Standby Mode when Cells are Discharged
• Dedicated for One Cell Applications
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MARKING
DIAGRAM
SOT–23
N SUFFIX
CASE 1262
6
Avxx
1
v
= Version code number
xx = Date code
• Minimum Components for Inclusion within the Battery Pack
• Available in a Low Profile Surface Mount Package
PIN CONNECTIONS
DO
P–
1
2
6
5
Gnd
Typical One Cell Smart Battery Pack
V
cell
CO
3
4
C
t
(Top View)
5
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 11 of this data sheet.
MC33349
6
4
1
3
2
Semiconductor Components Industries, LLC, 2000
1
Publication Order Number:
November, 2000 – Rev. 3
MC33349/D
MC33349
MAXIMUM RATINGS
Rating
Symbol
Value
Unit
Supply Voltage (Pin 5 to Pin 6)
V
DD
–0.3 to 12
V
Input Voltage
P– Pin Voltage (Pin 5 to Pin 2)
Ct Pin (Pin 4 to Pin 6)
V
V
V
– 28 to V + 0.3
V
V
P–
DD
DD
Gnd – 0.3 to V + 0.3
DD
Ct
Output Voltage
CO Pin Voltage (Pin 3 to Pin 2)
DO Pin Voltage (Pin 1 to Pin 6)
V
V
V
– 28 to V + 0.3
V
V
CO
DD
DD
Gnd – 0.3 to V + 0.3
DO
DD
Power Dissipation
P
150
mW
°C
D
Operating Junction Temperature
Storage Temperature
T
–40 to 85
–55 to 125
J
T
stg
°C
ELECTRICAL CHARACTERISTICS (C = 0.01 µF, T = 25°C, for min/max values T is the operating junction temperature range
t
A
A
that applies, unless otherwise noted.)
Characteristic
Symbol
Min
Typ
Max
Unit Note 1.
VOLTAGE SENSING
Cell Charging Cutoff (Pin 5 to Pin 6)
Overvoltage Threshold, V Increasing
V
DET1
B
DD
–3, –4 Suffix
–5, –6, –7 Suffix
Overvoltage Hysteresis V Decreasing
4.2
4.3
150
4.25
4.35
200
4.3
4.4
250
V
V
mV
V
V
B
C
DD
HYS1
Cell Discharging Cutoff (Pin 5 to Pin 6)
Undervoltage Threshold, V Decreasing
2.437
55
2.5
80
2.563
105
V
DD
DET2
Overvoltage Delay Time (C = 0.01 µF, V = 3.6 V to 4.5 V)
t
ms
B
C
t
DD
(DET1)
Undervoltage Delay Time (V = 3.6 V to 2.4 V)
t
7.0
10
13
ms
DD
(DET2)
CURRENT SENSING
Excess Current Threshold (Detect rising edge of P– pin voltage)
V
DET3
D
–3, –7 Suffix
–4 Suffix
–5 Suffix
170
45
–
200
75
140
235
230
105
–
mV
mV
mV
mV
–6 Suffix
–
–
Short Protection Voltage (V = 3.0 V)
V
V
DD
– 1.1
V
DD
– 0.8
V – 0.5
DD
V
D
DD
SHORT
Current Limit Delay Time (V = 3.0 V)
DD
t
9.0
–
13
5.0
17
50
ms
µs
D
D
(DET3)
t
(SHORT)
Reset Resistance for Short Protection
R
50
100
150
kW
D
SHORT
OUTPUTS
CO Nch On Voltage (I = 50 µA, V = 4.4 V)
V
ol1
–
0.2
3.8
0.2
3.7
0.5
–
V
V
V
V
E
F
O
DD
CO Pch On Voltage (I = –50 µA, V = 3.9 V)
V
oh1
3.4
–
O
DD
DO Nch On Voltage (I = 50 µA, V = 2.4 V)
V
ol2
0.5
–
G
H
O
DD
DO Pch On Voltage (I = –50 µA, V = 3.9 V)
V
oh2
3.4
O
DD
TOTAL DEVICE
Operating Input Voltage
V
DD
1.5
–
10
V
A
Supply Current
I
cell
Operating (V = 3.9 V, V = 0 V)
–
–
3.0
0.3
6.0
0.6
µA
µA
I
I
DD
P–
Standby (V = 2.0 V)
DD
Minimum Operating Cell Voltage for Zero Volt Charging
(Pin 5 to Pin 2)
V
ST
–
–
1.2
V
A
1. Indicates test circuits shown on next page.
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2
MC33349
A
B
C
F
G
H
I
A
5
2
6
5
2
6
3
3
1
V
V
V
OSCILLOSCOPE
5
5
2
6
4
V
2
6
1
A
3
V
5
2
6
5
1
A
V
2
6
V
1
D
5
2
6
5
2
6
A
1
A
V
E
5
2
6
3
A
V
Figure 1. Test Circuit Schematics
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3
MC33349
Vcell
Ct
5
4
Level
Shift
VD1
VD2
10 kOhm
Short Circuit
Detector
Delay
VD3
Rshort
6
1
3
2
Gnd
Do
Co
P-
Figure 2. Detailed Block Diagram
PIN FUNCTION DESCRIPTION
Description
Pin
Symbol
1
DO
This output connects to the gate of the discharge MOSFET allowing it to enable or disable battery pack
discharging.
2
P–
This pin monitors cell discharge current.
The excess current detector sets when the combined voltage drop of the charge MOSFET and the discharge
MOSFET exceeds the discharge current limit threshold voltage, V
. The short circuit detector activates when
(DET3)
V
(P–)
is pulled within 0.8V of the cell voltage by a short circuit.
3
4
5
CO
This output connects to the gate of the charge MOSFET allowing it to enable or disable battery pack charging.
This pin connects to the external capacitor for setting the output delay of the overvoltage detector (VD1).
C
t
V
cell
This input connects to the positive terminal of the cell for voltage monitoring and provides operating bias for the
integrated circuit.
6
Gnd
This is the ground pin of the IC.
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4
MC33349
TYPICAL CHARACTERISTICS
4.27
4.26
2.54
2.53
4.25
4.24
4.23
4.22
4.21
4.20
2.52
2.51
2.50
2.49
2.48
2.47
-60
-40
-20
0
20
40
60
80
100
-60
-40
-20
0
20
40
60
80
100
T , AMBIENT TEMPERATURE (°C)
A
T , AMBIENT TEMPERATURE (°C)
A
Figure 3. Overvoltage Threshold
vs Temperature
Figure 4. Undervoltage Threshold
vs Temperature
MC33349N–3X
MC33349N–3X / MC33349N–7X
0.210
0.205
0.200
0.195
0.190
2.40
V
DD
= 3.0 V
2.35
2.30
2.25
2.20
2.15
2.10
-60
-40
-20
0
20
40
60
80
100
-60
-40
-20
0
20
40
60
80
100
T , AMBIENT TEMPERATURE (°C)
A
T , AMBIENT TEMPERATURE (°C)
A
Figure 5. Excess Current Threshold
vs Temperature
Figure 6. Short Protection Voltage
vs Temperature
MC33349N–3X / MC33349N–7X
MC33349N–3X
100
90
18
16
14
80
70
60
50
40
30
20
12
10
8
C3 = 0.01µF
= 3.6V to 4.3V
DD
V
DD
= 3.6V to 2.4V
6
V
4
2
-60
-60
-40
-20
0
20
40
60
80
100
-40
-20
0
20
40
60
80
100
T , AMBIENT TEMPERATURE (°C)
A
T , AMBIENT TEMPERATURE (°C)
A
Figure 7. Output Delay of Overvoltage
vs Temperature
Figure 8. Output Delay of Undervoltage
vs Temperature
MC33349N–3X
MC33349N–3X / MC33349N–7X
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5
MC33349
10
20
18
16
14
12
10
8
V
DD
= 3.0 V
V
DD
= 3.0 V
8
6
4
2
6
4
2
0
-60
0
-60
-40
-20
0
20
40
60
80
100
-40
-20
0
20
40
60
80
100
T , AMBIENT TEMPERATURE (°C)
A
T , AMBIENT TEMPERATURE (°C)
A
Figure 9. Output Delay of Excess Current
vs Temperature
Figure 10. Output Delay of Short Circuit
Detector vs Temperature
MC33349N–3X
MC33349N–3X
0.210
4.0
3.5
3.0
0.205
0.200
0.195
0.190
2.5
2.0
1.5
1.0
0.5
0.0
V
V
= 3.9 V
= 0 V
DD
P-
-60
-40
-20
0
20
40
60
80
100
-60
-40
-20
0
20
40
60
80
100
T , AMBIENT TEMPERATURE (°C)
A
T , AMBIENT TEMPERATURE (°C)
A
Figure 11. Overvoltage Threshold Hysteresis
vs Temperature
Figure 12. Operating Current
vs Temperature
MC33349N–3X / MC33349N–7X
MC33349N–3X
0.40
0.35
0.30
0.30
V
DD
= 2.0 V
0.25
0.20
0.15
0.10
0.25
0.20
0.15
0.10
0.05
0.00
I
V
= 50µA
= 4.4V
DD
OL
0.05
0.00
-60
-40
-20
0
20
40
60
80
100
-60
-40
-20
0
20
40
60
80
100
T , AMBIENT TEMPERATURE (°C)
A
T , AMBIENT TEMPERATURE (°C)
A
Figure 13. Standby Current vs Temperature
MC33349N–3X
Figure 14. Cout Nch Driver On Voltage (Vol1)
vs Temperature
MC33349N–3X
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6
MC33349
3.90
0.30
3.85
3.80
3.75
3.70
0.25
0.20
0.15
0.10
I
= -50µA
= 3.9V
DD
OH
V
I
V
= 50µA
= 2.4V
DD
3.65
3.60
0.05
0.00
OL
-60
-40
-20
0
20
40
60
80
100
-60
-40
-20
0
20
40
60
80
100
T , AMBIENT TEMPERATURE (°C)
A
T , AMBIENT TEMPERATURE (°C)
A
Figure 15. Cout Pch Driver On Voltage (Voh1)
vs Temperature
Figure 16. Dout Nch Driver On Voltage (Vol2)
vs Temperature
MC33349N–3X
MC33349N–3X
10000
1000
100
3.90
I
= -50µA
= 3.9V
DD
OH
V
3.85
3.80
3.75
3.70
10
0
R2 = 1kW
= 3.0V
3.65
3.60
V
DD
0.001
0.01
0.1
1
-60
-40
-20
0
20
40
60
80
100
EXTERNAL CAPACITANCE C2 (µF)
T , AMBIENT TEMPERATURE (°C)
A
Figure 17. Dout Pch Driver On Voltage (Voh2)
vs Temperature
Figure 18. Short Protection Delay Time
vs Capacitance C2
MC33349N–3X
MC33349N–3X
25.00
20.00
15.00
10.00
5.00
0.00
2.5
3.0
3.5
SUPPLY VOLTAGE V (V)
4.0
4.5
DD
Figure 19. Excess Current Delay Time vs VDD
MC33349N–3X
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7
MC33349
0.210
0.209
4.258
C1 = 0 to 0.68µF
C3 = 0.22µF
4.256
4.254
4.252
4.250
C3 = 0.1µF
0.208
0.207
0.206
0.205
C3 = 0.01µF
0.204
0.203
0.202
4.248
4.246
V
DD
= 3.0V
0
0.5
1
1.5
2
2.5
3
0
200
400
600
800
1000
EXTERNAL RESISTANCE R2(kW)
EXTERNAL RESISTANCE R1(W)
Figure 20. Excess Current Threshold vs
External Resistance R2
Figure 21. Overvoltage Threshold vs
External Resistance R1
MC33349N–3X
MC33349N–3X / MC33349N–7X
OPERATING DESCRIPTION
VD1 / Over–Charge Detector
VD1 monitors the voltage at the V
it exceeds the over–charge detector threshold, V
senses an over–charging condition, the CO pin goes to a
“Low” level, and the external charge control,
Nch–MOSFET turns off.
pin goes to a “Low” level, and the external discharge control
Nch MOSFET turns off. The IC enters a low current standby
mode after detection of an over–discharged voltage by VD2.
Supply current then reduces to approximately 0.3 µA.
During standby mode, only the charger detector operates.
VD2 can only reset after connecting the pack to a charger.
pin (V ). When
DD
CELL
. VD1
DET1
Resetting VD1 allows resumption of the charging
process. VD1 resets under two conditions, thus, making the
CO pin level “High.” The first case occurs when the cell
While V
threshold, V
remains under the over–discharge detector
DD
, discharge current can flow through the
DET2
parasitic diode of the external discharge control FET. The
DO level goes “High” when the cell voltage rises above
voltage drops below “V
–V
.” (V
is
DET1
HYS1
HYS1
typically 200 mV). In the second case, disconnecting the
V
DET2
due to the charging current through the parasitic
charger from the battery pack can reset VD1 after V drops
diode. Connecting a charger to the battery pack will instantly
set DO “High” if this causes V to rise above V
DD
between “V
” and “V
–V
”.
.
DET2
DET1
DET1
HYS1
DD
After detecting over–charge, connecting a load to the
battery pack allows load current to flow through the parasitic
diode of the external charge control FET. The CO level goes
When cell voltage equals zero, one can charge the battery
pack if the voltage is greater than the minimum charge
voltage, V .
ST
“High” when the cell voltage drops below V
current draw through the parasitic diode.
due to load
Output delay time for the over–discharge detection
DET1
(t
) is fixed internally. If the voltage fault occurs within
VDET2
An external capacitor connected between the Gnd pin and
Ct pin sets the output delay time for over–charge detection.
The external capacitor sets up a delay time from the moment
of over–charge detection to the time CO outputs a signal,
which enables the charge control FET to turn off. If the
voltage fault occurs within the time delay window. CO will
not turn off the charge control FET. The output delay time
can be calculated as follows:
the time delay window, DO will not turn off the discharge
control FET.
A CMOS buffer sets the output of the DO pin to a “High”
level of V and a “Low” level of Gnd.
DD
VD3 / Excess Current Detector, Short Circuit Detector
Both the excess current detector and the short circuit
detector can work when the two control FET’s are on. When
the voltage at the P– pin rises to a value between the short
t
[sec] + (Ct[F] (VDD[V] * 0.7)ń(0.48 10*6
)
VDET1
circuit protection voltage, V , and the excess current
SHORT
threshold, V
Increasing V
, the excess current detector operates.
DET3
A level shifter incorporated in a buffer driver for the CO
pin drives the “Low” level of CO pin to the P– pin voltage.
higher than V
enables the short
(P–)
SHORT
circuit detector. The DO pin then goes to a “Low” level, and
the external discharge control Nch MOSFET turns off.
A CMOS buffer sets the “High” level of CO pin to V
.
DD
VD2 / Over–Discharge Detector
Output delay time for excess current detection (t
) is
VDET3
VD2 monitors the voltage at the V
pin (V . When
DD)
fixed internally. If the excess current fault occurs within the
time delay window, DO will not turn off the discharge
control FET. However, when the short circuit protector is
CELL
it drops below the over–discharge detector threshold,
, VD2 senses an over–discharge condition, the DO
V
DET2
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8
MC33349
–NOTE–
enabled, DO can turn off the discharge control FET. Its delay
time would be approximately 5 µs.
If V voltage is higher than the over–discharge voltage
DD
The P–pin has a built–in pull down resistor, typically
100 kW, which connects to the Gnd pin. Once an excess
current or short circuit fault is removed, the internal resistor
threshold, V
, when excess current is detected the IC
DET2
will not enter a standby mode. However, if V is below
DD
V
DET2
when excess current is detected, the IC will enter a
pulls V
to the Gnd pin potential. Therefore, the voltage
standby mode. This will not occur when the short circuit
detector activates.
(P–)
from P– to Gnd drops below the current detection thresholds
and DO turns the external MOSFET back on.
Figure 22. Timing Diagram / Operational Description
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9
MC33349
+
R1
100 W
C1
0.1 µF
5
4
6
MC33349
1
2
C3
0.01 µF
3
C2
0.22 µF
R2
1 kW
-
Figure 23. Typical Application Circuit
Technical Notes
R1 and C1 will stabilize a supply voltage to the MC33349. A recommended R1 value is less than 1 kW. A larger value of R1
leads to higher detection voltage because of shoot through current into the IC.
R2 and C2 stabilize P– pin voltage. Larger R2 values could possibly disable reset from over–discharge by connecting a charger.
Recommended values are less than 1 kW. After an over–charge detection even connecting a battery pack to a system could
probably not allow a system to draw load current if one uses a larger R2C2 time constant. The recommended C2 value is less
than 1 µF.
R1 and R2 can operate as a current limiter against setting cell reverse direction or for applying excess charging voltage to the
IC and battery pack. Smaller R1 and R2 values may cause excessive power consumption over the specified power dissipation
rating. Therefore R1+R2 should be more than 1 kW.
The time constants R1C1 and R2C2 must have a relation as follows:
R1C1 ≤ R2C2
If the R1C1 time constant for the Vcell pin is larger than the R2C2 time constant for the P– pin, the IC might enter a standby
mode after detecting excess current. This was noted in the operating description of the current detectors.
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10
MC33349
ORDERING INFORMATION
Overvoltage
Threshold (V)
Undervoltage
Threshold (V)
Current Limit
Threshold (V)
Device
Marking
A1xx*
A2xx*
A3xx*
A4xx*
A0xx*
Reel Size
Tape width
Quantity
MC33349N–3R1
MC33349N–4R1
MC33349N–5R1
MC33349N–6R1
MC33349N–7R1
4.25
4.25
4.35
4.35
4.35
2.5
2.5
2.5
2.5
2.5
0.2
0.075
0.140
0.235
0.2
7″
8 mm
3000
* ″xx″ denotes the date code marking.
Consult factory for information on other threshold values.
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11
MC33349
PACKAGE DIMENSIONS
SOT–23
N SUFFIX
PLASTIC PACKAGE
CASE 1262–01
ISSUE A
E
M
M
C B
0.05
0.20
PIN 1
IDENTIFIER
NOTES:
1. DIMENSIONS ARE IN MILLIMETERS.
2. INTERPRET DIMENSIONS AND TOLERANCES
PER ASME Y14.5M, 1994.
3. DIMENSION D DOES NOT INCLUDE FLASH OR
PROTRUSIONS. FLASH OR PROTRUSIONS
SHALL NOT EXCEED 0.23 PER SIDE.
4. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
C
1
2
6
5
A
A
5. DIMENSIONS D AND E1 ARE TO BE DETERMINED
AT DATUM PLANE H.
3
4
MILLIMETERS
A1
A
DIM MIN
MAX
1.45
0.15
0.50
0.45
0.20
0.15
3.00
3.00
1.75
E1
A
A1
b
0.90
0.00
0.35
0.35
0.09
0.09
2.80
2.60
1.50
B
A
b1
c
c1
D
b
E
E1
e
0.95
1.90
q
e1
L
0.25
0
0.55
10
q
_
_
H
L
b1
SECTION A–A
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are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes
without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular
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including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be
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Email: ONlit–asia@hibbertco.com
JAPAN: ON Semiconductor, Japan Customer Focus Center
4–32–1 Nishi–Gotanda, Shinagawa–ku, Tokyo, Japan 141–0031
Phone: 81–3–5740–2700
Email: r14525@onsemi.com
English Phone: (+1) 303–308–7142 (Mon–Fri 12:00pm to 5:00pm GMT)
Email: ONlit@hibbertco.com
ON Semiconductor Website: http://onsemi.com
EUROPEAN TOLL–FREE ACCESS*: 00–800–4422–3781
For additional information, please contact your local
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