MC33761SNT1-030G [ONSEMI]

Ultra Low−Noise Low Dropout Voltage Regulator with 1.0 V ON/OFF Control; 超洛瓦????噪声,低压差稳压器与1.0 V ON / OFF控制
MC33761SNT1-030G
型号: MC33761SNT1-030G
厂家: ONSEMI    ONSEMI
描述:

Ultra Low−Noise Low Dropout Voltage Regulator with 1.0 V ON/OFF Control
超洛瓦????噪声,低压差稳压器与1.0 V ON / OFF控制

线性稳压器IC 调节器 电源电路 光电二极管 输出元件
文件: 总13页 (文件大小:408K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
MC33761  
Ultra Low−Noise Low  
Dropout Voltage Regulator  
with 1.0 V ON/OFF Control  
The MC33761 is an Low DropOut (LDO) regulator featuring  
excellent noise performances. Thanks to its innovative design, the  
circuit reaches an impressive 40 mVRMS noise level without an  
external bypass capacitor. Housed in a small SOT−23 5 leads−like  
package, it represents the ideal designer’s choice when space and  
noise are at premium. The absence of external bandgap capacitor  
accelerates the response time to a wake−up signal and keeps it within  
40 ms (in repetitive mode), making the MC33761 as a natural  
candidate for portable applications.  
http://onsemi.com  
5
1
THIN SOT−23−5  
SN SUFFIX  
The MC33761 also hosts a novel architecture which prevents  
excessive undershoots in the presence of fast transient bursts, as in any  
bursting systems.  
CASE 483  
Finally, with a static line regulation better than −75 dB, it naturally  
shields the downstream electronics against choppy lines.  
Features  
PIN CONNECTIONS AND  
MARKING DIAGRAM  
Ultra−Low Noise: 150 nV/Hz @ 100 Hz, 40 mVRMS  
100 Hz−100 kHz Typical, I = 60 mA, Co = 1.0 mF  
Fast Response Time from OFF to ON: 40 ms Typical at a 200 Hz  
Repetition Rate  
out  
5
1
2
V
V
out  
in  
GND  
Ready for 1.0 V Platforms: ON with a 900 mV High Level  
Nominal Output Current of 80 mA with a 100 mA Peak Capability  
3
4
ON/OFF  
NC  
Typical Dropout of 90 mV @ 30 mA, 160 mV @ 80 mA  
Ripple Rejection: 70 dB @ 1.0 kHz  
1.5% Output Precision @ 25°C  
(Top View)  
= Device Code  
= Assembly Location  
= Year  
Lxx  
A
Y
W
G
Thermal Shutdown  
= Work Week  
= Pb−Free Package  
V Available at 2.5 V, 2.8 V, 2.9 V, 3.0 V, 5.0 V  
out  
Operating Range from −40 to +85°C  
Dual Version is Available as MC33762  
(Note: Microdot may be in either location)  
Pb−Free Packages are Available  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 12 of this data sheet.  
Applications  
Noise Sensitive Circuits: VCOs RF Stages, etc.  
Bursting Systems (TDMA Phones)  
All Battery Operated Devices  
V
in  
1
5
ON/  
OFF  
On/Off  
Thermal  
Shutdown  
3
4
Band Gap  
Reference  
NC  
V
out  
*Current Limit  
*Antisaturation Protection  
*Load Transient Improvement  
2
GND  
Figure 1. Simplified Block Diagram  
©
Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
July, 2006 − Rev. 8  
MC33761/D  
MC33761  
PIN FUNCTION DESCRIPTIONS  
Pin #  
Pin Name  
Function  
Powers the IC  
Description  
1
2
3
V
in  
A positive voltage up to 12 V can be applied upon this pin.  
GND  
The IC’s ground  
ON/OFF  
Shuts or wakes−up the IC  
A 900 mV level on this pin is sufficient to start the IC. A 150 mV shuts it  
down.  
4
5
NC  
None  
It makes no arm to connect the pin to a known potential, like in a  
pin−to−pin replacement case.  
V
out  
Delivers the output voltage  
This pin requires a 1.0 mF output capacitor to be stable.  
MAXIMUM RATINGS  
Value  
Min  
Max  
Rating  
Pin #  
Symbol  
Unit  
Power Supply Voltage  
1
V
in  
12  
V
ESD Capability, HBM Model  
All Pins  
All Pins  
1.0  
200  
kV  
V
ESD Capability, Machine Model  
Maximum Power Dissipation  
NW Suffix, Plastic Package  
Thermal Resistance Junction−to−Air  
P
Internally Limited  
W
D
R
210  
°C/W  
q
JA  
Operating Ambient Temperature  
Maximum Junction Temperature (Note 1)  
Maximum Operating Junction Temperature (Note 2)  
T
Jmax  
T
−40 to +85  
150  
°C  
°C  
°C  
A
T
125  
J
Storage Temperature Range  
T
stg  
−60 to +150  
°C  
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the  
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect  
device reliability.  
ELECTRICAL CHARACTERISTICS  
(For typical values T = 25°C, for min/max values T = −40°C to +85°C, max T = 125°C unless otherwise noted)  
A
A
J
Characteristics  
Pin #  
Symbol  
Min  
Typ  
Max  
Unit  
LOGIC CONTROL SPECIFICATIONS  
Input Voltage Range  
3
3
3
V
R
V
0
V
V
ON/OFF  
ON/OFF  
ON/OFF  
in  
ON/OFF Input Resistance (all versions)  
250  
kW  
mV  
ON/OFF Control Voltages (Note 3)  
150  
Logic Zero, OFF State, I = 50 mA  
O
Logic One, ON State, I = 50 mA  
900  
O
CURRENTS PARAMETERS  
Current Consumption in OFF State (all versions)  
IQ  
0.1  
2.0  
mA  
OFF  
OFF Mode Current: V = V + 1.0 V, I = 0, V  
=
in  
out  
O
OFF  
150 mV  
Current Consumption in ON State (all versions)  
IQ  
180  
800  
180  
mA  
mA  
ON  
ON Mode Current: V = V + 1.0 V, I = 0, V = 3.5 V  
ON  
in  
out  
O
Current Consumption in ON State (all versions), ON Mode  
IQ  
SAT  
Saturation Current: V = V − 0.5 V, No Output Load  
in  
out  
Current Limit V = Vout  
+ 1.0 V,  
I
100  
500  
mA  
in  
nom  
MAX  
Output is brought to Vout  
− 0.3 V (all versions)  
nom  
1. Internally limited by shutdown.  
2. Specifications are guaranteed below this value.  
3. Voltage slope should be greater than 2.0 mV/ms.  
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2
 
MC33761  
ELECTRICAL CHARACTERISTICS (continued)  
(For typical values T = 25°C, for min/max values T = −40°C to +85°C, max T = 125°C unless otherwise noted)  
A
A
J
Characteristics  
Pin #  
Symbol  
Min  
Typ  
Max  
Unit  
OUTPUT VOLTAGES  
V
+ 1.0 V < V < 6.0 V, T = 25°C, 1.0 mA < I < 80 mA  
5
V
out  
2.462  
2.5  
2.537  
V
out  
2.5 V  
in  
A
out  
2.8 V  
2.9 V  
3.0 V  
5.0 V  
5
5
5
5
5
5
V
2.758  
2.857  
2.955  
4.925  
−1.5  
2.8  
2.9  
3.0  
5.0  
X
2.842  
2.943  
3.045  
5.075  
+1.5  
V
V
V
V
%
V
out  
V
out  
V
out  
V
out  
Other Voltages up to 5.0 V Available in 50 mV Increment Steps  
+ 1.0 V < V < 6.0 V, T = −40°C to +85°C, 1.0 mA < I < 80 mA  
V
out  
V
V
out  
2.425  
2.5  
2.575  
out  
2.5 V  
in  
A
out  
2.8 V  
2.9 V  
3.0 V  
5.0 V  
5
5
5
5
5
V
2.716  
2.813  
2.91  
2.8  
2.9  
3.0  
5.0  
X
2.884  
2.987  
3.090  
5.150  
+3.0  
V
out  
V
out  
V
out  
V
V
V
out  
4.850  
−3.0  
Other Voltages up to 5.0 V Available in 50 mV Increment Steps  
LINE AND LOAD REGULATION, DROPOUT VOLTAGES  
Line Regulation (all versions)  
V
out  
%
5/1  
5
Reg  
20  
40  
mV  
mV  
mV  
line  
V
out  
+ 1.0 V < V < 12 V, I = 80 mA  
in out  
Load Regulation (all versions)  
= V + 1.0 V, C = 1.0 mF, I = 1.0 to 80 mA  
Reg  
load  
V
in  
out  
out  
out  
Dropout Voltage (all versions) (Note 4)  
5
5
5
V −V  
90  
140  
160  
150  
200  
250  
I
I
I
= 30 mA  
= 60 mA  
= 80 mA  
in out  
out  
out  
out  
V −V  
in out  
V −V  
in out  
DYNAMIC PARAMETERS  
Ripple Rejection (all versions)  
5/1  
5
Ripple  
−70  
150  
35  
dB  
V
in  
= V + 1.0 V + 1.0 kHz 100 mVpp Sinusoidal Signal  
out  
Output Noise Density @ 1.0 kHz  
nV/  
Hz  
RMS Output Noise Voltage (all versions)  
5
Noise  
mV  
ms  
C
out  
= 1.0 mF, I = 50 mA, F = 100 Hz to 1.0 MHz  
out  
Output Rise Time (all versions) C = 1.0 mF, I = 50 mA,  
5
t
40  
out  
out  
rise  
10% of Rising ON Signal to 90% of Nominal V  
out  
THERMAL SHUTDOWN  
Thermal Shutdown (all versions)  
125  
°C  
4. V is brought to V − 100 mV.  
out  
out  
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MC33761  
DEFINITIONS  
Load Regulation  
Line Regulation  
The change in output voltage for a change in output  
current at a constant chip temperature.  
The change in output voltage for a change in input voltage.  
The measurement is made under conditions of low  
dissipation or by using pulse technique such that the average  
chip temperature is not significantly affected. One usually  
distinguishes static line regulation or DC line regulation (a  
DC step in the input voltage generates a corresponding step  
in the output voltage) from ripple rejection or audio  
susceptibility where the input is combined with a frequency  
generator to sweep from a few hertz up to a defined  
boundary while the output amplitude is monitored.  
Dropout Voltage  
The input/output differential at which the regulator output  
no longer maintains regulation against further reductions in  
input voltage. Measured when the output drops 100 mV  
below its nominal value (which is measured at 1.0 V  
differential value). The dropout level is affected by the chip  
temperature, load current and minimum input supply  
requirements.  
Thermal Protection  
Output Noise Voltage  
Internal thermal shutdown circuitry is provided to protect  
the integrated circuit in the event that the maximum junction  
temperature is exceeded. When activated at typically 125°C,  
the regulator turns off. This feature is provided to prevent  
catastrophic failures from accidental overheating.  
This is the integrated value of the output noise over a  
specified frequency range. Input voltage and output current  
are kept constant during the measurement. Results are  
expressed in mVRMS.  
Maximum Power Dissipation  
The maximum total dissipation for which the regulator  
will operate within its specs.  
Maximum Package Power Dissipation  
The maximum power package power dissipation is the  
power dissipation level at which the junction temperature  
reaches its maximum operating value, i.e. 125°C.  
Depending on the ambient temperature, it is possible to  
calculate the maximum power dissipation and thus the  
maximum available output current.  
Quiescent Current  
The quiescent current is the current which flows through  
the ground when the LDO operates without a load on its  
output: internal IC operation, bias etc. When the LDO  
becomes loaded, this term is called the Ground current. It is  
actually the difference between the input current (measured  
through the LDO input pin) and the output current.  
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4
MC33761  
CHARACTERIZATION CURVES  
All curves taken with Vin = Vout + 1.0 V, Vout = 2.8 V, Cout = 1.0 mF  
4.5  
4.0  
185  
−40°C  
25°C  
3.5  
3.0  
2.5  
2.0  
1.5  
1.0  
85°C  
180  
175  
170  
165  
0.5  
0
0
20  
40  
60  
80  
100  
−60 −40  
−20  
0
20  
40  
60  
80  
100  
OUTPUT CURRENT (mA)  
AMBIENT TEMPERATURE (°C)  
Figure 2. Ground Current versus  
Output Current  
Figure 3. Quiescent Current versus  
Temperature  
200  
150  
100  
2.805  
2.800  
2.795  
2.790  
2.785  
85°C  
85°C  
25°C  
40°C  
−40°C  
25°C  
0°C  
50  
0
−20°C  
−40°C  
2.780  
2.775  
0
20  
40  
60  
80  
100  
0
20  
40  
60  
80  
100  
OUTPUT CURRENT (mA)  
OUTPUT CURRENT (mA)  
Figure 4. Dropout versus Output Current  
Figure 5. Output Voltage versus  
Output Current  
180  
160  
140  
120  
100  
80  
80 mA  
60 mA  
30 mA  
60  
40  
20  
0
1.0 mA  
60  
−60 −40  
−20  
0
20  
40  
80  
100  
TEMPERATURE (°C)  
Figure 6. Dropout versus Temperature  
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5
MC33761  
APPLICATION HINTS  
Protections  
Input Decoupling  
As with any regulator, it is necessary to reduce the  
dynamic impedance of the supply rail that feeds the  
component. A 1.0 mF capacitor either ceramic or tantalum is  
recommended and should be connected close to the  
MC33761 package. Higher values will correspondingly  
improve the overall line transient response.  
The MC33761 hosts several protections, giving natural  
ruggedness and reliability to the products implementing the  
component. The output current is internally limited to a  
maximum value of 180 mA typical while temperature  
shutdown occurs if the die heats up beyond 125°C. These  
values let you assess the maximum differential voltage the  
device can sustain at a given output current before its  
protections come into play.  
Output Decoupling  
Thanks to a novel concept, the MC33761 is a stable  
component and does not require any specific Equivalent  
Series Resistance (ESR) neither a minimum output current.  
Capacitors exhibiting ESRs ranging from a few mW up to  
3.0 W can thus safely be used. The minimum decoupling  
value is 1.0 mF and can be augmented to fulfill stringent load  
transient requirements. The regulator accepts ceramic chip  
capacitors as well as tantalum devices.  
The maximum dissipation the package can handle is given  
by:  
T
* T  
Jmax  
R
A
P
+
max  
qJA  
If T  
is limited to 125°C, then the MC33761 can  
Jmax  
dissipate up to 470 mW @ 25°C. The power dissipated by  
the MC33761 can be calculated from the following formula:  
Noise Decoupling  
) ) ǒV  
Ǔ
Ptot + ǒVin  
out Ǔ  
  I  
(I  
* V  
  I  
out  
out  
gnd  
in  
Unlike other LDOs, the MC33761 is a true low−noise  
regulator. Without the need of an external bypass capacitor,  
it typically reaches the incredible level of 40 mVRMS overall  
noise between 100 Hz and 100 kHz. To give maximum  
insight on noise specifications, ON Semiconductor includes  
spectral density graphics. The classical bypass capacitor  
impacts the start−up phase of standard LDOs. However,  
thanks to its low−noise architecture, the MC33761 operates  
without a bypass element and thus offers a typical 40 ms  
start−up phase.  
or  
Ptot ) V  
  I  
out  
out  
Vin  
+
max  
I
) I  
out  
gnd  
If a 80 mA output current is needed, the ground current is  
extracted from the data−sheet curves: 4.0 mA @ 80 mA. For  
a MC33761SNT1−28 (2.8 V) delivering 80 mA and  
operating at 25°C, the maximum input voltage will then be  
8.3 V.  
Typical Applications  
The following picture portrays the typical application of  
the MC33761.  
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6
MC33761  
Dropout  
Charge  
5
4
Input  
1
Output  
Permanently  
Enables the IC  
When Closed  
2
3
+
C3  
1 mF  
+
MC33761  
C2  
1.0 mF  
R1  
100 k  
On/Off  
Figure 7. A Typical Application Schematic  
As for any low noise designs, particular care has to be  
taken when tackling Printed Circuit Board (PCB) layout.  
The figure below gives an example of a layout where stray  
inductances/capacitances are minimized. This layout is the  
basis for the MC33761 performance evaluation board. The  
BNC connectors give the user an easy and quick evaluation  
mean.  
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7
MC33761  
Understanding the Load Transient Improvement  
The MC33761 features a novel architecture which allows  
During this decreasing phase, the LDO stops the PNP bias  
and one can consider the LDO asleep (Figure 8). If by  
misfortune a current shot appears, the reaction time is  
incredibly lengthened and a strong undershoot takes place.  
This reaction is clearly not acceptable for line sensitive  
devices, such as VCOs or other Radio−Frequency parts.  
This problem is dramatically exacerbated when the output  
current drops to zero rather than a few mA. In this later case,  
the internal feedback network is the only discharge path,  
accordingly lengthening the output voltage decay period  
(Figure 9).  
The MC33761 cures this problem by implementing a  
clever design where the LDO detects the presence of the  
overshoot and forces the system to go back to steady−state  
as soon as possible, ready for the next shot. Figure 10 and 11  
show how it positively improves the response time and  
decreases the negative peak voltage.  
the user to easily implement the regulator in burst systems  
where the time between two current shots is kept very small.  
The quality of the transient response time is related to  
many parameters, among which the closed−loop bandwidth  
with the corresponding phase margin plays an important  
role. However, other characteristics also come into play like  
the series pass transistor saturation. When a current  
perturbation suddenly appears on the output, e.g. a load  
increase, the error amplifier reacts and actively biases the  
PNP transistor. During this reaction time, the LDO is in  
open−loop and the output impedance is rather high. As a  
result, the voltage brutally drops until the error amplifier  
effectively closes the loop and corrects the output error.  
When the load disappears, the opposite phenomenon takes  
place with a positive overshoot. The problem appears when  
this overshoot decays down to the LDO steady−state value.  
Figure 8. A Standard LDO Behavior when the Load  
Current Disappears  
Figure 9. A Standard LDO Behavior when the Load  
Current Appears in the Decay Zone  
Figure 10. Without Load Transient Improvement  
Figure 11. MC33761 with Load Transient Improvement  
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MC33761  
MC33761 Has a Fast Start−Up Phase  
Thanks to the lack of bypass capacitor the MC33761 is  
unacceptable level. MC33761 offers the best of both worlds  
since it no longer includes a bypass capacitor and starts in  
less than 40 ms typically (Repetitive at 200 Hz). It also  
ensures a low−noise level of 40 mVRMS 100 Hz−100 kHz.  
The following picture details the typical 33761 start−up  
phase.  
able to supply its downstream circuitry as soon as the OFF  
to ON signal appears. In a standard LDO, the charging time  
of the external bypass capacitor hampers the response time.  
A simple solution consists in suppressing this bypass  
element but, unfortunately, the noise rises to an  
Figure 12. Repetitive Start−Up Waveforms  
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9
MC33761  
TYPICAL TRANSIENT RESPONSES  
Figure 13. Output is Pulsed from 2.0 mA to 80 mA  
Figure 14. Discharge Effects from 0 to 40 mA  
Figure 15. Load Transient Improvement Effect  
Figure 16. Load Transient Improvement Effect  
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10  
MC33761  
TYPICAL TRANSIENT RESPONSES  
250  
200  
150  
100  
V
T
C
= V + 1 .0V  
= 25°C  
RMS Noise, I = 50 mA:  
20 Hz − 100 kHz: 27 mV  
20 Hz − 1.0 MHz: 30 mV  
in  
out  
O
A
= 1.0 mF  
out  
I
= 50 mA  
10 mA  
O
RMS Noise, I = 10 mA:  
20 Hz − 100 kHz: 29 mV  
20 Hz − 1.0 MHz: 31 mV  
O
50  
0
100  
1,000  
10,000  
100,000 1,000,000  
f, FREQUENCY (Hz)  
Figure 17. MC33761 Typical Noise Density Performance  
0
3.5  
−10  
I
= 1.0 mA  
3.0  
2.5  
2.0  
1.5  
1.0  
O
−20  
−30  
−40  
−50  
−60  
−70  
−80  
10 mA  
I
= 50 mA  
O
80 mA  
10 mA  
V
T
C
= V + 1.0 V  
= 25°C  
in  
O
A
0.5  
0
−90  
= 1.0 mF  
20 mA  
out  
−100  
100  
1,000  
10,000  
100,000  
1,000,000  
100  
1,000  
10,000  
100,000 1,000,000  
f, FREQUENCY (Hz)  
f, FREQUENCY (Hz)  
Figure 18. MC33761 Typical Ripple Rejection  
Performance  
Figure 19. Typical Output Impedance plot  
Cout = 1.0 mF, Vin = Vout + 1.0  
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11  
MC33761  
ORDERING INFORMATION  
Device  
Specific Marking Code  
Voltage Output  
Package  
Shipping  
MC33761SNT1−025  
MC33761SNT1−025G  
Thin SOT−23−5  
L25  
L28  
L29  
L30  
L50  
2.5 V  
Thin SOT−23−5  
(Pb−Free)  
MC33761SNT1−028  
MC33761SNT1−028G  
Thin SOT−23−5  
2.8 V  
2.9 V  
3.0 V  
5.0 V  
Thin SOT−23−5  
(Pb−Free)  
MC33761SNT1−029  
MC33761SNT1−029G  
Thin SOT−23−5  
3000 / Tape & Reel  
Thin SOT−23−5  
(Pb−Free)  
MC33761SNT1−030  
MC33761SNT1−030G  
Thin SOT−23−5  
Thin SOT−23−5  
(Pb−Free)  
MC33761SNT1−050  
MC33761SNT1−050G  
Thin SOT−23−5  
Thin SOT−23−5  
(Pb−Free)  
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging  
Specifications Brochure, BRD8011/D  
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12  
MC33761  
PACKAGE DIMENSIONS  
TSOP−5  
CASE 483−02  
ISSUE F  
NOTES:  
1. DIMENSIONING AND TOLERANCING PER  
ASME Y14.5M, 1994.  
2. CONTROLLING DIMENSION: MILLIMETERS.  
3. MAXIMUM LEAD THICKNESS INCLUDES  
LEAD FINISH THICKNESS. MINIMUM LEAD  
THICKNESS IS THE MINIMUM THICKNESS  
OF BASE MATERIAL.  
4. DIMENSIONS A AND B DO NOT INCLUDE  
MOLD FLASH, PROTRUSIONS, OR GATE  
BURRS.  
5. OPTIONAL CONSTRUCTION: AN  
ADDITIONAL TRIMMED LEAD IS ALLOWED  
IN THIS LOCATION. TRIMMED LEAD NOT TO  
EXTEND MORE THAN 0.2 FROM BODY.  
NOTE 5  
5X  
D
0.20 C A B  
2X  
2X  
0.10  
T
T
M
5
4
3
0.20  
B
S
1
2
K
L
DETAIL Z  
G
A
MILLIMETERS  
DIM  
A
B
MIN  
3.00 BSC  
1.50 BSC  
MAX  
DETAIL Z  
J
C
D
G
H
J
K
L
M
S
0.90  
0.25  
0.95 BSC  
1.10  
0.50  
C
SEATING  
PLANE  
0.05  
H
0.01  
0.10  
0.20  
1.25  
0
0.10  
0.26  
0.60  
1.55  
T
10  
3.00  
_
_
2.50  
SOLDERING FOOTPRINT*  
1.9  
0.074  
0.95  
0.037  
2.4  
0.094  
1.0  
0.039  
0.7  
0.028  
mm  
inches  
ǒ
Ǔ
SCALE 10:1  
*For additional information on our Pb−Free strategy and soldering  
details, please download the ON Semiconductor Soldering and  
Mounting Techniques Reference Manual, SOLDERRM/D.  
ON Semiconductor and  
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice  
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability  
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.  
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All  
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights  
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications  
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should  
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,  
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death  
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal  
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.  
PUBLICATION ORDERING INFORMATION  
LITERATURE FULFILLMENT:  
N. American Technical Support: 800−282−9855 Toll Free  
USA/Canada  
ON Semiconductor Website: http://onsemi.com  
Order Literature: http://www.onsemi.com/litorder  
Literature Distribution Center for ON Semiconductor  
P.O. Box 5163, Denver, Colorado 80217 USA  
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada  
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada  
Email: orderlit@onsemi.com  
Japan: ON Semiconductor, Japan Customer Focus Center  
2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051  
Phone: 81−3−5773−3850  
For additional information, please contact your  
local Sales Representative.  
MC33761/D  

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