MC33762DM-3030R2G [ONSEMI]
DUAL OUTPUT, FIXED POSITIVE LDO REGULATOR, PDSO8, LEAD FREE, MICROPAK-8;
| 型号： | MC33762DM-3030R2G |
| 厂家： | 
ONSEMI |
| 描述： | DUAL OUTPUT, FIXED POSITIVE LDO REGULATOR, PDSO8, LEAD FREE, MICROPAK-8 线性稳压器IC 调节器 电源电路 光电二极管 输出元件 |
| 文件： | 总16页 (文件大小：208K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MC33762
Dual Ultra Low−Noise Low
Dropout Voltage Regulator
with 1.0 V ON/OFF Control
The MC33762 is a dual Low DropOut (LDO) regulator featuring
excellent noise performances. Thanks to its innovative design, the
circuit reaches an impressive 40 µVRMS noise level without an
external bypass capacitor. Housed in a small µ8 package, it represents
the ideal designer’s choice when space and noise are at premium.
The absence of external bandgap capacitor accelerates the response
time to a wake−up signal and keeps it within 40 µs, making the
MC33762 as a natural candidate for portable applications.
The MC33762 also hosts a novel architecture which prevents
excessive undershoots in the presence of fast transient bursts, as in any
bursting systems.
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8
1
Micro8t
DM SUFFIX
CASE 846A
Finally, with a static line regulation better than −75 dB, it naturally
shields the downstream electronics from choppy lines.
Features
• Nominal Output Current of 80 mA with a 100 mA Peak Capability
• Ultra−Low Noise: 150 nV/√Hz @ 100 Hz, 40 µVRMS
PIN CONFIGURATION AND
MARKING DIAGRAM
100 Hz−100 kHz Typical, I = 60 mA, Co = 1.0 µF
out
• Fast Response Time from OFF to ON: 40 µs Typical
• Ready for 1.0 V Platforms: ON with a 900 mV High Level
• Typical Dropout of 90 mV @ 30 mA, 160 mV @ 80 mA
• Ripple Rejection: 70 dB @ 1.0 kHz
Gnd1
En1
V
8
7
6
5
1
2
3
4
out1
V
V
CC1
Gnd2
En2
out2
V
CC2
• 1.5% Output Precision @ 25°C
(Top View)
• Thermal Shutdown
xxxx = Version
= Year
WW = Work Week
• V Available at 2.5 V, 2.8 V, and 3.0 V
out
Y
• Separate Dice for Each Regulator Provides Maximum Isolation
Between Regulators
• Operating Range from −40 to +85°C
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 14 of this data sheet.
Applications
• Noise Sensitive Circuits: VCOs RF Stages, etc.
• Bursting Systems (TDMA Phones)
• All Battery Operated Devices
Semiconductor Components Industries, LLC, 2003
1
Publication Order Number:
July, 2003 − Rev. 4
MC33762/D
MC33762
V
CC1
7
EN1
On/Off
Thermal
Shutdown
2
Band Gap
Reference
V
out
8
5
*Current Limit
*Antisaturation Protection
*Load Transient Improvement
1
4
GND1
EN2
V
CC2
On/Off
Thermal
Shutdown
Band Gap
Reference
V
out
6
*Current Limit
*Antisaturation Protection
*Load Transient Improvement
3
GND2
Figure 1. Simplified Block Diagram
PIN FUNCTION DESCRIPTIONS
Pin #
Pin Name
Gnd1
En1
Function
Description
1
2
3
4
5
6
7
8
Ground of the 1st LDO
Enables the 1st LDO
Ground of the 2nd LDO
Enables the 2nd LDO
A 900 mV level on this pin is sufficient to start this LDO. A 150 mV shuts it down.
Gnd2
En2
A 900 mV level on this pin is sufficient to start this LDO. A 150 mV shuts it down.
This pin brings the power to the 1st LDO and requires adequate decoupling.
This pin requires a 1.0 µF output capacitor to be stable.
V
cc2
2nd LDO V pin
cc
V
out2
Shuts or wakes−up the IC
V
cc1
1st LDO V pin
This pin brings the power to the 1st LDO and requires adequate decoupling.
This pin requires a 1.0 µF output capacitor to be stable.
cc
V
out1
Delivers the output voltage
MAXIMUM RATINGS
Value
Rating
Pin #
1
Symbol
Min
−
Max
Unit
V
Power Supply Voltage
V
in
12
ESD Capability, HBM Model
All Pins
All Pins
−
−
−
1.0
200
kV
V
ESD Capability, Machine Model
−
−
Maximum Power Dissipation
NW Suffix, Plastic Package
P
D
−
Internally Limited
W
Thermal Resistance Junction−to−Air
−
R
−
240
°C/W
q
J−A
Operating Ambient Temperature
Maximum Junction Temperature (Note 1)
Maximum Operating Junction Temperature (Note 2)
−
−
−
T
−
−
−
−40 to +85
150
°C
°C
°C
A
T
Jmax
T
125
J
Storage Temperature Range
−
T
stg
−
−60 to +150
°C
1. Internally limited by shutdown.
2. Specifications are guaranteed below this value.
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MC33762
ELECTRICAL CHARACTERISTICS
(For typical values T = 25°C, for min/max values T = −40°C to +85°C, max T = 125°C unless otherwise noted)
A
A
J
Characteristics
Pin #
Symbol
Min
Typ
Max
Unit
Logic Control Specifications
Input Voltage Range
2−4
2−4
2−4
V
R
V
0
−
−
V
V
ON/OFF
ON/OFF
ON/OFF
in
ON/OFF Input Resistance (all versions)
250
−
kW
mV
ON/OFF Control Voltages (Note 3)
Logic Zero, OFF State, I = 50 mA
−
900
−
−
150
−
O
Logic One, ON State, I = 50 mA
O
Currents Parameters
Current Consumption in OFF State (all versions)
−
−
−
−
IQ
−
−
0.1
180
800
180
2.0
−
mA
mA
mA
mA
OFF
OFF Mode Current: V = V + 1.0 V, I = 0, V
= 150 mV
in
out
O
OFF
Current Consumption in ON State (all versions)
ON Mode Current: V = V + 1.0 V, I = 0, V = 3.5 V
IQ
ON
SAT
in
out
O
ON
Current Consumption in ON State (all versions), ON Mode
IQ
−
−
Saturation Current: V = V − 0.5 V, No Output Load
in
out
Current Limit V = Vout
+ 1.0 V,
I
100
−
in
nom
MAX
Output is brought to Vout
− 0.3 V (all versions)
nom
Output Voltages
V
out
+ 1.0 V < V < 6.0 V, T = 25°C, 1.0 mA < I < 80 mA
5−7
V
out
2.462
2.5
2.537
V
in
A
out
2.5 V
2.8 V
3.0 V
3.3 V
3.6 V
5−7
5−7
5−7
5−7
5−7
5−7
V
2.758
2.955
3.250
3.546
−1.5
2.8
3.0
3.3
3.6
X
2.842
3.045
3.349
3.654
+1.5
V
V
V
V
%
V
out
V
out
V
out
V
out
Other Voltages up to 5.0 V Available in 50 mV Increment Steps
+ 1.0 V < V < 6.0 V, T = −40°C to +85°C, 1.0 mA < I < 80 mA
V
out
V
V
out
2.425
2.5
2.575
out
in
A
out
2.5 V
2.8 V
3.0 V
3.3 V
3.6 V
5−7
5−7
5−7
5−7
5−7
V
2.716
2.91
2.8
3.0
3.3
3.6
X
2.884
3.090
3.399
3.708
+3.0
V
V
V
V
%
out
V
out
V
out
3.201
3.492
−3.0
V
out
Other Voltages up to 5.0 V Available in 50 mV Increment Steps
Line and Load Regulation, Dropout Voltages
Line Regulation (all versions)
V
out
5−7
5−7
Reg
−
−
−
−
20
40
mV
mV
mV
line
V
out
+ 1.0 V < V < 12 V, I = 80 mA
in out
Load Regulation (all versions)
= V + 1.0 V, C = 1.0 mF, I = 1.0 to 80 mA
Reg
load
V
in
out
out
out
Dropout Voltage (all versions) (Note 3)
I
I
I
= 30 mA
= 60 mA
= 80 mA
5−7
5−7
5−7
V −V
−
−
−
90
140
160
150
200
250
out
out
out
in out
V −V
in out
V −V
in out
3. Voltage slope should be greater than 2.0 mV/ms
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MC33762
ELECTRICAL CHARACTERISTICS (continued)
(For typical values T = 25°C, for min/max values T = −40°C to +85°C, max T = 125°C unless otherwise noted)
A
A
J
Characteristics
Pin #
Symbol
Min
Typ
Max
Unit
Dynamic Parameters
Ripple Rejection (all versions)
= V + 1.0 V + 1.0 kHz 100 mVpp Sinusoidal Signal
5−7
5−7
5−7
5−7
Ripple
−
−
−
−
−
−70
150
35
−
−
−
−
dB
V
in
out
Output Noise Density @ 1.0 kHz
nV/
√Hz
RMS Output Noise Voltage (all versions)
Noise
mV
C
= 1.0 mF, I = 50 mA, F = 100 Hz to 1.0 MHz
out
out
Output Rise Time (all versions) C = 1.0 mF, I = 50 mA,
t
40
ms
out
out
rise
10% of Rising ON Signal to 90% of Nominal V
out
Thermal Shutdown
Thermal Shutdown (all versions)
−
−
−
−
125
°C
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MC33762
DEFINITIONS
Load Regulation
Line Regulation
The change in output voltage for a change in output
current at a constant chip temperature.
The change in output voltage for a change in input voltage.
The measurement is made under conditions of low
dissipation or by using pulse technique such that the average
chip temperature is not significantly affected. One usually
distinguishes static line regulation or DC line regulation (a
DC step in the input voltage generates a corresponding step
in the output voltage) from ripple rejection or audio
susceptibility where the input is combined with a frequency
generator to sweep from a few hertz up to a defined
boundary while the output amplitude is monitored.
Dropout Voltage
The input/output differential at which the regulator output
no longer maintains regulation against further reductions in
input voltage. Measured when the output drops 100 mV
below its nominal value (which is measured at 1.0 V
differential value). The dropout level is affected by the chip
temperature, load current and minimum input supply
requirements.
Thermal Protection
Output Noise Voltage
Internal thermal shutdown circuitry is provided to protect
the integrated circuit in the event that the maximum junction
temperature is exceeded. When activated at typically 125°C,
the regulator turns off. This feature is provided to prevent
catastrophic failures from accidental overheating.
This is the integrated value of the output noise over a
specified frequency range. Input voltage and output current
are kept constant during the measurement. Results are
expressed in µVRMS.
Maximum Power Dissipation
The maximum total dissipation for which the regulator
will operate within its specs.
Maximum Package Power Dissipation
The maximum power package power dissipation is the
power dissipation level at which the junction temperature
reaches its maximum operating value, i.e. 125°C.
Depending on the ambient temperature, it is possible to
calculate the maximum power dissipation and thus the
maximum available output current.
Quiescent Current
The quiescent current is the current which flows through
the ground when the LDO operates without a load on its
output: internal IC operation, bias etc. When the LDO
becomes loaded, this term is called the Ground current. It is
actually the difference between the input current (measured
through the LDO input pin) and the output current.
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MC33762
Characterization Curves
Curves are Common to Both Regulators
4.5
4.0
185
−40°C
25°C
3.5
3.0
2.5
2.0
1.5
1.0
85°C
180
175
170
165
0.5
0
0
20
40
60
80
100
−60 −40
−20
0
20
40
60
80
100
OUTPUT CURRENT (mA)
AMBIENT TEMPERATURE (°C)
Figure 2. Ground Current versus
Output Current
Figure 3. Quiescent Current versus
Temperature
200
150
100
2.805
2.800
2.795
2.790
2.785
85°C
85°C
25°C
40°C
−40°C
25°C
0°C
50
0
−20°C
−40°C
2.780
2.775
0
20
40
60
80
100
0
20
40
60
80
100
OUTPUT CURRENT (mA)
OUTPUT CURRENT (mA)
Figure 4. Dropout versus Output Current
Figure 5. Output Voltage versus
Output Current
180
160
140
80 mA
60 mA
120
100
80
30 mA
60
40
20
0
1.0 mA
60
−60 −40
−20
0
20
40
80
100
TEMPERATURE (°C)
Figure 6. Dropout versus Temperature
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MC33762
APPLICATION HINTS
Protections
Input Decoupling
As with any regulator, it is necessary to reduce the
dynamic impedance of the supply rail that feeds the
component. A 1.0 µF capacitor either ceramic or tantalum
is recommended and should be connected close to the
MC33762 package. Higher values will correspondingly
improve the overall line transient response.
The MC33762 hosts several protections, giving natural
ruggedness and reliability to the products implementing the
component. The output current is internally limited to a
maximum value of 180 mA typical while temperature
shutdown occurs if the die heats up beyond 125°C. These
values let you assess the maximum differential voltage the
device can sustain at a given output current before its
protections come into play.
Output Decoupling
Thanks to a novel concept, the MC33762 is a stable
component and does not require any specific Equivalent
Series Resistance (ESR) neither a minimum output current.
Capacitors exhibiting ESRs ranging from a few mW up to
3.0 W can thus safely be used. The minimum decoupling
value is 1.0 µF and can be augmented to fulfill stringent load
transient requirements. The regulator accepts ceramic chip
capacitors as well as tantalum devices.
The maximum dissipation the package can handle is given
by:
T
* T
Jmax
R
A
P
+
max
qJA
If T
is limited to 125°C, then the MC33762 can
Jmax
dissipate up to 395 mW @ 25°C. The power dissipated by
the MC33762 can be calculated from the following formula:
Noise Performances
) ) ǒV
Ǔ
Ptot + ǒVin
out Ǔ
I
(I
gnd
* V
I
out
out
in
Unlike other LDOs, the MC33762 is a true low−noise
regulator. Without the need of an external bypass capacitor,
it typically reaches the incredible level of 40 µVRMS
overall noise between 100 Hz and 100 kHz. To give
maximum insight on noise specifications, ON
Semiconductor includes spectral density graphics. The
classical bypass capacitor impacts the start−up phase of
standard LDOs. However, thanks to its low−noise
architecture, the MC33762 operates without a bypass
element and thus offers a typical 40 µs start−up phase.
or
Ptot ) V
I
out
out
Vin
+
max
I
) I
out
gnd
If a 80 mA output current is needed, the ground current is
extracted from the data−sheet curves: 4.0 mA @ 80 mA. For
a half 2.8 V MC33762 (2.8 V) operating at 25°C, the
maximum input voltage will then be 7.3 V.
Typical Applications
The following picture portrays the typical application of
the MC33762.
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MC33762
Input
8
7
6
5
1
2
3
4
Output 1
Output 2
MC33762
+
C3
+
+
Regulator 1
On/Off
Regulator 2
1.0 mF
C1
C2
1.0 mF 1.0 mF
R1
100 k
R2
100 k
On/Off
Figure 7. A Typical Application Schematic
As for any low noise designs, particular care has to be
taken when tackling Printed Circuit Board (PCB) layout.
Connections shall be kept short and wide. Layout example
as given in the MC33761 application hints can be used as a
starting basis.
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MC33762
Understanding the Load Transient Improvement
The MC33762 features a novel architecture which allows
During this decreasing phase, the LDO stops the PNP bias
and one can consider the LDO asleep (Figure 8). If by
misfortune a current shot appears, the reaction time is
incredibly lengthened and a strong undershoot takes place.
This reaction is clearly not acceptable for line sensitive
devices, such as VCOs or other Radio−Frequency parts.
This problem is dramatically exacerbated when the output
current drops to zero rather than a few mA. In this later case,
the internal feedback network is the only discharge path,
accordingly lengthening the output voltage decay period
(Figure 9).
The MC33762 cures this problem by implementing a
clever design where the LDO detects the presence of the
overshoot and forces the system to go back to steady−state
as soon as possible, ready for the next shot. Figure 10 and 11
show how it positively improves the response time and
decreases the negative peak voltage.
the user to easily implement the regulator in burst systems
where the time between two current shots is kept very small.
The quality of the transient response time is related to
many parameters, among which the closed−loop bandwidth
with the corresponding phase margin plays an important
role. However, other characteristics also come into play like
the series pass transistor saturation. When a current
perturbation suddenly appears on the output, e.g. a load
increase, the error amplifier reacts and actively biases the
PNP transistor. During this reaction time, the LDO is in
open−loop and the output impedance is rather high. As a
result, the voltage brutally drops until the error amplifier
effectively closes the loop and corrects the output error.
When the load disappears, the opposite phenomenon takes
place with a positive overshoot. The problem appears when
this overshoot decays down to the LDO steady−state value.
Figure 8. A Standard LDO Behavior when the Load
Current Disappears
Figure 9. A Standard LDO Behavior when the Load
Current Appears in the Decay Zone
Figure 10. Without Load Transient Improvement
Figure 11. MC33762 with Load Transient Improvement
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MC33762
MC33762 Has a Fast Start−Up Phase
Thanks to the lack of bypass capacitor the MC33762 is
unacceptable level. MC33762 offers the best of both worlds
since it no longer includes a bypass capacitor and starts in
less than 40 µs typically (Repetitive at 200 Hz). It also
ensures an incredible low−noise level of 40 µVRMS
100 Hz−100 kHz. The following picture details the typical
33762 startup phase.
able to supply its downstream circuitry as soon as the OFF
to ON signal appears. In a standard LDO, the charging time
of the external bypass capacitor hampers the response time.
A simple solution consists in suppressing this bypass
element but, unfortunately, the noise rises to an
Figure 12. Repetitive Start−Up Waveforms
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MC33762
TYPICAL TRANSIENT RESPONSES
Figure 13. Output is Pulsed from 2.0 mA to 80 mA
Figure 14. Discharge Effects from 0 to 40 mA
Figure 15. Load Transient Improvement Effect
Figure 16. Load Transient Improvement Effect
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MC33762
TYPICAL TRANSIENT RESPONSES
250
200
150
100
V
= V + 1.0 V
out
RMS Noise, I = 50 mA:
20 Hz − 100 kHz: 27 mV
20 Hz − 1.0 MHz: 30 mV
in
O
T = 25°C
A
C
= 1.0 mF
out
I
O
= 50 mA
10 mA
RMS Noise, I = 10 mA:
20 Hz − 100 kHz: 29 mV
20 Hz − 1.0 MHz: 31 mV
O
50
0
100
1,000
10,000
100,000 1,000,000
f, FREQUENCY (Hz)
Figure 17. MC33762 Typical Noise Density Performance
0
3.5
−10
I
= 1.0 mA
3.0
2.5
2.0
1.5
1.0
O
−20
−30
−40
−50
−60
−70
−80
10 mA
I
O
= 50 mA
80 mA
10 mA
V
= V + 1.0 V
O
in
T = 25°C
A
0.5
0
−90
C
= 1.0 mF
20 mA
out
−100
100
1,000
10,000
100,000
1,000,000
100
1,000
10,000
100,000 1,000,000
f, FREQUENCY (Hz)
f, FREQUENCY (Hz)
Figure 18. MC33762 Typical Ripple Rejection
Performance
Figure 19. Output Impedance Plot
out = 1.0 mF, Vin = Vout + 1.0 V
C
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MC33762
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS
Surface mount board layout is a critical portion of the total
design. The footprint for the semiconductor packages must be
the correct size to ensure proper solder connection interface
between the board and the package. With the correct pad
geometry, the packages will self−align when subjected to a
solder reflow process.
0.041
1.04
0.208
5.28
0.126
3.20
0.015
0.38
0.0256
0.65
inches
mm
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MC33762
ORDERING INFORMATION
Part Number
Voltage Output
Marking
2525
Package
Micro8
Micro8
Micro8
Shipping
MC33762DM−2525R2
MC33762DM−2828R2
MC33762DM−3030R2
2.5 V & 2.5 V
2.8 V & 2.8 V
3.0 V & 3.0 V
4000 Units / Tape & Reel
4000 Units / Tape & Reel
4000 Units / Tape & Reel
2828
3030
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MC33762
PACKAGE DIMENSIONS
Micro8
PLASTIC PACKAGE
CASE 846A−02
ISSUE F
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
−A−
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD FLASH,
PROTRUSIONS OR GATE BURRS. MOLD FLASH,
PROTRUSIONS OR GATE BURRS SHALL NOT
EXCEED 0.15 (0.006) PER SIDE.
−B−
K
4. DIMENSION B DOES NOT INCLUDE INTERLEAD
FLASH OR PROTRUSION. INTERLEAD FLASH OR
PROTRUSION SHALL NOT EXCEED 0.25 (0.010)
PER SIDE.
5. 846A−01 OBSOLETE, NEW STANDARD 846A−02.
PIN 1 ID
G
MILLIMETERS
INCHES
D 8 PL
DIM MIN
MAX
3.10
3.10
1.10
MIN
MAX
0.122
0.122
0.043
0.016
M
S
S
0.08 (0.003)
T
B
A
A
B
C
D
G
H
J
2.90
2.90
−−−
0.114
0.114
−−−
0.25
0.40 0.010
0.65 BSC
0.026 BSC
SEATING
PLANE
0.05
0.13
4.75
0.40
0.15 0.002
0.23 0.005
5.05 0.187
0.70 0.016
0.006
0.009
0.199
0.028
−T−
C
0.038 (0.0015)
K
L
L
J
H
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MC33762
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make
changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any
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liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be
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arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that
SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.
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MC33762/D
相关型号：
MC33765DTBR2
Fixed Positive LDO Regulator, 5 Output, 2.8V1, 2.8V2, BIPolar, PDSO16, PLASTIC, TSSOP-16
MOTOROLA
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