MC34080BDR2 [ONSEMI]
OP-AMP, 4000uV OFFSET-MAX, 16MHz BAND WIDTH, PDSO8, PLASTIC, SO-8;
| 型号： | MC34080BDR2 |
| 厂家： | 
ONSEMI |
| 描述： | OP-AMP, 4000uV OFFSET-MAX, 16MHz BAND WIDTH, PDSO8, PLASTIC, SO-8 放大器 光电二极管 |
| 文件： | 总16页 (文件大小：282K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Order this document by MC34080/D
t
HIGH PERFORMANCE
JFET INPUT
OPERATIONAL AMPLIFIERS
These devices are a new generation of high speed JFET input monolithic
operational amplifiers. Innovative design concepts along with JFET
technology provide wide gain bandwidth product and high slew rate.
Well–matched JFET input devices and advanced trim techniques ensure low
input offset errors and bias currents. The all NPN output stage features large
output voltage swing, no deadband crossover distortion, high capacitive
drive capability, excellent phase and gain margins, low open loop output
impedance, and symmetrical source/sink AC frequency response.
This series of devices is available in fully compensated or
8
decompensated (A ≤2) and is specified over a commercial temperature
VCL
8
1
range. They are pin compatible with existing Industry standard operational
amplifiers, and allow the designer to easily upgrade the performance of
existing designs.
1
P SUFFIX
PLASTIC PACKAGE
CASE 626
D SUFFIX
PLASTIC PACKAGE
CASE 751
• Wide Gain Bandwidth: 8.0 MHz for Fully Compensated Devices
(SO–8)
Wide Gain Bandwidth: 16 MHz for Decompensated Devices
PIN CONNECTIONS
• High Slew Rate: 25 V/µs for Fully Compensated Devices
High Slew Rate: 50 V/µs for Decompensated Devices
12
1
2
3
4
8
Offset Null
Inv. Input
NC
• High Input Impedance: 10
Ω
–
+
7
6
5
V
• Input Offset Voltage: 0.5 mV Maximum (Single Amplifier)
• Large Output Voltage Swing: –14.7 V to +14 V for
CC
Noninv. Input
Output
V
Offset Null
Large Output Voltage Swing: V /V
CC EE
= ±15 V
EE
• Low Open Loop Output Impedance: 30 Ω @ 1.0 MHz
• Low THD Distortion: 0.01%
(Single, Top View)
1
2
3
4
8
7
6
5
V
CC
Output 2
Output 1
Inputs 1
• Excellent Phase/Gain Margins: 55°/7.6 dB for Fully Compensated
Devices
–
+
–
+
Inputs 2
V
EE
ORDERING INFORMATION
(Dual, Top View)
Fully
Compen-
sated
Operating
Temperature
Range
Op Amp
Function
A
≥2
VCL
Compensated
MC34080BD
MC34080BP
MC34083BP
Package
SO–8
MC34081BD
MC34081BP
MC34082P
Single
Dual
T
= 0° to +70°C
T = 0° to +70°C
A
Plastic DIP
Plastic DIP
SO–16L
A
16
14
1
1
MC34084DW MC34085BDW
Quad
P SUFFIX
DW SUFFIX
MC34084P
MC34085BP
Plastic DIP
PLASTIC PACKAGE
CASE 646
PLASTIC PACKAGE
CASE 751G
(SO–16L)
PIN CONNECTIONS
1
16
Output 1
Output 4
Output 1
Inputs 1
1
2
3
4
14
13
12
11
10
9
Output 4
2
Inputs 1
3
15
–
–
+
–
+
Inputs 4
–
+
+
Inputs 4
14
13
12
11
10
1
4
3
1
4
3
4
V
V
CC
EE
V
V
CC
EE
Inputs 3
Output 3
5
+
–
+
–
5
+
–
+
–
Inputs 2
6
Inputs 3
Inputs 2
Output 2
2
2
6
7
Output 2
NC
7
8
Output 3
NC
8
9
(Quad, Top View)
Motorola, Inc. 1996
Rev 0
MC34080 thru MC34085
MAXIMUM RATINGS
Rating
Supply Voltage (from V
Symbol
Value
+44
Unit
V
to V
)
V
S
CC
EE
Input Differential Voltage Range
Input Voltage Range
V
(Note 1)
(Note 1)
Indefinite
0 to +70
+125
V
IDR
V
V
IR
Output Short Circuit Duration (Note 2)
Operating Ambient Temperature Range
Operating Junction Temperature
Storage Temperature Range
t
sec
°C
°C
°C
SC
T
A
T
J
T
– 65 to +165
stg
NOTES: 1. Either or both input voltages must not exceed the magnitude of V
or V
.
EE
CC
2. Power dissipation must be considered to ensure maximum junction temperature
(T ) is not exceeded.
J
Representative Schematic Diagram
(Each Amplifier)
V
CC
200
µA
50
µA
850
µA
Q1
D1
Q6
R1
240
18
–
+
J1
J2
Output
R
Inputs
SC
700
R2
5.0
pF
D2
C
C
+
Q7
20
pF
C
M
C
F
Q8
+
3.0
pF
Q5
Q2
Q3
R3
1.0 k
R4
1.0 k
Q4
Q10
Q9
D3
500
R6
500
Ω
50 µA
Q11
R7
66 k
D4
100
µA
300 µA
V
EE
RM
1
5
Null Adjust
(MC34080, 081)*
*Pins 1 & 5 (MC34080,081) should not be directly grounded or connected to V
.
CC
2
MOTOROLA ANALOG IC DEVICE DATA
MC34080 thru MC34085
DC ELECTRICAL CHARACTERISTICS (V
CC
= +15 V, V
= – 15 V, T = T
to T
[Note 3], unless otherwise noted.)
EE
A
low
high
Characteristics
Symbol
Min
Typ
Max
Unit
Input Offset Voltage (Note 4)
Single
V
IO
mV
T
= +25°C
—
—
0.5
—
2.0
4.0
A
T
= 0° to +70°C (MC34080B, MC34081B)
A
Dual
T
= +25°C
—
—
1.0
—
3.0
5.0
A
T
= 0° to +70°C (MC34082, MC34083)
A
Quad
T
T
A
= +25°C
—
—
6.0
—
12
14
A
= 0° to +70°C (MC34084, MC34085)
Average Temperature Coefficient of Offset Voltage
∆V /∆T
IO
—
10
—
µV/°C
Input Bias Current (V = 0 Note 5)
I
IB
CM
—
—
0.06
—
T
T
= +25°C
= 0° to +70°C
0.2
4.0
nA
A
A
Input Offset Current (V
= 0 Note 5)
I
IO
CM
—
—
0.02
—
0.1
2.0
T
T
= +25°C
= 0° to +70°C
nA
A
A
Large Signal Voltage Gain (V = ±10 V, R = 2.0 k)
A
VOL
V/mV
O
L
T
T
A
= +25°C
25
15
80
—
—
—
A
= T
to T
low
high
Output Voltage Swing
V
OH
V
13.2
13.4
13.4
13.7
13.9
—
—
—
—
R
R
R
= 2.0 k, T = +25°C
A
L
L
L
= 10 k, T = +25°C
A
= 10 k, T = T
T
A
low to high
R
R
R
= 2.0 k, T = +25°C
V
OL
—
—
—
–14.1 –13.5
–14.7 –14.1
L
L
L
A
= 10 k, T = +25°C
A
= 10 k, T = T
T
—
–14.0
A
low to high
Output Short Circuit Current (T = +25°C)
Input Overdrive = 1.0 V, Output to Ground
I
mA
V
A
SC
20
20
31
28
—
—
Source
Sink
Input Common Mode Voltage Range
V
(V
+4.0) to
– 2.0)
ICR
EE
T
A
= +25°C
(V
CC
Common Mode Rejection Ratio (R ≤ 10 k, T = +25°C)
CMRR
PSRR
70
70
90
—
—
dB
dB
S
A
Power Supply Rejection Ratio (R = 100 Ω, T = 25°C)
86
S
A
Power Supply Current
Single
I
D
mA
T
= +25°C
—
—
2.5
—
3.4
4.2
A
T
= T
to T
A
low
high
high
high
Dual
T
= +25°C
—
—
4.9
—
6.0
7.5
A
T
= T
to T
A
low
Quad
T
= +25°C
—
—
9.7
—
11
13
A
T
= T
to T
low
A
NOTES: (continued)
3. T
=
0°C for MC34080B
0°C for MC34081B
0°C for MC34084
0°C for MC34085
T
= +70°C for MC34080B
+70°C for MC34081B
+70°C for MC34084
+70°C for MC34085
low
high
4. See application information for typical changes in input offset voltage due to solderability and temperature cycling.
5. Limits at T = +25°C are guaranteed by high temperature (T
) testing.
A
high
3
MOTOROLA ANALOG IC DEVICE DATA
MC34080 thru MC34085
AC ELECTRICAL CHARACTERISTICS (V
CC
= +15 V, V
= – 15 V, T = +25°C, unless otherwise noted.)
EE A
Characteristics
Symbol
Min
Typ
Max
Unit
Slew Rate (V = –10 V to +10 V, R = 2.0 kΩ, C = 100 pF)
SR
V/µs
in
L
L
Compensated
A
A
V
V
A
= +1.0
= –1.0
V
20
—
35
—
25
30
50
50
—
—
—
—
Decompensated A = +2.0
= –1.0
V
Settling Time (10 V Step, A = –1.0)
t
s
µs
V
1
To 0.10% (± / LSB of 9–Bits)
—
—
0.72
1.6
—
—
2
2
1
To 0.01% (± / LSB of 12–Bits)
Gain Bandwidth Product (f = 200 kHz)
Compensated
Decompensated
GBW
BWp
MHz
kHz
6.0
12
8.0
16
—
—
Power Bandwidth (R = 2.0 k, V = 20 V , THD = 5.0%)
L
O
pp
Compensated A = +1.0
V
—
—
400
800
—
—
Decompensated A = – 1.0
V
Phase Margin (Compensated)
φ
m
De-
grees
R
R
= 2.0 k
= 2.0 k, C = 100 pF
—
—
55
39
—
—
L
L
L
Gain Margin (Compensated)
A
m
dB
R
R
= 2.0 k
= 2.0 k, C = 100 pF
—
—
7.6
4.5
—
—
L
L
L
Equivalent Input Noise Voltage
= 100 Ω, f = 1.0 kHz
e
I
—
30
—
nV/√Hz
n
R
S
Equivalent Input Noise Current (f = 1.0 kHz)
—
0.01
5.0
—
pA/√Hz
n
Input Capacitance
C
—
—
—
—
—
—
pF
Ω
i
12
10
Input Resistance
r
i
Total Harmonic Distortion
THD
0.05
%
A
V
= +10, R = 2.0 k, 2.0 ≤ V ≤ 20 V , f = 10 kHz
L
O
pp
Channel Separation (f = 10 kHz)
Open Loop Output Impedance (f = 1.0 MHz)
—
—
—
120
35
—
—
dB
Z
o
Ω
Figure 1. Input Common Mode Voltage Range
versus Temperature
Figure 2. Input Bias Current
versus Temperature
0
100 k
10 k
1.0 k
100
10
V
∆
/V
=
±
3.0 V to
±22 V
V
/V = ±15 V
CC EE
CC EE
V
CC
V
= 5.0 mA
V
= 0 V
IO
CM
–1.0
3.0
2.0
1.0
0
V
EE
1.0
–55
–25
0
25
50
75
C)
100
125
–55
–25
0
25
50
75
C)
100
125
T , AMBIENT TEMPERATURE (
°
T , AMBIENT TEMPERATURE (
°
A
A
4
MOTOROLA ANALOG IC DEVICE DATA
MC34080 thru MC34085
Figure 3. Input Bias Current versus
Input Common Mode Voltage
Figure 4. Output Voltage Swing
versus Supply Voltage
50
40
140
120
V
T
/V = ±15 V
= 25°C
CC EE
A
R
T
Connected to Ground
L
A
= 25
°C
100
80
30
R
= 2.0 k
R
= 10 k
L
L
20
10
0
60
40
20
–12
–8.0
V
–4.0
0
4.0
8.0
12
0
±5.0
±
10
|V |, SUPPLY VOLTAGE (V)
CC EE
±
15
±20
±25
, INPUT COMMON MODE VOLTAGE (V)
V
IC
Figure 5. Output Saturation versus
Load Current
Figure 6. Output Saturation vesus
Load Resistance to Ground
0
0
–2.0
–4.0
2.0
1.0
0
V
V
CC
CC
–1.0
Source
V
T
/V = ±15 V
= 25°C
CC EE
A
V
T
/V = +15 V to +22 V
= 25°C
CC EE
A
–2.0
–3.0
Sink
1.0
0
V
V
EE
EE
0
4.0
8.0
I , LOAD CURRENT (
12
16
300
3.0 k
30 k
300 k
±mA)
R , LOAD RESISTANCE TO GROUND (Ω)
L
L
Figure 7. Output Saturation versus
Load Resistance to V
Figure 8. Output Short Circuit Current
versus Temperature
CC
40
0
V
CC
–0.4
Source
Sink
30
–0.8
2.0
1.0
0
20
10
V
R
T
/V
= +15 V
to V
CC
CC EE
L
A
V
R
∆
/V
=
Ω
±
15 V
CC EE
≤
0.1
= 1.0 V
L
= 25°C
V
in
V
EE
0
–55
300
3.0 k
30 k
300 k
–25
0
25
50
75
C)
100
125
R , LOAD RESISTANCE TO V
CC
(
Ω)
T , AMBIENT TEMPERATURE (
°
L
A
5
MOTOROLA ANALOG IC DEVICE DATA
MC34080 thru MC34085
Figure 9. Output Impedance versus Frequency
Figure 10. Output Impedance versus Frequency
80
60
40
80
60
V
V
V
∆
/V = ±15 V
V
V
V
/V
=
±
15 V
CC EE
CC EE
= 0
= 0
= 0
CM
CM
= 0
O
O
I
= ±0.5 mA
= 25°C
∆
I
= ±0.5 mA
O
O
T
T
= 25°C
A
A
Compensated
Units Only
Decompensated
Units Only
40
20
0
20
0
A
= 1.0
V
A
= 1000
A = 100
V
V
A
= 10
A
= 100
A
= 1000
A
= 10
V
V
V
V
A
= 2.0
V
1.0 k
10 k
100 k
1.0 M
10 M
1.0 k
10 k
100 k
1.0 M
10 M
f, FREQUENCY (Hz)
f, FREQUENCY (Hz)
Figure 11. Output Voltage Swing
versus Frequency
Figure 12. Output Distortion versus Frequency
28
24
0.5
0.4
0.3
0.2
V
R
/V = ±15 V
= 2.0 k
CC EE
L
A
= 1000
V
THD = 1.0%
= 25
V
V
R
T
/V
= 2.0 V
= 2.0 k
= ±15 V
20
T
°C
CC EE
O
L
A
A
Compensated
pp
Units A = +1.0
V
Decompensated
Units A = –1.0
16
12
= 25°C
V
*Compensated
Units Only
A
= 100
V
8.0
0.1
0
A
= 10
4.0
0
V
A
= 1.0*
1.0 k
V
10 k
100 k
1.0 M
10 M
10
100
10 k
100 k
f, FREQUENCY (Hz)
f, FREQUENCY (Hz)
Figure 13. Open Loop Voltage Gain
versus Temperature
1.08
1.04
1.00
0.96
0.92
V
/V = ±15 V
= –10 V to +10 V
= 10 k
CC EE
V
R
O
L
f
≤
10 Hz
–55
–25
0
25
50
75
C)
100
125
T , AMBIENT TEMPERATURE (
°
A
6
MOTOROLA ANALOG IC DEVICE DATA
MC34080 thru MC34085
Figure 14. Open Loop Voltage Gain and
Phase versus Frequency
Figure 15. Open Loop Voltage Gain and
Phase versus Frequency
100
80
20
10
V
V
R
T
/V = ±15 V
= 0 V
= 2.0 k
= 25°C
100
120
140
160
180
200
CC EE
O
L
A
0
Gain
Margin
= 7.6 dB
45
90
135
180
V
V
T
/V = ±15 V
= 0 V
= 25°C
CC EE
O
A
0
Phase
Gain
60
40
Phase
Margin
–10
–20
–30
–40
1
2
= 54
°
1 — Gain, R = 2.0 k
2 — Gain, R = 2.0 k, C = 100 pF
3 — Phase, R = 2.0 k
4 — Phase, R = 2.0 k, C = 100 pF
Compensated Units Only
2.0 3.0 5.0 7.0 10
f, FREQUENCY (Hz)
L
L
L
20
0
L
Solid Line Curves — Compensated Units
Dashed Line Curves — Decompensated Units
3
L
L
4
1.0
10
100 1.0 k
10 k 100 k 1.0 M 10 M 100 M
1.0
20
30
50
f, FREQUENCY (Hz)
Figure 16. Open Loop Voltage Gain and
Phase versus Frequency
Figure 17. Normalized Gain Bandwidth
Product versus Temperature
20
10
1.20
1.10
1.00
100
120
140
160
180
200
Gain
Margin
= 5.5 dB
V
R
/V = ±15 V
= 2.0 k
CC EE
L
V
V
T
/V = ±15 V
= 0 V
= 25°C
CC EE
O
A
0
Phase
Margin
–10
= 43
°
–20
–30
–40
1 — Gain, R = 2.0 k
2 — Gain, R = 2.0 k, C = 100 pF
3 — Phase, R = 2.0 k
4 — Phase, R = 2.0 k, C = 100 pF
Decompensated Units Only
2.0 3.0 5.0 7.0 10
f, FREQUENCY (Hz)
L
0.90
0.80
L
L
L
L
L
1.0
20
30
50
–55
–25
0
25
50
75
C)
100
125
T , AMBIENT TEMPERATURE (
°
A
Figure 18. Percent Overshoot versus
Load Capacitance
Figure 19. Phase Margin versus
Load Capacitance
70
60
50
40
30
20
10
0
100
80
V
R
∆
/V = ±15 V
= 2.0 k to
CC EE
Compensated
Decompensated
L
Units A = +1.0
Units A = +2.0
V
V
V
= 100 mV
= –10 V to +10 V
O
pp
V
T
O
A
= 25°C
60
Compensated
Units A = +1.0
V
40
V
R
∆
/V = ±15 V
CC EE
= 2.0 k
L
Decompensated
Units A = +2.0
20
0
V
= 100 mV
= –10 V to +10 V
O
pp
V
V
T
O
A
= 25°C
10
100
C , LOAD CAPACITANCE (pF)
1.0k
10
100
1.0k
C , LOAD CAPACITANCE (pF)
L
L
7
MOTOROLA ANALOG IC DEVICE DATA
MC34080 thru MC34085
Figure 20. Gain Margin versus Load Capacitance
Figure 21. Phase Margin versus Temperature
60
50
40
30
20
10
0
10
V
R
∆
/V = ±15 V
= 2.0 k to ∞
CC EE
Compensated
L
Solid Line Curves–Compensated Units A = +1.0
V
Units A = +1.0
V
8.0
V
= 100 mV
= –10 V to +10 V
O
pp
C
= 10 pF
Dashed Line Curves–Decompensated Units A = +2.0
V
L
V
T
O
A
= 25°C
6.0
4.0
2.0
0
C
= 100 pF
L
C
= 360 pF
L
Decompensated
Units A = +2.0
V
∆
V
= 100 mV
V
R
/V
=
±
∞
15 V
O
pp
= –10 V to +10 V
CC EE
L
C
= 200 pF
V
= 2.0 k to
L
O
10
100
10 k
–55
–25
0
25
50
75
C)
100
125
C , LOAD CAPACITANCE (pF)
T , AMBIENT TEMPERATURE (
°
L
A
Figure 23. Normalized Slew Rate
versus Temperature
Figure 22. Gain Margin versus Temperature
10
1.40
1.20
Solid Line Curves–Compensated Units A = +1.0
V
V
/V = ±15 V
CC EE
Dashed Line Curves–Decompensated Units A = +2.0
V
A
= +1.0 for Compensated Units
= –1.0 for Decompensated Units
= 2.0 k
= 100 pF
= –10 V to +10 V
V
8.0
A
V
R
C
L
L
C
= 10 pF
6.0
4.0
∆
V
= 100 mV
L
V
R
/V
=
±
15 V
∞
O
pp
= –10 V to +10 V
CC EE
L
V
O
V
= 2.0 k to
O
1.00
0.80
0.60
C
= 100 pF
C = 200 pF
L
L
2.0
0
C
= 360 pF
100
L
–55
–25
0
25
50
75
C)
125
–55
–25
0
25
50
75
C)
100
125
T , AMBIENT TEMPERATURE (
°
T , AMBIENT TEMPERATURE (
°
A
A
8
MOTOROLA ANALOG IC DEVICE DATA
MC34080 thru MC34085
MC34084 Transient Response
A = +1.0, R = 2.0 k, V /V
= ±15 V, T = 25°C
A
V
L
CC EE
Figure 24. Small Signal
Figure 25. Large Signal
C
L
= 100 pF
C
= 10 pF
L
0
0
0.2
µs/Div
0.5 µs/Div
MC34085 Transient Response
A = +2.0, R = 2.0 k, V /V = ±15 V, T = 25°C
V
L
CC EE
A
Figure 26. Small Signal
Figure 27. Large Signal
C
L
= 100 pF
C
= 10 pF
L
0
0
0.2
µs/Div
0.5 µs/Div
9
MOTOROLA ANALOG IC DEVICE DATA
MC34080 thru MC34085
Figure 28. Common Mode Rejection Ratio
versus Frequency
Figure 29. Power Supply Rejection Ratio
versus Frequency
100
80
120
T
= –55°C
T
= 25°C
A
V
∆
V
/V = ±15 V
A
V
∆
V
T
/V = ±15 V
CC EE
CC EE
V = 3.0 V
V = 3.0 V
S
S
100
80
T
= 125°C
= 0 V
A
= 0 V
O
O
A
= 25°C
60
40
20
0
Positive
Supply
60
V
± ∆V
CC
V
± ∆V
CC
CC
CC
+
–
40
20
0
+
–
V
V
O
O
Negative
Supply
Compensated Units A = +1.0
V
V
± ∆V
Decompensated Units A = +2.0
V
V
± ∆V
EE
EE
EE
EE
0.1
1.0
10
100
1.0 k
10 k
100 k 1.0 M
10 M
0.1
1.0
10
100
1.0 k
10 k
100 k 1.0 M
10 M
f, FREQUENCY (Hz)
f, FREQUENCY (Hz)
Figure 30. Power Supply Rejection Ratio
versus Temperature
Figure 31. Normalized Supply Current
versus Supply Voltage
110
100
90
1.20
1.10
1.00
0.90
0.80
0.70
T
= 125°C
A
Negative
Supply
V
∆
V
f
/V = ±15 V
CC EE
V = 3.0 V
S
= 0 V
O
≤ 10 Hz
T
= 25°C
A
Supply Current
Normalized to
V
± ∆V
CC
CC
Positive
Supply
+
–
V
/V
=
±
15 V, T = 25
°C
V
CC EE
A
O
80
70
R
= ∞
= 0
L
V
O
Compensated Units A = +1.0
V
Decompensated Units A = +2.0
V
V
± ∆V
EE
EE
T
= –55°C
A
–55
–25
0
25
50
75
C)
100
125
0
±
5.0
±
10
, SUPPLY VOLTAGE (V)
S
±
15
±20
±25
T , AMBIENT TEMPERATURE (
°
V
A
Figure 32. Channel Separation versus Frequency
Figure 33. Spectral Noise Density
100
80
120
100
V
V
T
/V = ±15 V
CC EE
= 0
CM
= 25°C
80
60
40
20
A
60
40
V
T
/V = ±15 V
= 25°C
CC EE
A
20
0
0
10
100
1.0 k
10 k
100 k
10 k
100 k
1.0 M
10 M
f, FREQUENCY (Hz)
f, FREQUENCY (Hz)
10
MOTOROLA ANALOG IC DEVICE DATA
MC34080 thru MC34085
APPLICATIONS INFORMATION
The bandwidth and slew rate of the MC34080 series is
input stage also allows a differential up to ±44 V, provided the
maximum input voltage range is not exceeded. The supply
voltage operating range is from ±5.0 V to ±22 V.
nearly double that of currently available general purpose
JFET op–amps. This improvement in AC performance is due
to the P–channel JFET differential input stage driving a
compensated miller integration amplifier in conjunction with
an all NPN output stage.
The all NPN output stage offers unique advantages over
the more conventional NPN/PNP transistor Class AB output
stage. With a 10 k load resistance, the op amp can typically
For optimum frequency performance and stability, careful
component placement and printed circuit board layout should
be exercised. For example, long unshielded input or output
leads may result in unwanted input–output coupling. In order
to reduce the input capacitance, resistors connected to the
input pins should be physically close to these pins. This not
only minimizes the input pole for optimum frequency
response, but also minimizes extraneous “pickup” at
this node.
swing within 1.0 V of the positive rail (V ), and within 0.3 V
CC
of the negative rail (V ), providing a 28.7 p–p swing from
EE
±15 V supplies. This large output swing becomes most
noticeable at lower supply voltages. If the load resistance is
Supply decoupling with adequate capacitance close to the
supply pin is also important, particularly over temperature,
since many types of decoupling capacitors exhibit large
impedance changes over temperature.
referenced to V
instead of ground, the maximum possible
CC
output swing can be achieved for a given supply voltage. For
light load currents, the load resistance will pull the output to
V
during the positive swing and the NPN output transistor
Primarily due to the JFET inputs of the op amp, the input
offset voltage may change due to temperature cycling and
board soldering. After 20 temperature cycles (– 55° to
165°C), the typical standard deviation for input offset voltage
is 559 µV in the plastic packages. With respect to board
soldering (260°C, 10 seconds), the typical standard deviation
for input offset voltage is 525 µV in the plastic package.
Socketed devices should be used over a minimal
temperature range for optimum input offset voltage
performance.
CC
will pull the output very near V
during the negative swing.
EE
The load resistance value should be much less than that of
the feedback resistance to maximize pull–up capability.
The all NPN transistor output stage is also inherently
fast, contributing to the operation amplifier’s high
gain–bandwidth product and fast settling time. The
associated high frequency output impedance is 50 Ω (typical)
at 8.0 MHz. This allows driving capacitive loads from 0 pF to
300 pF without oscillations over the military temperature
range, and over the full range of output swing. The 55°C
phase margin and 7.6 dB gain margin as well as the general
gain and phase characteristics are virtually independent of
the sink/source output swing conditions. The high frequency
characteristics of the MC34080 series is especially useful for
active filter applications.
Figure 34. Offset Nulling Circuit
V
CC
3
2
7
+
–
The common mode input range is from 2.0 V below the
6
positive rail (V ) to 4.0 V above the negative rail (V ). The
CC EE
5
amplifier remains active if the inputs are biased at the positive
rail. This may be useful for some applications in that single
supply operation is possible with a single negative supply.
However, a degradation of offset voltage and voltage gain
may result.
1
4
5.0 k
Phase reversal does not occur if either the inverting or
noninverting input (or both) exceeds the positive common
mode limit. If either input (or both) exceeds the negative
common mode limit, the output will be in the high state. The
V
EE
11
MOTOROLA ANALOG IC DEVICE DATA
MC34080 thru MC34085
OUTLINE DIMENSIONS
P SUFFIX
PLASTIC PACKAGE
CASE 626–05
ISSUE K
8
5
NOTES:
1. DIMENSION L TO CENTER OF LEAD WHEN
–B–
FORMED PARALLEL.
2. PACKAGE CONTOUR OPTIONAL (ROUND OR
SQUARE CORNERS).
1
4
3. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
F
MILLIMETERS
INCHES
DIM
A
B
C
D
F
G
H
J
K
L
M
N
MIN
9.40
6.10
3.94
0.38
1.02
MAX
10.16
6.60
4.45
0.51
1.78
MIN
MAX
0.400
0.260
0.175
0.020
0.070
–A–
NOTE 2
0.370
0.240
0.155
0.015
0.040
L
C
2.54 BSC
0.100 BSC
0.76
0.20
2.92
7.62 BSC
–––
1.27
0.30
3.43
0.030
0.008
0.115
0.300 BSC
–––
0.050
0.012
0.135
J
–T–
SEATING
PLANE
N
10
1.01
10
0.040
M
D
0.76
0.030
K
G
H
M
M
M
0.13 (0.005)
T
A
B
D SUFFIX
PLASTIC PACKAGE
CASE 751–05
(SO–8)
ISSUE R
NOTES:
D
A
E
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. DIMENSIONS ARE IN MILLIMETERS.
3. DIMENSION D AND E DO NOT INCLUDE MOLD
PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE.
5. DIMENSION B DOES NOT INCLUDE MOLD
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 TOTAL IN EXCESS
OF THE B DIMENSION AT MAXIMUM MATERIAL
CONDITION.
C
8
1
5
M
M
0.25
B
H
4
h X 45
MILLIMETERS
B
C
e
DIM
A
A1
B
C
D
E
e
H
h
MIN
1.35
0.10
0.35
0.18
4.80
3.80
MAX
1.75
0.25
0.49
0.25
5.00
4.00
A
SEATING
PLANE
L
1.27 BSC
0.10
5.80
0.25
0.40
0
6.20
0.50
1.25
7
A1
B
L
M
S
S
0.25
C
B
A
12
MOTOROLA ANALOG IC DEVICE DATA
MC34080 thru MC34085
OUTLINE DIMENSIONS
P SUFFIX
PLASTIC PACKAGE
CASE 646–06
ISSUE L
NOTES:
1. LEADS WITHIN 0.13 (0.005) RADIUS OF TRUE
POSITION AT SEATING PLANE AT MAXIMUM
MATERIAL CONDITION.
2. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
3. DIMENSION B DOES NOT INCLUDE MOLD
FLASH.
4. ROUNDED CORNERS OPTIONAL.
14
1
8
7
B
INCHES
MILLIMETERS
A
F
DIM
A
B
C
D
F
G
H
J
K
L
M
N
MIN
MAX
0.770
0.260
0.185
0.021
0.070
MIN
18.16
6.10
3.69
0.38
1.02
MAX
19.56
6.60
4.69
0.53
1.78
0.715
0.240
0.145
0.015
0.040
L
C
0.100 BSC
2.54 BSC
0.052
0.008
0.115
0.095
0.015
0.135
1.32
0.20
2.92
2.41
0.38
3.43
J
N
0.300 BSC
7.62 BSC
SEATING
PLANE
K
0
10
0
10
0.015
0.039
0.39
1.01
H
G
D
M
DW SUFFIX
PLASTIC PACKAGE
CASE 751G–02
(SO–16L)
ISSUE A
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
–A–
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE MOLD
PROTRUSION.
16
9
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER
SIDE.
–B–
8X P
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.13 (0.005) TOTAL IN
EXCESS OF D DIMENSION AT MAXIMUM
MATERIAL CONDITION.
M
M
0.010 (0.25)
B
1
8
MILLIMETERS
INCHES
J
16X D
DIM
A
B
C
D
MIN
10.15
7.40
2.35
0.35
0.50
MAX
10.45
7.60
2.65
0.49
0.90
MIN
MAX
0.411
0.299
0.104
0.019
0.035
0.400
0.292
0.093
0.014
0.020
M
S
S
0.010 (0.25)
T
A
B
F
F
G
J
K
M
P
R
1.27 BSC
0.050 BSC
R X 45
0.25
0.10
0
0.32
0.25
7
0.010
0.004
0
0.012
0.009
7
C
10.05
0.25
10.55
0.75
0.395
0.010
0.415
0.029
–T–
M
SEATING
14X G
K
PLANE
13
MOTOROLA ANALOG IC DEVICE DATA
MC34080 thru MC34085
NOTES
14
MOTOROLA ANALOG IC DEVICE DATA
MC34080 thru MC34085
NOTES
15
MOTOROLA ANALOG IC DEVICE DATA
MC34080 thru MC34085
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and
specificallydisclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motorola
datasheetsand/orspecificationscananddovaryindifferentapplicationsandactualperformancemayvaryovertime. Alloperatingparameters,including“Typicals”
must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of
others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other
applicationsintended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury
ordeathmayoccur. ShouldBuyerpurchaseoruseMotorolaproductsforanysuchunintendedorunauthorizedapplication,BuyershallindemnifyandholdMotorola
and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees
arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that
Motorola was negligent regarding the design or manufacture of the part. Motorola and
Opportunity/Affirmative Action Employer.
are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal
How to reach us:
USA/EUROPE/Locations Not Listed: Motorola Literature Distribution;
P.O. Box 20912; Phoenix, Arizona 85036. 1–800–441–2447 or 602–303–5454
JAPAN: Nippon Motorola Ltd.; Tatsumi–SPD–JLDC, 6F Seibu–Butsuryu–Center,
3–14–2 Tatsumi Koto–Ku, Tokyo 135, Japan. 03–81–3521–8315
MFAX: RMFAX0@email.sps.mot.com – TOUCHTONE 602–244–6609
INTERNET: http://Design–NET.com
ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park,
51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852–26629298
MC34080/D
◊
相关型号：
©2020 ICPDF网 联系我们和版权申明