MC74AC240DTR2 [ONSEMI]
OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS; 八路缓冲器/ 3态输出线路驱动器
| 型号： | MC74AC240DTR2 |
| 厂家： | 
ONSEMI |
| 描述： | OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS |
| 文件： | 总8页 (文件大小：103K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MC74AC240, MC74ACT240
Octal Buffer/Line Driver
with 3−State Outputs
The MC74AC240/74ACT240 is an octal buffer and line driver
designed to be employed as a memory address driver, clock driver and
bus oriented transmitter or receiver which provides improved PC
board density.
http://onsemi.com
• 3−State Outputs Drive Bus Lines or Buffer Memory Address
Registers
PDIP−20
N SUFFIX
CASE 738
• Outputs Source/Sink 24 mA
• ′ACT240 Has TTL Compatible Inputs
20
1
SO−20
DW SUFFIX
CASE 751D
V
OE
2
CC
20
20
19
18
17
16
15
14
12
13
11
1
TSSOP−20
DT SUFFIX
CASE 948E
20
1
EIAJ−20
M SUFFIX
CASE 967
1
2
3
4
5
6
7
8
9
10
20
OE
GND
1
1
Figure 1. Pinout: 20−Lead Packages Conductors
(Top View)
ORDERING INFORMATION
†
Device
Package
PDIP−20
PDIP−20
SOIC−20
Shipping
TRUTH TABLE
MC74AC240N
18 Units/Rail
18 Units/Rail
38 Units/Rail
Inputs
OE
Outputs
D
(Pins 12, 14, 16, 18)
MC74ACT240N
MC74AC240DW
MC74AC240DWR2
MC74ACT240DW
1
L
L
H
L
H
X
H
L
Z
SOIC−20 1000 Tape & Reel
SOIC−20 38 Units/Rail
NOTE: H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
MC74ACT240DWR2 SOIC−20 1000 Tape & Reel
Z = High Impedance
MC74AC240DTR2
TSSOP−20 2500 Tape & Reel
TRUTH TABLE
MC74ACT240DTR2 TSSOP−20 2500 Tape & Reel
Inputs
OE
Outputs
MC74AC240MEL
MC74ACT240MEL
EIAJ−20 2000 Tape & Reel
EIAJ−20 2000 Tape & Reel
D
(Pins 3, 5, 7, 9)
2
L
L
H
L
H
X
H
L
Z
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
NOTE: H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
DEVICE MARKING INFORMATION
See general marking information in the device marking
Z = High Impedance
section on page 5 of this data sheet.
Semiconductor Components Industries, LLC, 2004
1
Publication Order Number:
July, 2004 − Rev. 6
MC74AC240/D
MC74AC240, MC74ACT240
MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
V
V
V
V
DC Supply Voltage (Referenced to GND)
−0.5 to +7.0
CC
DC Input Voltage (Referenced to GND)
DC Output Voltage (Referenced to GND)
DC Input Current, per Pin
−0.5 to V +0.5
V
IN
CC
−0.5 to V +0.5
V
OUT
CC
I
I
I
±20
±50
mA
mA
mA
°C
IN
DC Output Sink/Source Current, per Pin
OUT
CC
DC V or GND Current per Output Pin
±50
CC
T
stg
Storage Temperature
−65 to +150
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
2.0
4.5
0
Typ
5.0
5.0
−
Max
6.0
Unit
′AC
V
V
Supply Voltage
V
V
CC
′ACT
5.5
, V
OUT
DC Input Voltage, Output Voltage (Ref. to GND)
V
CC
IN
V
CC
V
CC
V
CC
V
CC
V
CC
@ 3.0 V
@ 4.5 V
@ 5.5 V
@ 4.5 V
@ 5.5 V
−
150
40
25
10
8.0
−
−
Input Rise and Fall Time (Note 1)
′AC Devices except Schmitt Inputs
−
−
−
−
−
ns/V
t , t
r
f
−
−
Input Rise and Fall Time (Note 2)
′ACT Devices except Schmitt Inputs
t , t
ns/V
r
f
−
T
J
Junction Temperature (PDIP)
Operating Ambient Temperature Range
Output Current − High
−
140
85
°C
°C
T
A
−40
−
25
−
I
−24
24
mA
mA
OH
OL
I
Output Current − Low
−
−
1. V from 30% to 70% V ; see individual Data Sheets for devices that differ from the typical input rise and fall times.
IN
CC
2. V from 0.8 V to 2.0 V; see individual Data Sheets for devices that differ from the typical input rise and fall times.
IN
http://onsemi.com
2
MC74AC240, MC74ACT240
DC CHARACTERISTICS
74AC
74AC
V
(V)
CC
T
A
= +25°C
T
A
=−40°C to +85°C
Symbol
Parameter
Unit
Conditions
Typ
Guaranteed Limits
V
V
V
3.0
4.5
5.5
1.5
2.25
2.75
2.1
3.15
3.85
2.1
3.15
3.85
V
= 0.1 V
Minimum High Level
Input Voltage
IH
OUT
V
V
V
or V − 0.1 V
CC
3.0
4.5
5.5
1.5
2.25
2.75
0.9
1.35
1.65
0.9
1.35
1.65
V
OUT
= 0.1 V
Maximum Low Level
Input Voltage
IL
or V − 0.1 V
CC
3.0
4.5
5.5
2.99
4.49
5.49
2.9
4.4
5.4
2.9
4.4
5.4
I
= −50 mA
Minimum High Level
Output Voltage
OH
OUT
*V = V or V
IH
IN
IL
3.0
4.5
5.5
−
−
−
2.56
3.86
4.86
2.46
3.76
4.76
−12 mA
−24 mA
−24 mA
V
V
V
I
OH
V
OL
3.0
4.5
5.5
0.002
0.001
0.001
0.1
0.1
0.1
0.1
0.1
0.1
I
= 50 mA
OUT
Maximum Low Level
Output Voltage
*V = V or V
IN
IL
IH
3.0
4.5
5.5
−
−
−
0.36
0.36
0.36
0.44
0.44
0.44
12 mA
24 mA
24 mA
I
OL
I
Maximum Input
Leakage Current
IN
5.5
5.5
−
−
±0.1
±0.5
±1.0
±5.0
mA
mA
V = V , GND
I CC
I
V (OE) = V , V
I IL IH
Maximum
3−State
Current
OZ
V = V , GND
I
CC
V
O
= V , GND
CC
I
I
I
5.5
5.5
−
−
−
−
75
mA
mA
V
= 1.65 V Max
†Minimum Dynamic
Output Current
OLD
OHD
CC
OLD
OHD
−75
V
V
= 3.85 V Min
Maximum Quiescent
Supply Current
5.5
−
8.0
80
mA
= V or GND
IN CC
*All outputs loaded; thresholds on input associated with output under test.
†Maximum test duration 2.0 ms, one output loaded at a time.
NOTE:
I
IN
and I @ 3.0 V are guaranteed to be less than or equal to the respective limit @ 5.5 V V
.
CC
CC
http://onsemi.com
3
MC74AC240, MC74ACT240
AC CHARACTERISTICS (For Figures and Waveforms − See Section 3 of the ON Semiconductor FACT Data Book, DL138/D)
74AC
74AC
T
= −40°C
A
T
= +25°C
V
(V)
*
Fig.
No.
A
CC
to +85°C
C = 50 pF
Symbol
Parameter
Unit
C = 50 pF
L
L
Min
Typ
Max
Min
Max
Propagation Delay
Data to Output
3.3
5.0
1.5
1.5
6.0
4.5
8.0
6.5
1.0
1.0
9.0
7.0
t
t
t
t
t
t
ns
ns
ns
ns
ns
ns
3−5
3−5
3−7
3−8
3−7
3−8
PLH
Propagation Delay
Data to Output
3.3
5.0
1.5
1.5
5.5
4.5
8.0
6.0
1.0
1.0
8.5
6.5
PHL
PZH
PZL
PHZ
PLZ
3.3
5.0
1.5
1.5
6.0
5.0
10.5
7.0
1.0
1.0
11.0
8.0
Output Enable Time
Output Enable Time
Output Disable Time
Output Disable Time
3.3
5.0
1.5
1.5
7.0
5.5
10.0
8.0
1.0
1.0
11.0
8.5
3.3
5.0
1.5
1.5
7.0
6.5
10.0
9.0
1.0
1.0
10.5
9.5
3.3
5.0
1.5
1.5
7.5
6.5
10.5
9.0
1.0
1.0
11.5
9.5
* Voltage Range 3.3 V is 3.3 V ±0.3 V.
Voltage Range 5.0 V is 5.0 V ±0.5 V.
DC CHARACTERISTICS
74ACT
74ACT
V
(V)
CC
T
A
= +25°C
T
A
= −40°C to +85°C
Symbol
Parameter
Unit
Conditions
Typ
Guaranteed Limits
V
V
V
4.5
5.5
1.5
1.5
2.0
2.0
2.0
2.0
V
= 0.1 V
Minimum High Level
Input Voltage
IH
OUT
V
V
V
or V − 0.1 V
CC
4.5
5.5
1.5
1.5
0.8
0.8
0.8
0.8
V
OUT
= 0.1 V
Maximum Low Level
Input Voltage
IL
or V − 0.1 V
CC
4.5
5.5
4.49
5.49
4.4
5.4
4.4
5.4
I
= −50 mA
Minimum High Level
Output Voltage
OH
OUT
*V = V or V
IH
IN
IL
4.5
5.5
−
−
3.86
4.86
3.76
4.76
V
V
V
−24 mA
−24 mA
I
I
OH
V
OL
4.5
5.5
0.001
0.001
0.1
0.1
0.1
0.1
= 50 mA
OUT
Maximum Low Level
Output Voltage
*V = V or V
IN
IL
IH
4.5
5.5
−
−
0.36
0.36
0.44
0.44
24 mA
24 mA
I
OL
I
Maximum Input
Leakage Current
IN
5.5
5.5
−
±0.1
±1.0
mA
V = V , GND
I CC
∆I
Additional Max. I /Input
0.6
−
1.5
mA
V = V − 2.1 V
I CC
CCT
CC
I
V (OE) = V , V
I IL IH
Maximum
3−State
Current
OZ
5.5
−
±0.5
±5.0
mA
V = V , GND
I
CC
V
O
= V , GND
CC
I
I
I
5.5
5.5
−
−
−
−
75
mA
mA
V
= 1.65 V Max
†Minimum Dynamic
Output Current
OLD
OLD
OHD
−75
V
V
= 3.85 V Min
OHD
CC
Maximum Quiescent
Supply Current
5.5
−
8.0
80
mA
= V or GND
IN CC
*All outputs loaded; thresholds on input associated with output under test.
†Maximum test duration 2.0 ms, one output loaded at a time.
http://onsemi.com
4
MC74AC240, MC74ACT240
AC CHARACTERISTICS (For Figures and Waveforms − See Section 3 of the ON Semiconductor FACT Data Book, DL138/D)
74ACT
74ACT
T
= −40°C
A
T
= +25°C
V
(V)
*
Fig.
No.
A
CC
to +85°C
C = 50 pF
Symbol
Parameter
Unit
C = 50 pF
L
L
Min
Typ
Max
Min
Max
Propagation Delay
Data to Output
t
t
5.0
5.0
1.5
6.0
8.5
1.5
9.5
ns
ns
3−5
3−5
PLH
Propagation Delay
Data to Output
1.5
5.5
7.5
1.5
8.5
PHL
t
t
t
t
Output Enable Time
Output Enable Time
Output Disable Time
Output Disable Time
5.0
5.0
5.0
5.0
1.5
2.0
2.0
2.5
7.0
7.0
8.0
6.5
8.5
9.5
1.0
1.5
2.0
2.0
9.5
ns
ns
ns
ns
3−7
3−8
3−7
3−8
PZH
PZL
PHZ
PLZ
10.5
10.5
10.5
9.5
10.0
*Voltage Range 5.0 V is 5.0 V ±0.5 V.
CAPACITANCE
Symbol
Value
Parameter
Unit
Test Conditions
Typ
4.5
45
C
C
Input Capacitance
pF
pF
V
V
= 5.0 V
= 5.0 V
IN
CC
Power Dissipation Capacitance
PD
CC
MARKING DIAGRAMS
PDIP−20
SO−20
TSSOP−20
EIAJ−20
MC74AC240N
AWLYYWW
74AC240
AWLYWW
AC
240
ALYW
AC240
AWLYYWW
MC74ACT240N
AWLYYWW
74ACT240
AWLYWW
ACT
240
ALYW
ACT240
AWLYYWW
A
= Assembly Location
WL, L = Wafer Lot
YY, Y
= Year
WW, W = Work Week
http://onsemi.com
5
MC74AC240, MC74ACT240
PACKAGE DIMENSIONS
PDIP−20
N SUFFIX
20 PIN PLASTIC DIP PACKAGE
CASE 738−03
ISSUE E
−A−
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
20
1
11
10
B
4. DIMENSION B DOES NOT INCLUDE MOLD
FLASH.
L
C
INCHES
DIM MIN MAX
1.070 25.66
MILLIMETERS
MIN
MAX
27.17
6.60
4.57
0.55
A
B
C
D
E
F
1.010
0.240
0.150
0.015
0.260
0.180
0.022
6.10
3.81
0.39
−T−
SEATING
PLANE
K
0.050 BSC
1.27 BSC
M
0.050
0.070
1.27
1.77
N
E
G
J
0.100 BSC
2.54 BSC
0.008
0.110
0.015
0.140
0.21
2.80
0.38
3.55
G
F
K
L
J 20 PL
0.300 BSC
7.62 BSC
D 20 PL
M
M
B
0.25 (0.010)
T
M
N
0
0.020
15
_
0.040
0
_
0.51
15
_
1.01
_
M
M
0.25 (0.010)
T
A
SO−20
DW SUFFIX
20 PIN PLASTIC SOIC PACKAGE
CASE 751D−05
ISSUE G
D
A
q
NOTES:
1. DIMENSIONS ARE IN MILLIMETERS.
2. INTERPRET DIMENSIONS AND TOLERANCES
PER ASME Y14.5M, 1994.
20
11
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD
PROTRUSION.
E
4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE.
5. DIMENSION B DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE PROTRUSION SHALL
BE 0.13 TOTAL IN EXCESS OF B DIMENSION AT
MAXIMUM MATERIAL CONDITION.
1
10
MILLIMETERS
DIM MIN
MAX
2.65
0.25
0.49
0.32
12.95
7.60
B
A
A1
B
C
D
E
2.35
0.10
0.35
0.23
12.65
7.40
20X B
M
S
S
B
T
0.25
A
e
1.27 BSC
A
H
h
10.05
0.25
0.50
0
10.55
0.75
0.90
7
L
SEATING
PLANE
q
_
_
18X e
A1
C
T
http://onsemi.com
6
MC74AC240, MC74ACT240
PACKAGE DIMENSIONS
TSSOP−20
DT SUFFIX
20 PIN PLASTIC TSSOP PACKAGE
CASE 948E−02
ISSUE B
20X K REF
NOTES:
ꢀꢁ1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
M
S
S
V
0.10 (0.004)
T U
S
0.15 (0.006) T U
ꢀꢁ2. CONTROLLING DIMENSION: MILLIMETER.
ꢀꢁ3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH, PROTRUSIONS OR GATE BURRS. MOLD
FLASH OR GATE BURRS SHALL NOT EXCEED
0.15 (0.006) PER SIDE.
ꢀꢁ4. DIMENSION B DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION SHALL NOT
EXCEED 0.25 (0.010) PER SIDE.
ꢀꢁ5. DIMENSION K DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN
EXCESS OF THE K DIMENSION AT MAXIMUM
MATERIAL CONDITION.
K
K1
20
11
2X L/2
J J1
B
L
−U−
PIN 1
IDENT
SECTION N−N
1
10
0.25 (0.010)
ꢀꢁ6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
N
S
ꢀꢁ7. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE −W−.
0.15 (0.006) T U
M
A
−V−
MILLIMETERS
DIM MIN MAX
INCHES
MIN
MAX
0.260
0.177
0.047
0.006
0.030
A
B
6.40
4.30
−−−
6.60 0.252
4.50 0.169
N
C
1.20
−−−
D
0.05
0.50
0.15 0.002
0.75 0.020
F
F
G
H
0.65 BSC
0.026 BSC
DETAIL E
0.27
0.09
0.09
0.19
0.19
0.37
0.011
0.015
0.008
0.006
0.012
0.010
J
0.20 0.004
0.16 0.004
0.30 0.007
0.25 0.007
−W−
J1
K
C
K1
L
6.40 BSC
0 8 0 8
0.252 BSC
G
D
M
_
_
_
_
H
DETAIL E
0.100 (0.004)
−T− SEATING
PLANE
EIAJ−20
M SUFFIX
20 PIN PLASTIC EIAJ PACKAGE
CASE 967−01
ISSUE O
NOTES:
ꢀꢁ1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
ꢀꢁ2. CONTROLLING DIMENSION: MILLIMETER.
ꢀꢁ3. DIMENSIONS D AND E DO NOT INCLUDE
MOLD FLASH OR PROTRUSIONS AND ARE
MEASURED AT THE PARTING LINE. MOLD FLASH
OR PROTRUSIONS SHALL NOT EXCEED 0.15
(0.006) PER SIDE.
L
E
20
11
Q
1
ꢀꢁ4. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
H
E
_
E
M
ꢀꢁ5. THE LEAD WIDTH DIMENSION (b) DOES NOT
INCLUDE DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08 (0.003)
TOTAL IN EXCESS OF THE LEAD WIDTH
DIMENSION AT MAXIMUM MATERIAL CONDITION.
DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OR THE FOOT. MINIMUM SPACE
BETWEEN PROTRUSIONS AND ADJACENT LEAD
TO BE 0.46 ( 0.018).
L
1
10
DETAIL P
Z
D
VIEW P
MILLIMETERS
INCHES
MIN
e
A
DIM MIN
MAX
2.05
0.20
0.50
0.27
12.80
5.45
MAX
0.081
0.008
0.020
0.011
0.504
0.215
c
A
−−−
0.05
0.35
0.18
12.35
5.10
−−−
0.002
0.014
0.007
0.486
0.201
A
1
b
c
D
E
e
A
b
1
1.27 BSC
0.050 BSC
M
0.10 (0.004)
0.13 (0.005)
H
7.40
0.50
1.10
8.20
0.85
1.50
0.291
0.020
0.043
0.323
0.033
0.059
E
L
L
E
M
Q
0
10
10
_
0.035
0.032
0
_
_
_
0.70
−−−
0.90
0.81
0.028
−−−
1
Z
http://onsemi.com
7
MC74AC240, MC74ACT240
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
ON Semiconductor Website: http://onsemi.com
Order Literature: http://www.onsemi.com/litorder
Literature Distribution Center for ON Semiconductor
P.O. Box 61312, Phoenix, Arizona 85082−1312 USA
Phone: 480−829−7710 or 800−344−3860 Toll Free USA/Canada
Fax: 480−829−7709 or 800−344−3867 Toll Free USA/Canada
Email: orderlit@onsemi.com
Japan: ON Semiconductor, Japan Customer Focus Center
2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051
Phone: 81−3−5773−3850
For additional information, please contact your
local Sales Representative.
MC74AC240/D
相关型号：
©2020 ICPDF网 联系我们和版权申明