MC74AC652DWR [ONSEMI]
AC SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO24, SOIC-24;
| 型号： | MC74AC652DWR |
| 厂家： | 
ONSEMI |
| 描述： | AC SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO24, SOIC-24 光电二极管 输出元件 逻辑集成电路 触发器 |
| 文件： | 总11页 (文件大小：154K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MC74AC652, MC74ACT652
Octal Transceiver/Register
with 3−State Outputs
(Non−Inverting)
The MC74AC/ACT652 consists of registered bus transceiver
circuits, with outputs, D−type flip−flops and control circuitry
providing multiplexed transmission of data directly from the input bus
or from the internal storage registers. Data on the A or B bus will be
loaded into the respective registers on the LOW−to−HIGH transition
of the appropriate clock pin (CAB or CBA). The four fundamental
data handling functions available are illustrated in Figures 1 to 4.
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PDIP−24
N SUFFIX
CASE 724
24
• Independent Registers for A and B Buses
• Multiplexed Real−Time and Stored Data Transfers
• Choice of True and Inverting Data Paths
• 3−State Outputs
1
SO−24
DW SUFFIX
CASE 751E
24
1
• 300 mil Slim Dual−in−Line Package
• Outputs Source/Sink 24 mA
• ′ACT652 Has TTL Compatible Inputs
MARKING DIAGRAMS
PDIP−24
w These devices are available in Pb−free package(s). Specifications herein
apply to both standard and Pb−free devices. Please see our website at
www.onsemi.com for specific Pb−free orderable part numbers, or
contact your local ON Semiconductor sales office or representative.
MC74AC652N
AWLYYWW
MC74ACT652N
AWLYYWW
REAL TIME TRANSFER
A-BUS TO B-BUS
REAL TIME TRANSFER
B-BUS TO A-BUS
SO−24
A-BUS
A-BUS
AC652
AWLYYWW
REG
REG
REG
REG
B-BUS
B-BUS
ACT652
AWLYYWW
Figure 1.
STORAGE
FROM BUS TO REGISTER
Figure 2.
TRANSFER
FROM REGISTER TO BUS
A
= Assembly
Location
L, WL
Y, YY
A-BUS
A-BUS
= Wafer Lot
= Year
W, WW = Work Week
REG
REG
REG
REG
ORDERING INFORMATION
B-BUS
B-BUS
Device
Package
PDIP−24
PDIP−24
SOIC−24
Shipping
MC74AC652N
MC74ACT652N
MC74AC652DW
15 Units/Rail
15 Units/Rail
30 Units/Rail
Figure 3.
Figure 4.
MC74AC652DWR
2
MC74ACT652DW
SOIC−24 1000 Tape & Reel
SOIC−24 30 Units/Rail
MC74ACT652DWR2 SOIC−24 1000 Tape & Reel
© Semiconductor Components Industries, LLC, 2006
1
Publication Order Number:
March, 2006 − Rev. 6
MC74AC652/D
MC74AC652, MC74ACT652
V
CBA SBA GBA
23 22 21
B
B
B
B
B
B
B
B
7
CC
0
1
2
3
4
5
6
PIN ASSIGNMENT
24
20
19
18
16
14
17
15
13
PIN
A −A
FUNCTION
Data Register A Inputs
Data Register A Outputs
0
7
B −B
Data Register B Inputs
Data Register B Outputs
0
7
CAB, CBA
SAB, SBA
GAB, GBA
Clock Pulse Inputs
1
2
3
4
5
6
7
9
11
8
10
12
Transmit/Receive Inputs
Output Enable Inputs
CAB SAB GAB
A
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
GND
Figure 5. Pinout: 24−Lead Plastic Package
(Top View)
B
B
B
B
B
A
B
B
A
B
CAB
SAB
GAB
CBA
SBA
GBA
0
0
1
1
2
2
3
4
5
6
7
A
A
A
A
3
A
5
A
7
4
6
Figure 6. Logic Symbol
GBA
GAB
CBA
SBA
CAB
SAB
1 OF 8 CHANNELS
D
0
C
0
B
0
A
0
D
C
0
0
TO 7 OTHER CHANNELS
NOTE: This diagram is provided only for the understanding of
logic operations and should not be used to estimate
propagation delays.
Figure 7. Logic Diagram
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2
MC74AC652, MC74ACT652
FUNCTION TABLE
Inputs
CAB
Data I/O*
Operation or Function
GAB
GBA
CBA
SAB
SBA
A
− A
B − B
0 7
0
7
L
L
H
H
H or L
⇑
H or L
⇑
X
X
X
X
Isolation
Store A and B Data
Input
Input
X
H
H
H
⇑
⇑
H or L
⇑
X
X**
X
X
Input
Input
Unspecified* Store A, Hold B
Output
Store A in Both Registers
L
L
X
L
H or L
⇑
⇑
⇑
X
X
X
X**
Unspecified*
Output
Input
Input
Hold A, Store B
Store B in Both Registers
L
L
L
L
X
X
X
X
X
L
H
Real-Time B Data to A Bus
Stored B Data to A Bus
Output
Input
Input
Output
Output
H or L
H
H
H
H
X
X
X
L
H
X
X
Real-Time A Data to B Bus
Stored A Data to B Bus
H or L
Stored A Data to B Bus and
Stored B Data to A Bus
H
L
H or L
H or L
H
H
Output
*The data output functions may be enabled or disabled by various signals at the GBA and GAB inputs. Data input functions are always enabled;
i.e., data at the bus pins will be stored on every LOW-to-HIGH transition of the appropriate clock inputs.
**Select control = L: clocks can occur simultaneously.
H = HIGH Voltage Level; L = LOW Voltage Level; X = Immaterial; ⇑ = LOW-to-HIGH Transition
MAXIMUM RATINGS*
Symbol
Parameter
DC Supply Voltage (Referenced to GND)
Value
Unit
V
V
V
−0.5 to +7.0
CC
DC Input Voltage (Referenced to GND)
DC Output Voltage (Referenced to GND)
DC Input Current, per Pin
−0.5 to V + 0.5
V
in
CC
V
out
−0.5 to V + 0.5
V
CC
I
I
I
± 20
± 50
mA
mA
mA
°C
in
DC Output Sink/Source Current, per Pin
out
CC
DC V or GND Current per Output Pin
± 50
CC
T
stg
Storage Temperature
−65 to +150
*Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recom-
mended Operating Conditions.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
2.0
4.5
0
Typ
5.0
5.0
−
Min
6.0
5.5
Unit
′AC
V
Supply Voltage
V
V
CC
′ACT
V , V
in out
DC Input Voltage, Output Voltage (Ref. to GND)
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
@ 3.0 V
@ 4.5 V
@ 5.5 V
@ 4.5 V
@ 5.5 V
−
150
40
25
10
8.0
−
−
Input Rise and Fall Time (Note 1)
′AC Devices except Schmitt Inputs
−
−
−
−
−
ns/V
t , t
r
f
−
−
Input Rise and Fall Time (Note 2)
′ACT Devices except Schmitt Inputs
t , t
ns/V
r
f
−
T
J
Junction Temperature (PDIP)
Operating Ambient Temperature Range
Output Current — HIGH
−
140
85
°C
°C
T
A
−40
−
25
−
I
−24
24
mA
mA
OH
OL
I
Output Current — LOW
−
−
1. V from 30% to 70% V ; see individual Data Sheets for devices that differ from the typical input rise and fall times.
in
CC
2. V from 0.8 V to 2.0 V; see individual Data Sheets for devices that differ from the typical input rise and fall times.
in
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3
MC74AC652, MC74ACT652
DC CHARACTERISTICS
Symbol
74AC
74AC
T
A
=
V
(V)
CC
T
= +25°C
−40°C to
+85°C
Parameter
Unit
Conditions
A
Typ
Guaranteed Limits
V
V
V
3.0
4.5
5.5
1.5
2.25
2.75
2.1
3.15
3.85
2.1
3.15
3.85
V
= 0.1 V
Minimum High Level
Input Voltage
IH
OUT
V
V
V
or V − 0.1 V
CC
3.0
4.5
5.5
1.5
2.25
2.75
0.9
1.35
1.65
0.9
1.35
1.65
V
OUT
= 0.1 V
Maximum Low Level
Input Voltage
IL
or V − 0.1 V
CC
3.0
4.5
5.5
2.99
4.49
5.49
2.9
4.4
5.4
2.9
4.4
5.4
I
= − 50 μA
Minimum High Level
Output Voltage
OH
OUT
*V = V or V
IN
IL
IH
3.0
4.5
5.5
−
−
−
2.56
3.86
4.86
2.46
3.76
4.76
− 12 mA
− 24 mA
− 24 mA
V
V
V
I
OH
V
OL
3.0
4.5
5.5
0.002
0.001
0.001
0.1
0.1
0.1
0.1
0.1
0.1
I
= 50 μA
OUT
Minimum Low Level
Output Voltage
*V = V or V
IN
IL
IH
3.0
4.5
5.5
−
−
−
0.36
0.36
0.36
0.44
0.44
0.44
12 mA
24 mA
24 mA
I
OL
I
Maximum Input
Leakage Current
V = V , GND
I CC
IN
5.5
5.5
−
−
±0.1
±0.6
±1.0
±6.0
μA
μA
I
V (OE) = V , V
I IL IH
Maximum
3-State
OZT
V = V , GND
I
CC
Current
V = V , GND
O
CC
I
I
I
5.5
5.5
−
−
−
−
75
mA
mA
V
V
V
= 1.65 V Max
= 3.85 V Min
†Minimum Dynamic
Output Current
OLD
OHD
CC
OLD
−75
OHD
Maximum Quiescent
Supply Current
= V or GND
CC
IN
5.5
−
8.0
80
μA
*All outputs loaded; thresholds on input associated with output under test.
†Maximum test duration 2.0 ms, one input loaded at a time.
NOTE:
I
IN
and I @ 3.0 V are guaranteed to be less than or equal to the respective limit @ 5.5 V.
CC
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4
MC74AC652, MC74ACT652
AC CHARACTERISTICS
Symbol
74AC
74AC
T
A
= −40°C
T
= +25°C
C = 50 pF
L
V
(V)
*
A
CC
to +85°C
C = 50 pF
Parameter
Unit
L
Min
Max
Min
Max
3.0
5.0
4.0
2.5
17.0
12.0
3.0
2.0
19.0
14.0
Propagation Delay
CPBA or CPAB to A or B
t
t
t
t
t
t
t
t
t
t
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
PLH
PHL
PLH
PHL
PLH
PHL
PZH
PZL
PHZ
PLZ
n
n
3.0
5.0
3.0
2.0
14.5
10.5
2.5
1.5
16.5
12.0
Propagation Delay
CPBA or CPAB to A or B
n
n
3.0
5.0
3.0
2.0
14.0
9.5
2.5
1.5
16.0
11.0
Propagation Delay
A or B to B or A
n
n
3.0
5.0
2.5
1.5
13.0
9.0
2.0
1.0
15.0
10.5
Propagation Delay
A or B to B or A
n
n
3.0
5.0
3.0
2.5
14.0
10.0
2.5
2.0
16.0
11.5
Propagation Delay
SBA or SAB to A or B
n
n
3.0
5.0
2.5
2.0
13.5
10.0
2.0
1.5
15.5
11.5
Propagation Delay
SBA or SAB to A or B
n
n
3.0
5.0
2.5
1.5
12.0
9.0
2.0
1.0
13.5
10.0
Output Enable Time
OEBA to A
n
3.0
5.0
2.5
1.5
12.0
9.0
2.0
1.0
14.0
10.5
Output Enable Time
OEBA to A
n
3.0
5.0
3.0
2.0
13.0
11.0
2.5
1.5
14.0
12.0
Output Disable Time
OEBA to A
n
3.0
5.0
2.5
2.0
12.5
10.5
2.0
1.5
14.0
12.0
Output Disable Time
OEBA to A
n
*Voltage Range 3.3 V is 3.3 V ±0.3 V.
Voltage Range 5.0 V is 5.0 V ±0.5 V.
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5
MC74AC652, MC74ACT652
DC CHARACTERISTICS
Symbol
74ACT
74ACT
T
A
=
V
(V)
CC
T
= +25°C
−40°C to
+85°C
Parameter
Unit
Conditions
A
Typ
Guaranteed Limits
V
V
V
4.5
5.5
1.5
1.5
2.0
2.0
2.0
2.0
V
= 0.1 V
Minimum High Level
Input Voltage
IH
OUT
V
V
V
or V − 0.1 V
CC
4.5
5.5
1.5
1.5
0.8
0.8
0.8
0.8
V
OUT
= 0.1 V
Maximum Low Level
Input Voltage
IL
or V − 0.1 V
CC
4.5
5.5
4.49
5.49
4.4
5.4
4.4
5.4
I
= − 50 μA
Minimum High Level
Output Voltage
OH
OUT
*V = V or V
IN
IL
IH
4.5
5.5
−
−
3.86
4.86
3.76
4.76
V
V
V
− 24 mA
− 24 mA
I
I
OH
V
OL
4.5
5.5
0.001
0.001
0.1
0.1
0.1
0.1
= − 50 μA
OUT
Minimum Low Level
Output Voltage
*V = V or V
IH
IN
IL
4.5
5.5
−
−
0.36
0.36
0.44
0.44
− 24 mA
− 24 mA
I
OH
I
Maximum Input
Leakage Current
V = V , GND
I CC
IN
5.5
5.5
−
±0.1
±1.0
μA
ΔI
Additional Max. I /Input
0.6
−
1.5
mA
V = V − 2.1 V
I CC
CCT
CC
I
V (OE) = V , V
I IL IH
Maximum
3-State
OZT
μA
5.5
−
±0.6
±6.0
V = V , GND
I
CC
Current
V
V
V
= V , GND
CC
O
I
I
I
5.5
5.5
−
−
−
−
75
mA
mA
= 1.65 V Max
= 3.85 V Min
†Minimum Dynamic
Output Current
OLD
OLD
OHD
−75
OHD
CC
Maximum Quiescent
Supply Current
V = V or GND
IN CC
5.5
−
8.0
80
μA
*All outputs loaded; thresholds on input associated with output under test.
†Maximum test duration 2.0 ms, one input loaded at a time.
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6
MC74AC652, MC74ACT652
AC CHARACTERISTICS
Symbol
74ACT
74ACT
= −40°C
T
A
T
= +25°C
V
(V)
*
A
CC
to +85°C
C = 50 pF
Parameter
Unit
C = 50 pF
L
L
Min
Max
Min
Max
Propagation Delay
CPBA or CPAB to A or B
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
4.0
14.5
3.5
16.5
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
PLH
PHL
PLH
PHL
PLH
PHL
PZH
PZL
PHZ
PLZ
PZH
PZL
PHZ
PLZ
s
n
n
Propagation Delay
3.5
2.5
2.5
2.5
3.0
2.0
2.5
3.0
2.5
2.5
2.5
3.5
3.0
7.0
2.5
6.0
14.5
11.5
11.5
12.0
12.0
11.5
11.5
13.0
12.5
12.0
12.0
13.5
13.5
−
3.0
2.0
2.0
2.0
2.5
1.5
2.0
2.5
2.0
2.0
2.0
3.0
2.5
8.0
2.5
7.0
16.5
13.0
13.0
13.5
13.5
13.0
13.0
14.0
14.0
13.5
13.5
14.5
15.0
−
CPBA or CPAB to A or B
n
n
Propagation Delay
A or B to B or A
n
n
Propagation Delay
A or B to B or A
n
n
Propagation Delay
SBA or SAB to A or B
n
n
Propagation Delay
SBA or SAB to A or B
n
n
Output Enable Time
OEBA to A
n
Output Enable Time
OEBA to A
n
Output Disable Time
OEBA to A
n
Output Disable Time
OEBA to A
n
Output Enable time
OEAB to B
n
Output Enable Time
OEAB to B
n
Output Enable Time
OEAB to B
n
Output Enable Time
OEAB to B
n
Setup Time, HIGH or LOW
A or B to CPBA or CPAB
n
n
Hold Time, HIGH or LOW
A or B to CPBA or CPAB
−
−
h
n
n
CPAB, CPBA Pulse Width
HIGH or LOW
−
−
w
*Voltage Range 3.3 V is 3.3 V ±0.3 V.
Voltage Range 5.0 V is 5.0 V ±0.5 V.
CAPACITANCE
Symbol
74ACT
Typ
Parameter
Unit
Test Conditions
C
C
C
Input Capacitance
4.5
15
pF
pF
pF
V
CC
V
CC
V
CC
= 5.0 V
= 5.0 V
= 5.0 V
IN
Input/Output Capacitance
I/O
PD
Power Dissipation Capacitance
60.0
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7
MC74AC652, MC74ACT652
PACKAGE DIMENSIONS
PDIP−24
N SUFFIX
24 PIN PLASTIC DIP PACKAGE
CASE 724−03
ISSUE D
−A−
NOTES:
1. CHAMFERED CONTOUR OPTIONAL.
2. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
3. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
4. CONTROLLING DIMENSION: INCH.
24
1
13
12
−B−
INCHES
DIM MIN MAX
MILLIMETERS
L
MIN
31.25
6.35
3.69
0.38
MAX
32.13
6.85
4.44
0.51
C
A
B
C
D
E
F
1.230
0.250
0.145
0.015
1.265
0.270
0.175
0.020
NOTE 1
−T−
SEATING
PLANE
K
0.050 BSC
1.27 BSC
0.040
0.060
1.02
1.52
N
M
E
G
J
0.100 BSC
2.54 BSC
0.007
0.110
0.012
0.140
0.18
2.80
0.30
3.55
G
J 24 PL
F
K
L
M
M
T B
0.300 BSC
7.62 BSC
0.25 (0.010)
D 24 PL
M
N
0
_
0.020
15
_
0.040
0
_
0.51
15
_
1.01
M
M
T A
0.25 (0.010)
SO−24
DW SUFFIX
24 PIN PLASTIC SOIC PACKAGE
CASE 751E−04
ISSUE E
−A−
NOTES:
24
13
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
−B− 12X P
M
M
B
0.010 (0.25)
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.13 (0.005) TOTAL IN
EXCESS OF D DIMENSION AT MAXIMUM
MATERIAL CONDITION.
1
12
24X D
J
MILLIMETERS
INCHES
MIN
0.601
M
S
S
B
0.010 (0.25)
T
A
DIM MIN
MAX
MAX
0.612
0.299
0.104
0.019
0.035
A
B
C
D
F
15.25
7.40
2.35
0.35
0.41
15.54
7.60 0.292
2.65 0.093
0.49 0.014
0.90 0.016
F
R X 45
_
G
J
1.27 BSC
0.050 BSC
0.23
0.13
0
0.32 0.009
0.29 0.005
0.013
0.011
8
C
K
K
M
P
R
−T−
SEATING
PLANE
8
10.55
0
0.395
_
_
_
_
M
10.05
0.25
0.415
0.029
0.75 0.010
22X G
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8
MC74AC652, MC74ACT652
Notes
http://onsemi.com
9
MC74AC652, MC74ACT652
Notes
http://onsemi.com
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MC74AC652, MC74ACT652
Notes
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MC74AC652/D
相关型号：
MC74AC74DC
D Flip-Flop, AC Series, 2-Func, Positive Edge Triggered, 1-Bit, Complementary Output, CMOS, PDSO14, PLASTIC, SOIC-14
MOTOROLA
MC74AC74DCR1
AC SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14, PLASTIC, SOIC-14
MOTOROLA
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