MC74ACT157DTR2G [ONSEMI]
四路 2 输入多工器;型号: | MC74ACT157DTR2G |
厂家: | ONSEMI |
描述: | 四路 2 输入多工器 输入元件 光电二极管 逻辑集成电路 复用器 解复用器 |
文件: | 总10页 (文件大小:107K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
MC74AC157, MC74ACT157
Quad 2−Input Multiplexer
The MC74AC157/74ACT157 is a high−speed quad 2−input
multiplexer. Four bits of data from two sources can be selected using
the common Select and Enable inputs. The four outputs present the
selected data in the true (noninverted) form.
The MC74AC157/74ACT157 can also be used as a function
generator.
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Features
PDIP−16
N SUFFIX
CASE 648
• Outputs Source/Sink 24 mA
• ′ACT157 Has TTL Compatible Inputs
• Pb−Free Packages are Available*
16
1
SOIC−16
D SUFFIX
CASE 751B
V
E
I
I
Z
I
I
Z
d
CC
0c
1c
c
0d
1d
16
15
14
13
12
11
10
9
16
1
TSSOP−16
DT SUFFIX
CASE 948F
16
1
1
2
3
4
5
6
7
8
S
I
I
Z
I
I
Z
b
GND
0a
1a
a
0b
1b
EIAJ−16
M SUFFIX
CASE 966
Figure 1. Pinout: 16−Lead Packages Conductors
16
(Top View)
1
PIN NAMES
PIN
TRUTH TABLE
FUNCTION
Inputs
Outputs
I
I
−I
Source 0 Data Inputs
Source 0 Data Inputs
0a 0d
E
S
I
0
I
Z
1
−I
1a 1d
H
L
L
L
L
X
H
H
L
X
X
X
L
X
L
H
X
X
L
L
H
L
E
S
Enable Input
Select Input
Outputs
Z −Z
a
d
L
H
H
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
DEVICE MARKING INFORMATION
See general marking information in the device marking
section on page 3 of this data sheet.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
Semiconductor Components Industries, LLC, 2005
1
Publication Order Number:
January, 2005 − Rev. 6
MC74AC157/D
MC74AC157, MC74ACT157
E
I
I
I
I
I
I
0a 1a 0b 1b 0c 1c 0d 1d
I
I
S
Z
Z
Z
Z
d
a
b
c
Figure 2. Logic Symbol
FUNCTIONAL DESCRIPTION
The MC74AC157/74ACT157 is quad 2−input
Z = E•(I •S+I •S)
a 1a 0a
Z = E•(I •S+I •S)
b
1b
0b
a
Z = E•(I •S+I •S)
c
1c
0c
multiplexer. It selects four bits of data from two sources
under the control of a common Select input (S). The Enable
input (E) is active−LOW. When E is HIGH, all of the outputs
(Z) are forced LOW regardless of all other inputs. The
MC74AC157/74ACT157 is the logic implementation of a
4−pole, 2−position switch where the position of the switch
is determined by the logic levels supplied to the Select input.
The logic equations for the outputs are shown below:
Z = E•(I •S+I •S)
d
1d
0d
A common use of the MC74AC157/74ACT157 is the
moving of data from two groups of registers to four common
output busses. The particular register from which the data
comes is determined by the state of the Select input. A less
obvious use is as
a
function generator. The
MC74AC157/74ACT157 can generate any four of the
sixteen different functions of two variables with one
variable common. This is useful for implementing gating
functions.
I
0a
I
1a
I
0b
I
1b
I
0c
I
1c
I
0d
I
1d
E
S
Z
Z
Z
Z
d
a
b
c
NOTE: This diagram is provided only for the understanding of logic
operations and should not be used to estimate propagation delays.
Figure 3. Logic Diagram
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2
MC74AC157, MC74ACT157
MARKING DIAGRAMS
PDIP−16
SOIC−16
TSSOP−16
EIAJ−16
MC74AC157N
AWLYYWW
AC157
AWLYWW
74AC157
ALYW
AC
157
ALYW
ACT157
AWLYWW
MC74ACT157N
AWLYYWW
74ACT157
ALYW
ACT
157
ALYW
A
= Assembly Location
WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week
MAXIMUM RATINGS
Symbol
Parameter
Value
−0.5 to +7.0
−0.5 to V +0.5
Unit
V
V
CC
DC Supply Voltage (Referenced to GND)
V
DC Input Voltage (Referenced to GND)
DC Output Voltage (Referenced to GND)
DC Input Current, per Pin
V
IN
CC
V
OUT
−0.5 to V +0.5
V
CC
I
IN
±20
±50
mA
mA
mA
°C
I
DC Output Sink/Source Current, per Pin
OUT
I
DC V or GND Current per Output Pin
±50
CC
CC
T
stg
Storage Temperature
−65 to +150
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
2.0
4.5
0
Typ
5.0
5.0
−
Max
6.0
Unit
V
′AC
V
CC
Supply Voltage
′ACT
5.5
V
IN
, V
OUT
DC Input Voltage, Output Voltage (Ref. to GND)
V
CC
V
V
CC
V
CC
V
CC
V
CC
V
CC
@ 3.0 V
@ 4.5 V
@ 5.5 V
@ 4.5 V
@ 5.5 V
−
150
40
25
10
8.0
−
−
Input Rise and Fall Time (Note 1)
′AC Devices except Schmitt Inputs
−
−
−
−
−
ns/V
t , t
r
f
−
−
Input Rise and Fall Time (Note 2)
′ACT Devices except Schmitt Inputs
t , t
ns/V
r
f
−
T
J
Junction Temperature (PDIP)
Operating Ambient Temperature Range
Output Current − High
−
140
85
°C
°C
T
A
−40
−
25
−
I
−24
24
mA
mA
OH
I
OL
Output Current − Low
−
−
1. V from 30% to 70% V ; see individual Data Sheets for devices that differ from the typical input rise and fall times.
IN
CC
2. V from 0.8 V to 2.0 V; see individual Data Sheets for devices that differ from the typical input rise and fall times.
IN
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3
MC74AC157, MC74ACT157
DC CHARACTERISTICS
Symbol
74AC
74AC
T
A
=
V
(V)
CC
T
A
= +25°C
−40°C to
+85°C
Parameter
Unit
Conditions
Typ
Guaranteed Limits
V
Minimum High Level
Input Voltage
3.0
4.5
5.5
1.5
2.25
2.75
2.1
3.15
3.85
2.1
3.15
3.85
V
= 0.1 V
IH
OUT
V
V
V
or V − 0.1 V
CC
V
Maximum Low Level
Input Voltage
3.0
4.5
5.5
1.5
2.25
2.75
0.9
1.35
1.65
0.9
1.35
1.65
V
OUT
= 0.1 V
IL
or V − 0.1 V
CC
V
OH
Minimum High Level
Output Voltage
3.0
4.5
5.5
2.99
4.49
5.49
2.9
4.4
5.4
2.9
4.4
5.4
I
= −50 mA
OUT
*V = V or V
IH
IN
IL
3.0
4.5
5.5
−
−
−
2.56
3.86
4.86
2.46
3.76
4.76
−12 mA
−24 mA
−24 mA
V
V
I
OH
V
OL
Maximum Low Level
Output Voltage
3.0
4.5
5.5
0.002
0.001
0.001
0.1
0.1
0.1
0.1
0.1
0.1
I
= 50 mA
OUT
*V = V or V
IN
IL
IH
3.0
4.5
5.5
−
−
−
0.36
0.36
0.36
0.44
0.44
0.44
12 mA
24 mA
24 mA
V
I
OL
I
IN
Maximum Input
Leakage Current
5.5
−
±0.1
±1.0
mA
V = V , GND
I
CC
I
†Minimum Dynamic
Output Current
5.5
5.5
−
−
−
−
75
mA
mA
V
V
= 1.65 V Max
= 3.85 V Min
OLD
OLD
I
−75
OHD
OHD
I
Maximum Quiescent
Supply Current
CC
5.5
−
8.0
80
mA
V = V or GND
IN CC
*All outputs loaded; thresholds on input associated with output under test.
†Maximum test duration 2.0 ms, one output loaded at a time.
NOTE:
I
IN
and I @ 3.0 V are guaranteed to be less than or equal to the respective limit @ 5.5 V V
.
CC
CC
AC CHARACTERISTICS (For Figures and Waveforms − See Section 3 of the ON Semiconductor FACT Data Book, DL138/D)
74AC
74AC
T
= −40°C
A
T
= +25°C
V
(V)
*
Fig.
No.
A
CC
to +85°C
C = 50 pF
Symbol
Parameter
Unit
C = 50 pF
L
L
Min
Typ
Max
Min
Max
3.3
5.0
1.5
1.5
7.0
5.5
11.5
9.0
1.5
1.5
13.0
10.0
Propagation Delay
t
t
t
t
t
t
ns
ns
ns
ns
ns
ns
3−6
3−6
3−6
3−6
3−5
3−5
PLH
PHL
PLH
PHL
PLH
PHL
S to Z
n
3.3
5.0
1.5
1.5
6.5
5.0
11.0
8.5
1.5
1.0
12.0
9.5
Propagation Delay
S to Z
n
3.3
5.0
1.5
1.5
7.0
5.5
11.5
9.0
1.5
1.5
13.0
10.0
Propagation Delay
E to Z
n
3.3
5.0
1.5
1.5
6.5
5.5
11.0
9.0
1.5
1.0
12
9.5
Propagation Delay
E to Z
n
n
3.3
5.0
1.5
1.5
5.0
4.0
8.5
6.5
1.0
1.0
9.0
7.0
Propagation Delay
I to Z
n
n
3.3
5.0
1.5
1.5
5.0
4.0
8.0
6.5
1.0
1.0
9.0
7.0
Propagation Delay
I to Z
n
n
*Voltage Range 3.3 V is 3.3 V ±0.3 V.
*Voltage Range 5.0 V is 5.0 V ±0.5 V.
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4
MC74AC157, MC74ACT157
DC CHARACTERISTICS
Symbol
74ACT
74ACT
T
A
=
V
(V)
CC
T
= +25°C
−40°C to
+85°C
Parameter
Unit
Conditions
A
Typ
Guaranteed Limits
V
4.5
5.5
1.5
1.5
2.0
2.0
2.0
2.0
V
= 0.1 V
Minimum High Level
Input Voltage
IH
OUT
V
V
V
or V − 0.1 V
CC
V
4.5
5.5
1.5
1.5
0.8
0.8
0.8
0.8
V
OUT
= 0.1 V
Maximum Low Level
Input Voltage
IL
or V − 0.1 V
CC
V
OH
4.5
5.5
4.49
5.49
4.4
5.4
4.4
5.4
I
= −50 mA
Minimum High Level
Output Voltage
OUT
*V = V or V
IH
IN
IL
4.5
5.5
−
−
3.86
4.86
3.76
4.76
V
V
−24 mA
−24 mA
I
I
OH
V
OL
4.5
5.5
0.001
0.001
0.1
0.1
0.1
0.1
= 50 mA
OUT
Maximum Low Level
Output Voltage
*V = V or V
IN
IL
IH
4.5
5.5
−
−
0.36
0.36
0.44
0.44
V
24 mA
24 mA
I
OL
I
IN
Maximum Input
Leakage Current
5.5
−
±0.1
±1.0
mA
V = V , GND
I CC
DI
Additional Max. I /Input
5.5
5.5
5.5
0.6
−
−
−
−
1.5
75
mA
mA
mA
V = V − 2.1 V
CCT
CC
I
CC
I
V
OLD
V
OHD
= 1.65 V Max
†Minimum Dynamic
Output Current
OLD
OHD
I
−
−75
= 3.85 V Min
I
Maximum Quiescent
Supply Current
CC
5.5
−
8.0
80
mA
V = V or GND
IN CC
*All outputs loaded; thresholds on input associated with output under test.
†Maximum test duration 2.0 ms, one output loaded at a time.
AC CHARACTERISTICS (For Figures and Waveforms − See Section 3 of the ON Semiconductor FACT Data Book, DL138/D)
74ACT
74ACT
T
= −40°C
A
T
= +25°C
V
(V)
*
Fig.
No.
A
CC
to +85°C
C = 50 pF
Symbol
Parameter
Unit
C = 50 pF
L
L
Min
Typ
Max
Min
Max
Propagation Delay
S to Z
t
t
t
t
t
t
5.0
5.0
5.0
5.0
5.0
5.0
2.0
−
9.0
1.5
10.0
ns
ns
ns
ns
ns
ns
3−6
3−6
3−6
3−6
3−5
3−5
PLH
PHL
PLH
PHL
PLH
PHL
n
Propagation Delay
S to Z
2.0
1.5
1.5
1.5
1.5
−
−
−
−
−
9.5
10
2.0
1.5
1.0
1.0
1.0
10.5
11.5
9.0
n
Propagation Delay
E to Z
n
n
Propagation Delay
E to Z
8.5
7.0
7.5
n
n
Propagation Delay
I to Z
8.5
n
n
Propagation Delay
I to Z
8.5
n
n
*Voltage Range 5.0 V is 5.0 V ±0.5 V.
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5
MC74AC157, MC74ACT157
CAPACITANCE
Symbol
Value
Parameter
Unit
Test Conditions
Typ
4.5
50
C
Input Capacitance
pF
pF
V
V
= 5.0 V
= 5.0 V
IN
CC
C
Power Dissipation Capacitance
PD
CC
ORDERING INFORMATION
†
Device Order Number
Package
Shipping
MC74AC157N
PDIP−16
25 Units / Rail
25 Units / Rail
MC74AC157NG
PDIP−16
(Pb−Free)
MC74ACT157N
MC74AC157D
PDIP−16
SOIC−16
SOIC−16
25 Units / Rail
48 Units / Rail
48 Units / Rail
48 Units / Rail
MC74ACT157D
MC74ACT157DG
SOIC−16
(Pb−Free)
MC74AC157DR2
SOIC−16
2500 Tape & Reel
2500 Tape & Reel
MC74AC157DR2G
SOIC−16
(Pb−Free)
MC74ACT157DR2
MC74ACT157DR2G
SOIC−16
2500 Tape & Reel
2500 Tape & Reel
SOIC−16
(Pb−Free)
MC74AC157DT
MC74ACT157DT
MC74AC157DTR2
MC74ACT157DTR2
MC74AC157M
TSSOP−16*
TSSOP−16*
TSSOP−16*
TSSOP−16*
EIAJ−16
96 Units / Rail
96 Units / Rail
2500 Tape & Reel
2500 Tape & Reel
50 Units / Rail
MC74ACT157M
MC74AC157MEL
MC74ACT157MEL
EIAJ−16
50 Units / Rail
EIAJ−16
2000 Tape & Reel
2000 Tape & Reel
EIAJ−16
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*This package is inherently Pb−Free.
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6
MC74AC157, MC74ACT157
PACKAGE DIMENSIONS
PDIP−16
N SUFFIX
CASE 648−08
ISSUE T
NOTES:
−A−
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS
WHEN FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE
MOLD FLASH.
16
1
9
8
B
S
5. ROUNDED CORNERS OPTIONAL.
INCHES
DIM MIN MAX
0.740 0.770 18.80 19.55
MILLIMETERS
F
C
L
MIN MAX
A
B
C
D
F
0.250 0.270
0.145 0.175
0.015 0.021
6.35
3.69
0.39
1.02
6.85
4.44
0.53
1.77
SEATING
PLANE
−T−
0.040
0.70
G
H
J
K
L
0.100 BSC
2.54 BSC
1.27 BSC
K
M
H
J
0.050 BSC
0.008 0.015
0.110 0.130
0.295 0.305
G
0.21
0.38
3.30
7.74
10
D 16 PL
2.80
7.50
0
M
M
0.25 (0.010)
T
A
M
S
0
10
_
_
_
_
0.020 0.040
0.51
1.01
SOIC−16
D SUFFIX
CASE 751B−05
ISSUE J
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
−A−
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
16
9
8
−B−
P 8 PL
M
S
B
0.25 (0.010)
1
MILLIMETERS
INCHES
MIN
0.386
G
DIM MIN
MAX
MAX
0.393
0.157
0.068
0.019
0.049
A
B
C
D
F
9.80
3.80
1.35
0.35
0.40
10.00
4.00 0.150
1.75 0.054
0.49 0.014
1.25 0.016
F
R X 45
K
_
G
J
1.27 BSC
0.050 BSC
C
0.19
0.10
0
0.25 0.008
0.25 0.004
0.009
0.009
7
−T−
SEATING
PLANE
K
M
P
R
J
7
0
_
_
_
_
M
5.80
0.25
6.20 0.229
0.50 0.010
0.244
0.019
D
16 PL
M
S
S
A
0.25 (0.010)
T
B
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7
MC74AC157, MC74ACT157
PACKAGE DIMENSIONS
TSSOP−16
DT SUFFIX
CASE 948F−01
ISSUE O
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD FLASH.
PROTRUSIONS OR GATE BURRS. MOLD FLASH
OR GATE BURRS SHALL NOT EXCEED 0.15
(0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE INTERLEAD
FLASH OR PROTRUSION. INTERLEAD FLASH OR
PROTRUSION SHALL NOT EXCEED
0.25 (0.010) PER SIDE.
16X KREF
M
S
S
0.10 (0.004)
T
U
V
S
0.15 (0.006) T U
K
K1
16
9
2X L/2
J1
5. DIMENSION K DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN
EXCESS OF THE K DIMENSION AT MAXIMUM
MATERIAL CONDITION.
B
−U−
SECTION N−N
L
J
PIN 1
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE DETERMINED
AT DATUM PLANE −W−.
IDENT.
8
1
N
0.25 (0.010)
MILLIMETERS
INCHES
MIN
DIM MIN
MAX
5.10
4.50
1.20
0.15
0.75
MAX
0.200
0.177
0.047
0.006
0.030
S
0.15 (0.006) T U
A
M
A
B
4.90
4.30
−−−
0.193
0.169
−−−
−V−
C
D
0.05
0.50
0.002
0.020
N
F
F
DETAIL E
G
H
0.65 BSC
0.026 BSC
0.18
0.09
0.09
0.19
0.19
0.28
0.20
0.16
0.30
0.25
0.007
0.004
0.004
0.007
0.007
0.011
0.008
0.006
0.012
0.010
J
J1
K
K1
L
6.40 BSC
0.252 BSC
0
−W−
M
0
8
8
_
_
_
_
C
0.10 (0.004)
DETAIL E
H
SEATING
PLANE
−T−
D
G
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8
MC74AC157, MC74ACT157
PACKAGE DIMENSIONS
EIAJ−16
M SUFFIX
CASE 966−01
ISSUE O
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
16
9
L
E
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH OR PROTRUSIONS AND ARE MEASURED
AT THE PARTING LINE. MOLD FLASH OR
PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006)
PER SIDE.
Q
1
H
E
M
_
E
4. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
1
8
L
5. THE LEAD WIDTH DIMENSION (b) DOES NOT
INCLUDE DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08 (0.003)
TOTAL IN EXCESS OF THE LEAD WIDTH
DIMENSION AT MAXIMUM MATERIAL CONDITION.
DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OR THE FOOT. MINIMUM SPACE
BETWEEN PROTRUSIONS AND ADJACENT LEAD
TO BE 0.46 ( 0.018).
DETAIL P
Z
D
VIEW P
e
A
c
MILLIMETERS
INCHES
MIN
−−−
DIM MIN
MAX
MAX
0.081
0.008
0.020
0.011
0.413
0.215
A
−−−
0.05
0.35
0.18
9.90
5.10
2.05
A
A
1
0.20 0.002
0.50 0.014
0.27 0.007
1
b
0.13 (0.005)
b
c
0.10 (0.004)
M
D
E
10.50 0.390
5.45 0.201
e
1.27 BSC
0.050 BSC
H
7.40
0.50
1.10
8.20 0.291
0.85 0.020
1.50 0.043
0.323
0.033
0.059
E
L
L
E
M
Q
0
10
0.90 0.028
10
_
0.035
0.031
0
_
_
_
0.70
−−−
1
Z
0.78
−−−
http://onsemi.com
9
MC74AC157, MC74ACT157
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