MC74ACT241DWR2 [ONSEMI]

Octal Buffer/Line Driver with 3−State Outputs; 八路缓冲器/ 3态输出的线路驱动器
MC74ACT241DWR2
型号: MC74ACT241DWR2
厂家: ONSEMI    ONSEMI
描述:

Octal Buffer/Line Driver with 3−State Outputs
八路缓冲器/ 3态输出的线路驱动器

驱动器 逻辑集成电路 光电二极管 输出元件
文件: 总8页 (文件大小:94K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
MC74ACT241  
Octal Buffer/Line Driver  
with 3−State Outputs  
The MC74ACT241 is an octal buffer and line driver designed to be  
employed as a memory address driver, clock driver and bus oriented  
transmitter or receiver which provides improved PC board density.  
http://onsemi.com  
MARKING  
Features  
3−State Outputs Drive Bus Lines or Buffer Memory Address  
Registers  
DIAGRAMS  
Outputs Source/Sink 24 mA  
TTL Compatible Inputs  
20  
1
Pb−Free Packages are Available  
ACT241  
AWLYYWWG  
1
SOIC−20W  
DW SUFFIX  
CASE 751D  
V
OE  
19  
YA  
DB  
YA  
DB  
YA  
DB  
YA  
DB  
1
CC  
2
1
4
2
3
3
2
4
20  
18  
17  
16  
15  
14  
12  
13  
11  
20  
ACT  
241  
1
OE  
2
3
YB  
4
DA  
5
YB  
6
DA  
7
YB  
8
DA  
9
YB  
10  
1
ALYWG  
TSSOP−20  
DT SUFFIX  
CASE 948E  
DA  
GND  
1
1
4
2
3
3
2
4
1
G
Figure 1. Pinout: 20−Lead Packages Conductors  
1
(Top View)  
TRUTH TABLE  
Inputs  
OE  
Outputs  
20  
1
D
(Pins 12, 14, 16, 18)  
1
1
74ACT241  
AWLYWWG  
SOEIAJ−20  
M SUFFIX  
CASE 967  
L
L
L
H
X
L
H
Z
H
H = HIGH Voltage Level  
L = LOW Voltage Level  
X = Immaterial  
A
WL, L  
YY, Y  
= Assembly Location  
= Wafer Lot  
= Year  
Z = High Impedance  
WW, W = Work Week  
TRUTH TABLE  
G or G  
= Pb−Free Package  
Inputs  
OE  
Outputs  
(Note: Microdot may be in either location)  
D
(Pins 3, 5, 7, 9)  
2
H
H
L
L
H
X
L
H
Z
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 5 of this data sheet.  
H = HIGH Voltage Level  
L = LOW Voltage Level  
X = Immaterial  
Z = High Impedance  
©
Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
December, 2006 − Rev. 5  
MC74ACT241/D  
MC74ACT241  
MAXIMUM RATINGS  
Symbol  
Parameter  
Value  
Unit  
V
V
DC Supply Voltage  
*0.5 to )7.0  
CC  
V
DC Input Voltage  
*0.5 v V v V )0.5  
V
I
I
CC  
V
DC Output Voltage (Note 1)  
DC Input Diode Current  
*0.5 v V v V )0.5  
V
O
O
CC  
I
$20  
mA  
mA  
mA  
mA  
mA  
_C  
_C  
_C  
_C/W  
IK  
I
I
DC Output Diode Current  
DC Output Sink/Source Current  
DC Supply Current per Output Pin  
DC Ground Current per Output Pin  
Storage Temperature Range  
$50  
$50  
$50  
$100  
OK  
I
O
CC  
I
GND  
T
*65 to )150  
260  
STG  
T
Lead temperature, 1 mm from Case for 10 Seconds  
Junction temperature under Bias  
Thermal Resistance  
L
T
)150  
J
q
SOIC  
TSSOP  
96  
128  
JA  
P
Power Dissipation in Still Air at 85_C  
SOIC  
TSSOP  
500  
450  
mW  
D
MSL  
Moisture Sensitivity  
Flammability Rating  
ESD Withstand Voltage  
Level 1  
F
Oxygen Index: 30% − 35%  
UL 94 V−0 @ 0.125 in  
R
V
Human Body Model (Note 2)  
Machine Model (Note 3)  
> 2000  
> 200  
V
ESD  
Charged Device Model (Note 4)  
> 1000  
I
Latchup Performance  
Above V and Below GND at 85_C (Note 5)  
$100  
mA  
Latchup  
CC  
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the  
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect  
device reliability.  
1. I absolute maximum rating must be observed.  
O
2. Tested to EIA/JESD22−A114−A.  
3. Tested to EIA/JESD22−A115−A.  
4. Tested to JESD22−C101−A.  
5. Tested to EIA/JESD78.  
RECOMMENDED OPERATING CONDITIONS  
Symbol  
Parameter  
Min  
4.5  
0
Typ  
Max  
Unit  
V
V
DC Input Voltage (Referenced to GND)  
DC Input Voltage, Output Voltage (Referenced to GND)  
Operating Temperature, All Package Types  
Input Rise and Fall Time (Note 7)  
5.5  
CC  
V , V  
in out  
V
V
CC  
T
A
−40  
25  
+85  
°C  
t , t  
r
V
V
= 4.5 V  
= 5.5 V  
0
0
10  
8.0  
10  
8.0  
ns/V  
f
CC  
CC  
I
Output Current − High  
Output Current − Low  
−24  
24  
mA  
mA  
OH  
I
OL  
6. Unused Inputs may not be left open. All inputs must be tied to a high voltage level or low logic voltage level.  
7. V from 0.8 V to 2.0 V; refer to individual Data Sheets for devices that differ from the typical input rise and fall times.  
in  
http://onsemi.com  
2
 
MC74ACT241  
DC CHARACTERISTICS  
T
A
= +255C  
T
A
= −405C to +855C  
V
CC  
Typ  
Guaranteed Limits  
(V)  
Symbol  
Parameter  
Unit  
Conditions  
V
Minimum High Level Input Voltage  
Maximum Low Level Input Voltage  
Minimum High Level Output Voltage  
4.5  
5.5  
1.5  
1.5  
2.0  
2.0  
2.0  
2.0  
V
V
V
V
= 0.1 V or  
OUT  
IH  
− 0.1 V  
CC  
V
4.5  
5.5  
1.5  
1.5  
0.8  
0.8  
0.8  
0.8  
V
V
V
V
= 0.1 V or  
OUT  
IL  
− 0.1 V  
CC  
V
4.5  
5.5  
4.49  
5.49  
4.4  
5.4  
4.4  
5.4  
V
V
I
= −50 mA  
OH  
OUT  
4.5  
5.5  
3.86  
4.86  
3.76  
4.76  
V
V
*V = V or V  
−24 mA  
−24 mA  
IN  
IL  
IH  
IH  
I
OH  
V
Maximum Low Level Output Voltage  
Maximum Input Leakage Current  
4.5  
5.5  
0.001  
0.001  
0.1  
0.1  
0.1  
0.1  
V
V
I
= 50 mA  
OUT  
OL  
4.5  
5.5  
0.36  
0.36  
0.44  
0.44  
V
V
*V = V or V  
24 mA  
24 mA  
IN  
OL  
IL  
I
I
5.5  
5.5  
5.5  
0.6  
0.1  
1.0  
1.5  
5.0  
mA  
mA  
mA  
V = V , GND  
I CC  
IN  
DI  
Additional Maximum I /Input  
V = V − 2.1 V  
I CC  
CCT  
OZ  
CC  
I
Maximum 3−State Current  
0.5  
V (OE) = V , V  
I IL IH  
V = V , GND  
I
CC  
V
= V , GND  
O
CC  
I
I
†Minimum Dynamic Output Current  
Maximum Quiescent Supply Current  
5.5  
5.5  
75  
−75  
mA  
mA  
V
V
= 1.65 V Max  
= 3.85 V Min  
OLD  
OHD  
OLD  
OHD  
I
5.5  
8.0  
80  
mA  
V
= V or GND  
IN CC  
CC  
*All outputs loaded; thresholds on input associated with output under test.  
†Maximum test duration 2.0 ms, one output loaded at a time.  
AC CHARACTERISTICS tr = tf = 3.0 ns (For Figures and Waveforms, See Figures 2, 3, and 4.)  
T
C
= +255C  
T
A
= −405C to +855C  
A
= 50 pF  
C = 50 pF  
L
L
V
*
CC  
Min  
1.5  
1.5  
1.5  
1.5  
1.5  
2.0  
Typ  
6.5  
7.0  
6.0  
7.0  
8.0  
7.0  
Max  
9.0  
Min  
Max  
10.0  
10.0  
10.0  
11.0  
11.5  
11.5  
(V)  
5.0  
5.0  
5.0  
5.0  
5.0  
5.0  
Symbol  
Parameter  
Unit  
t
t
t
Propagation Delay Data to Output  
1.5  
1.5  
1.0  
1.5  
1.5  
1.5  
ns  
PLH  
PHL  
PZH  
Propagation Delay Data to Output  
Output Enable Time  
9.0  
ns  
ns  
ns  
ns  
ns  
9.0  
t
Output Enable Time  
10.0  
10.5  
10.5  
PZL  
PHZ  
t
Output Disable Time  
t
Output Disable Time  
PLZ  
*Voltage Range 5.0 V is 5.0 V 0.5 V  
CAPACITANCE  
Symbol  
Parameter  
Value Typ  
Unit  
pF  
Test Conditions  
C
IN  
Input Capacitance  
4.5  
45  
V
V
= 5.0 V  
= 5.0 V  
CC  
CC  
C
PD  
Power Dissipation Capacitance  
pF  
http://onsemi.com  
3
MC74ACT241  
SWITCHING WAVEFORMS  
t
t
f
r
3.0 V  
GND  
50%  
INPUT  
DATA  
t
w
1/f  
max  
t
t
PHL  
PLH  
50%  
OUTPUT  
Figure 2.  
3.0 V  
GND  
OE  
1.3 V  
1.3 V  
1
2
3.0 V  
GND  
OE  
t
t
PZL PLZ  
HIGH  
IMPEDANCE  
OUTPUT Y  
(12, 14, 16, 18)  
1.3 V  
10%  
90%  
V
V
OL  
t
t
PZH PHZ  
OH  
OUTPUT Y  
(3, 5, 7, 9)  
1.3 V  
HIGH  
IMPEDANCE  
Figure 3.  
450 W  
OUTPUT  
50 W SCOPE  
TEST POINT  
INPUT  
DEVICE  
UNDER  
TEST  
C *  
L
*Includes all probe and jig capacitance  
Figure 4. Test Circuit  
http://onsemi.com  
4
MC74ACT241  
ORDERING INFORMATION  
Device  
Package  
Shipping  
MC74ACT241DW  
MC74ACT241DWG  
SOIC−20  
38 Units / Rail  
SOIC−20  
(Pb−Free)  
MC74ACT241DWR2  
MC74ACT241DWR2G  
SOIC−20  
1000 / Tape & Reel  
2500 / Tape & Reel  
2000 / Tape & Reel  
SOIC−20  
(Pb−Free)  
MC74ACT241DTR2  
MC74ACT241DTR2G  
MC74ACT241MEL  
MC74ACT241MELG  
TSSOP−20*  
TSSOP−20*  
SOEIAJ−20  
SOEIAJ−20  
(Pb−Free)  
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging  
Specifications Brochure, BRD8011/D.  
*These packages are inherently Pb−Free.  
http://onsemi.com  
5
MC74ACT241  
PACKAGE DIMENSIONS  
SOIC−20W  
DW SUFFIX  
CASE 751D−05  
ISSUE G  
NOTES:  
D
1. DIMENSIONS ARE IN MILLIMETERS.  
2. INTERPRET DIMENSIONS AND TOLERANCES  
PER ASME Y14.5M, 1994.  
A
q
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD  
PROTRUSION.  
20  
11  
4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE.  
5. DIMENSION B DOES NOT INCLUDE DAMBAR  
PROTRUSION. ALLOWABLE PROTRUSION  
SHALL BE 0.13 TOTAL IN EXCESS OF B  
DIMENSION AT MAXIMUM MATERIAL  
CONDITION.  
E
B
MILLIMETERS  
1
10  
DIM MIN  
MAX  
2.65  
0.25  
0.49  
0.32  
12.95  
7.60  
A
A1  
B
C
D
E
2.35  
0.10  
0.35  
0.23  
12.65  
7.40  
20X B  
M
S
S
B
0.25  
T A  
e
1.27 BSC  
H
h
10.05  
0.25  
0.50  
0
10.55  
0.75  
0.90  
7
A
L
q
_
_
SEATING  
PLANE  
18X e  
A1  
C
T
http://onsemi.com  
6
MC74ACT241  
PACKAGE DIMENSIONS  
TSSOP−20  
DT SUFFIX  
CASE 948E−02  
ISSUE C  
NOTES:  
1. DIMENSIONING AND TOLERANCING PER  
ANSI Y14.5M, 1982.  
2. CONTROLLING DIMENSION:  
MILLIMETER.  
20X K REF  
K
M
S
S
V
0.10 (0.004)  
T
U
S
U
K1  
0.15 (0.006) T  
3. DIMENSION A DOES NOT INCLUDE  
MOLD FLASH, PROTRUSIONS OR GATE  
BURRS. MOLD FLASH OR GATE BURRS  
SHALL NOT EXCEED 0.15 (0.006) PER SIDE.  
4. DIMENSION B DOES NOT INCLUDE  
INTERLEAD FLASH OR PROTRUSION.  
INTERLEAD FLASH OR PROTRUSION  
SHALL NOT EXCEED 0.25 (0.010) PER SIDE.  
5. DIMENSION K DOES NOT INCLUDE  
DAMBAR PROTRUSION. ALLOWABLE  
DAMBAR PROTRUSION SHALL BE 0.08  
(0.003) TOTAL IN EXCESS OF THE K  
DIMENSION AT MAXIMUM MATERIAL  
CONDITION.  
J J1  
20  
11  
2X L/2  
B
SECTION N−N  
L
−U−  
PIN 1  
IDENT  
0.25 (0.010)  
N
1
10  
M
6. TERMINAL NUMBERS ARE SHOWN FOR  
REFERENCE ONLY.  
7. DIMENSION A AND B ARE TO BE  
DETERMINED AT DATUM PLANE −W−.  
S
0.15 (0.006) T  
U
A
−V−  
N
MILLIMETERS  
INCHES  
DIM MIN  
MAX  
6.60  
4.50  
1.20  
0.15  
0.75  
MIN  
MAX  
0.260  
0.177  
F
A
B
6.40  
4.30  
−−−  
0.252  
0.169  
DETAIL E  
C
−−− 0.047  
0.006  
0.030  
D
0.05  
0.50  
0.002  
0.020  
F
G
H
0.65 BSC  
0.026 BSC  
−W−  
0.27  
0.09  
0.09  
0.19  
0.19  
0.37  
0.20  
0.16  
0.30  
0.25  
0.011  
0.004  
0.004  
0.007  
0.007  
0.015  
0.008  
0.006  
0.012  
0.010  
C
J
J1  
K
G
D
H
K1  
L
DETAIL E  
6.40 BSC  
0.252 BSC  
0
0.100 (0.004)  
−T− SEATING  
M
0
8
8
_
_
_
_
PLANE  
SOLDERING FOOTPRINT*  
7.06  
1
0.65  
PITCH  
16X  
0.36  
16X  
1.26  
DIMENSIONS: MILLIMETERS  
*For additional information on our Pb−Free strategy and soldering  
details, please download the ON Semiconductor Soldering and  
Mounting Techniques Reference Manual, SOLDERRM/D.  
http://onsemi.com  
7
MC74ACT241  
PACKAGE DIMENSIONS  
SOEIAJ−20  
M SUFFIX  
CASE 967−01  
ISSUE A  
NOTES:  
ꢀꢁ1. DIMENSIONING AND TOLERANCING PER ANSI  
Y14.5M, 1982.  
L
20  
11  
E
Q
ꢀꢁ2. CONTROLLING DIMENSION: MILLIMETER.  
ꢀꢁ3. DIMENSIONS D AND E DO NOT INCLUDE  
MOLD FLASH OR PROTRUSIONS AND ARE  
MEASURED AT THE PARTING LINE. MOLD FLASH  
OR PROTRUSIONS SHALL NOT EXCEED 0.15  
(0.006) PER SIDE.  
1
H
E
E
_
M
ꢀꢁ4. TERMINAL NUMBERS ARE SHOWN FOR  
REFERENCE ONLY.  
L
1
10  
ꢀꢁ5. THE LEAD WIDTH DIMENSION (b) DOES NOT  
INCLUDE DAMBAR PROTRUSION. ALLOWABLE  
DAMBAR PROTRUSION SHALL BE 0.08 (0.003)  
TOTAL IN EXCESS OF THE LEAD WIDTH  
DIMENSION AT MAXIMUM MATERIAL CONDITION.  
DAMBAR CANNOT BE LOCATED ON THE LOWER  
RADIUS OR THE FOOT. MINIMUM SPACE  
BETWEEN PROTRUSIONS AND ADJACENT LEAD  
TO BE 0.46 ( 0.018).  
DETAIL P  
Z
D
VIEW P  
e
A
c
MILLIMETERS  
INCHES  
MIN MAX  
−−− 0.081  
DIM MIN  
MAX  
2.05  
0.20  
0.50  
0.25  
12.80  
5.45  
A
−−−  
0.05  
A
1
A
b
1
0.002  
0.008  
0.020  
0.010  
0.504  
0.215  
b
c
0.35  
0.15  
0.014  
0.006  
0.486  
0.201  
M
0.10 (0.004)  
0.13 (0.005)  
D
E
e
12.35  
5.10  
1.27 BSC  
0.050 BSC  
H
7.40  
0.50  
1.10  
8.20  
0.85  
1.50  
0.291  
0.020  
0.043  
0.323  
0.033  
0.059  
E
L
L
E
M
Q
0
10  
10  
0.035  
0
0.028  
_
_
_
_
0.70  
−−−  
0.90  
0.81  
1
Z
−−− 0.032  
ON Semiconductor and  
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice  
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability  
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.  
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All  
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights  
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications  
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should  
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MC74ACT241/D  

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