MC74ACT257M [ONSEMI]
Quad 2−Input Multiplexer with 3−State Outputs; 四2输入多路复用器具有三态输出
| 型号： | MC74ACT257M |
| 厂家： | 
ONSEMI |
| 描述： | Quad 2−Input Multiplexer with 3−State Outputs |
| 文件： | 总12页 (文件大小：182K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MC74AC257, MC74ACT257
Quad 2−Input Multiplexer
with 3−State Outputs
The MC74AC257/74ACT257 is a quad 2−input multiplexer with
3−state outputs. Four bits of data from two sources can be selected
using a Common Data Select input. The four outputs present the
selected data in true (noninverted) form. The outputs may be switched
to a high impedance state by placing a logic HIGH on the common
Output Enable (OE) input, allowing the outputs to interface directly
with bus−oriented systems.
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DIP−16
N SUFFIX
CASE 648
• Multiplexer Expansion by Tying Outputs Together
• Noninverting 3−State Outputs
16
1
• Outputs Source/Sink 24 mA
• ′ACT257 Has TTL Compatible Inputs
SO−16
w These devices are available in Pb−free package(s). Specifications herein
apply to both standard and Pb−free devices. Please see our website at
www.onsemi.com for specific Pb−free orderable part numbers, or
contact your local ON Semiconductor sales office or representative.
D SUFFIX
CASE 751B
16
1
V
OE
I
I
Z
I
I
Z
d
CC
0c
1c
c
0d
1d
TSSOP−16
DT SUFFIX
CASE 948F
16
15
14
13
12
11
10
9
16
1
EIAJ−16
M SUFFIX
CASE 966
16
1
2
3
4
5
6
7
8
1
S
I
0a
I
1a
Z
I
0b
I
1b
Z
b
GND
a
ORDERING INFORMATION
Figure 1. Pinout: 16−Lead Packages Conductors
Device
Package
Shipping
(Top View)
MC74AC257N
MC74ACT257N
MC74AC257D
MC74ACT257D
MC74AC257DR2
25 Units/Rail
25 Units/Rail
PDIP−16
PDIP−16
SOIC−16
48 Units/Rail
48 Units/Rail
SOIC−16
SOIC−16
2500 Tape & Reel
MC74ACT257DR2
MC74AC257DT
2500 Tape & Reel
96 Units/Rail
SOIC−16
TSSOP−16
MC74ACT257DT
MC74AC257DTR2
96 Units/Rail
TSSOP−16
TSSOP−16
2500 Tape & Reel
MC74ACT257DTR2
MC74ACT257M
2500 Tape & Reel
50 Units/Rail
TSSOP−16
EIAJ−16
MC74AC257MEL
MC74ACT257MEL
2000 Tape & Reel
2000 Tape & Reel
EIAJ−16
EIAJ−16
DEVICE MARKING INFORMATION
See general marking information in the device marking
section on page 8 of this data sheet.
© Semiconductor Components Industries, LLC, 2006
1
Publication Order Number:
March, 2006 − Rev. 7
MC74AC257/D
MC74AC257, MC74ACT257
PIN NAME
PIN
S
FUNCTION
Common Data Select Input
3−State Output Enable Input
Data Inputs from Source 0
Data Inputs from Source 1
3−State Multiplexer Outputs
OE
I −I
0a 0d
I −I
1a 1d
Z −Z
a
d
TRUTH TABLE
Output
Enable
Select
Input
Data
Inputs
Outputs
OE
S
I
0
I
1
Z
H
L
L
L
L
X
H
H
L
X
X
X
L
X
L
H
X
X
Z
L
H
L
L
H
H
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance
implementation of a 4−pole, 2−position switch where the
position of the switch is determined by the logic levels
supplied to the Select input. The logic equations for the
outputs are shown below:
OE I
I
I
I
I
I
0a 1a 0b 1b 0c 1c 0d 1d
I
I
S
Z
Z
Z
Z
d
Z = OE•(I •S+I •S)
a
b
c
a
1a
0a
Z = OE•(I •S+I •S)
b
1b
0b
Z = OE•(I •S+I •S)
c
1c
0c
Figure 2. Logic Symbol
Z = OE•(I •S+I •S)
d
1d
0d
FUNCTIONAL DESCRIPTION
The MC74AC257/74ACT257 is quad 2−input
multiplexer with 3−state outputs. It selects four bits of data
from two sources under control of a Common Data Select
When the Output Enable input (OE) is HIGH, the outputs
are forced to a high impedance state. If the outputs are tied
together, all but one device must be in the high impedance
state to avoid high currents that would exceed the maximum
ratings. Designers should ensure the Output Enable signals
to 3−state devices whose outputs are tied together are
designed so there is no overlap.
a
input. When the Select input is LOW, the I inputs are
0x
selected and when Select is HIGH, the I inputs are
1x
selected. The data on the selected inputs appears at the
outputs in true (noninverted) form. The device is the logic
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2
MC74AC257, MC74ACT257
OE
I
0a
I
1a
I
0b
I
1b
I
0c
I
1c
I
0d
I
1d
S
Z
Z
Z
Z
d
a
b
c
NOTE: This diagram is provided only for the understanding of logic operations
and should not be used to estimate propagation delays.
Figure 3. Logic Diagram
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3
MC74AC257, MC74ACT257
MAXIMUM RATINGS*
Symbol
Parameter
Value
Unit
V
V
V
V
DC Supply Voltage (Referenced to GND)
−0.5 to +7.0
CC
DC Input Voltage (Referenced to GND)
DC Output Voltage (Referenced to GND)
DC Input Current, per Pin
−0.5 to V +0.5
V
IN
CC
−0.5 to V +0.5
V
OUT
CC
I
I
I
±20
±50
mA
mA
mA
°C
IN
DC Output Sink/Source Current, per Pin
OUT
CC
DC V or GND Current per Output Pin
±50
CC
T
stg
Storage Temperature
−65 to +150
*Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recom-
mended Operating Conditions.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
2.0
4.5
0
Typ
5.0
5.0
−
Max
6.0
Unit
′AC
V
V
Supply Voltage
V
V
CC
′ACT
5.5
, V
OUT
DC Input Voltage, Output Voltage (Ref. to GND)
V
CC
IN
V
CC
V
CC
V
CC
V
CC
V
CC
@ 3.0 V
@ 4.5 V
@ 5.5 V
@ 4.5 V
@ 5.5 V
−
150
40
25
10
8.0
−
−
Input Rise and Fall Time (Note 1)
′AC Devices except Schmitt Inputs
−
−
−
−
−
ns/V
t , t
r
f
−
−
Input Rise and Fall Time (Note 2)
′ACT Devices except Schmitt Inputs
t , t
ns/V
r
f
−
T
J
Junction Temperature (PDIP)
Operating Ambient Temperature Range
Output Current − High
−
140
85
°C
°C
T
A
−40
−
25
−
I
I
−24
24
mA
mA
OH
OL
Output Current − Low
−
−
1. 1.
V from 30% to 70% V ; see individual Data Sheets for devices that differ from the typical input rise and fall times.
in CC
in
2. 2. V from 0.8 V to 2.0 V; see individual Data Sheets for devices that differ from the typical input rise and fall times.
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4
MC74AC257, MC74ACT257
DC CHARACTERISTICS
Symbol
74AC
74AC
T
A
=
V
(V)
CC
T
= +25°C
−40°C to
+85°C
Parameter
Unit
Conditions
A
Typ
Guaranteed Limits
V
V
V
3.0
4.5
5.5
1.5
2.25
2.75
2.1
3.15
3.85
2.1
3.15
3.85
V
= 0.1 V
Minimum High Level
Input Voltage
IH
OUT
V
V
V
or V − 0.1 V
CC
3.0
4.5
5.5
1.5
2.25
2.75
0.9
1.35
1.65
0.9
1.35
1.65
V
OUT
= 0.1 V
Maximum Low Level
Input Voltage
IL
or V − 0.1 V
CC
3.0
4.5
5.5
2.99
4.49
5.49
2.9
4.4
5.4
2.9
4.4
5.4
I
= −50 mA
Minimum High Level
Output Voltage
OH
OUT
*V = V or V
IH
IN
IL
3.0
4.5
5.5
−
−
−
2.56
3.86
4.86
2.46
3.76
4.76
−12 mA
−24 mA
−24 mA
V
V
V
I
OH
V
OL
3.0
4.5
5.5
0.002
0.001
0.001
0.1
0.1
0.1
0.1
0.1
0.1
I
= 50 mA
OUT
Maximum Low Level
Output Voltage
*V = V or V
IN
IL
IH
3.0
4.5
5.5
−
−
−
0.36
0.36
0.36
0.44
0.44
0.44
12 mA
24 mA
24 mA
I
OL
I
Maximum Input
Leakage Current
IN
5.5
5.5
−
−
±0.1
±0.5
±1.0
±5.0
mA
mA
V = V , GND
I CC
I
V (OE) = V , V
I IL IH
Maximum
3−State
Current
OZ
V = V , GND
I
CC
V
O
= V , GND
CC
I
I
I
5.5
5.5
−
−
−
−
75
mA
mA
V
= 1.65 V Max
†Minimum Dynamic
Output Current
OLD
OHD
CC
OLD
OHD
−75
V
V
= 3.85 V Min
Maximum Quiescent
Supply Current
5.5
−
8.0
80
mA
= V or GND
IN CC
*All outputs loaded; thresholds on input associated with output under test.
†Maximum test duration 2.0 ms, one output loaded at a time.
NOTE:
I
IN
and I @ 3.0 V are guaranteed to be less than or equal to the respective limit @ 5.5 V V
.
CC
CC
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5
MC74AC257, MC74ACT257
AC CHARACTERISTICS (For Figures and Waveforms − See Section 3 of the ON Semiconductor FACT Data Book, DL138/D)
74AC
74AC
T
= −40°C
A
T
= +25°C
V
(V)
*
Fig.
No.
A
CC
to +85°C
C = 50 pF
Symbol
Parameter
Unit
C = 50 pF
L
L
Min
Typ
Max
Min
Max
Propagation Delay
I to Z
3.3
5.0
1.5
1.5
5.0
4.0
8.5
6.0
1.0
1.0
9.0
7.0
t
t
t
t
t
t
t
t
ns
ns
ns
ns
ns
ns
ns
ns
3−5
3−5
3−6
3−6
3−7
3−8
3−7
3−8
PLH
n
n
Propagation Delay
I to Z
3.3
5.0
1.5
1.5
6.0
4.5
8.5
6.0
1.0
1.0
9.0
7.0
PHL
PLH
PHL
PZH
PZL
PHZ
PLZ
n
n
Propagation Delay
S to Z
3.3
5.0
1.5
1.5
7.0
5.0
10.5
7.5
1.5
1.0
11.5
8.5
n
Propagation Delay
S to Z
3.3
5.0
1.5
1.5
7.5
5.5
10.5
7.5
1.5
1.0
11.5
8.5
n
3.3
5.0
1.5
1.5
6.5
5.0
9.5
7.5
1.0
1.0
10.5
8.5
Output Enable Time
Output Enable Time
Output Disable Time
Output Disable Time
3.3
5.0
1.5
1.5
5.5
5.0
9.0
8.5
1.0
1.0
10.0
9.5
3.3
5.0
1.5
1.5
5.5
5.0
10.0
9.0
1.0
1.0
11.0
10.0
3.3
5.0
1.5
1.5
5.5
5.0
9.0
8.0
1.0
1.0
10.0
9.0
*Voltage Range 3.3 V is 3.3 V ±0.3 V.
*Voltage Range 5.0 V is 5.0 V ±0.5 V.
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6
MC74AC257, MC74ACT257
DC CHARACTERISTICS
Symbol
74ACT
74ACT
T
A
=
V
(V)
CC
T
= +25°C
−40°C to
+85°C
Parameter
Unit
Conditions
A
Typ
Guaranteed Limits
V
V
V
4.5
5.5
1.5
1.5
2.0
2.0
2.0
2.0
V
= 0.1 V
Minimum High Level
Input Voltage
IH
OUT
V
V
V
or V − 0.1 V
CC
4.5
5.5
1.5
1.5
0.8
0.8
0.8
0.8
V
OUT
= 0.1 V
Maximum Low Level
Input Voltage
IL
or V − 0.1 V
CC
4.5
5.5
4.49
5.49
4.4
5.4
4.4
5.4
I
= −50 mA
Minimum High Level
Output Voltage
OH
OUT
*V = V or V
IH
IN
IL
4.5
5.5
−
−
3.86
4.86
3.76
4.76
V
V
V
−24 mA
−24 mA
I
I
OH
V
OL
4.5
5.5
0.001
0.001
0.1
0.1
0.1
0.1
= 50 mA
OUT
Maximum Low Level
Output Voltage
*V = V or V
IN
IL
IH
4.5
5.5
−
−
0.36
0.36
0.44
0.44
24 mA
24 mA
I
OL
I
Maximum Input
Leakage Current
IN
5.5
5.5
−
±0.1
±1.0
mA
V = V , GND
I CC
DI
Additional Max. I /Input
0.6
−
1.5
mA
V = V − 2.1 V
I CC
CCT
CC
I
V (OE) = V , V
I IL IH
Maximum
3−State
Current
OZ
5.5
−
±0.5
±5.0
mA
V = V , GND
I
CC
V
V
V
= V , GND
O
CC
I
I
I
5.5
5.5
−
−
−
−
75
mA
mA
= 1.65 V Max
†Minimum Dynamic
Output Current
OLD
OLD
OHD
−75
= 3.85 V Min
OHD
CC
Maximum Quiescent
Supply Current
5.5
−
8.0
80
mA
V = V or GND
IN CC
*All outputs loaded; thresholds on input associated with output under test.
†Maximum test duration 2.0 ms, one output loaded at a time.
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7
MC74AC257, MC74ACT257
AC CHARACTERISTICS (For Figures and Waveforms − See Section 3 of the ON Semiconductor FACT Data Book, DL138/D)
74ACT
74ACT
T
= −40°C
A
T
= +25°C
V
(V)
*
Fig.
No.
A
CC
to +85°C
C = 50 pF
Symbol
Parameter
Unit
C = 50 pF
L
L
Min
Typ
Max
Min
Max
Propagation Delay
I to Z
t
t
t
t
5.0
5.0
5.0
5.0
1.5
5.0
7.0
1.0
7.5
ns
ns
ns
ns
3−6
3−6
3−6
3−6
PLH
n
n
Propagation Delay
I to Z
2.0
2.0
2.5
6.0
7.0
7.0
7.5
9.5
1.5
1.5
2.0
8.5
10.5
11.5
PHL
PLH
PHL
n
n
Propagation Delay
S to Z
n
Propagation Delay
S to Z
10.5
n
t
t
t
t
Output Enable Time
Output Enable Time
Output Disable Time
Output Disable Time
5.0
5.0
5.0
5.0
2.0
2.0
2.5
2.0
6.0
6.0
6.5
6.0
8.0
8.0
9.0
7.5
1.5
1.5
1.5
1.5
9.0
9.0
ns
ns
ns
ns
3−7
3−8
3−7
3−8
PZH
PZL
PHZ
PLZ
10.0
8.5
*Voltage Range 5.0 V is 5.0 V ±0.5 V.
CAPACITANCE
Symbol
Value
Parameter
Unit
Test Conditions
Typ
4.5
50
C
C
Input Capacitance
pF
pF
V
V
= 5.0 V
= 5.0 V
IN
CC
Power Dissipation Capacitance
PD
CC
MARKING DIAGRAMS
DIP−16
SO−16
TSSOP−16
EIAJ−16
MC74AC257N
AWLYYWW
AC257
AWLYWW
74AC257
ALYW
AC
257
ALYW
ACT257
AWLYWW
MC74ACT257N
AWLYYWW
74ACT257
ALYW
ACT
257
ALYW
A
= Assembly Location
WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week
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8
MC74AC257, MC74ACT257
PACKAGE DIMENSIONS
PDIP−16
N SUFFIX
16 PIN PLASTIC DIP PACKAGE
CASE 648−08
ISSUE R
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
−A−
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
16
1
9
8
B
S
INCHES
DIM MIN MAX
MILLIMETERS
MIN
18.80
6.35
3.69
0.39
1.02
MAX
19.55
6.85
4.44
0.53
1.77
F
A
B
C
D
F
0.740
0.250
0.145
0.015
0.040
0.770
0.270
0.175
0.021
0.70
C
L
SEATING
PLANE
−T−
G
H
J
0.100 BSC
0.050 BSC
2.54 BSC
1.27 BSC
K
M
0.008
0.015
0.130
0.305
10
0.21
0.38
3.30
7.74
10
H
J
K
L
0.110
0.295
0
2.80
7.50
0
G
D 16 PL
M
S
_
_
_
_
0.020
0.040
0.51
1.01
M
M
0.25 (0.010)
T A
SO−16
D SUFFIX
16 PIN PLASTIC SOIC PACKAGE
CASE 751B−05
ISSUE J
−A−
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
16
9
8
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
−B−
P 8 PL
M
S
B
0.25 (0.010)
1
G
MILLIMETERS
INCHES
MIN
0.386
DIM MIN
MAX
MAX
0.393
0.157
0.068
0.019
0.049
F
A
B
C
D
F
9.80
3.80
1.35
0.35
0.40
10.00
R X 45
K
_
4.00 0.150
1.75 0.054
0.49 0.014
1.25 0.016
C
G
J
1.27 BSC
0.050 BSC
−T−
SEATING
PLANE
0.19
0.10
0
0.25 0.008
0.25 0.004
0.009
0.009
7
J
M
K
M
P
R
D
16 PL
7
0
_
_
_
_
5.80
0.25
6.20 0.229
0.50 0.010
0.244
0.019
M
S
S
A
0.25 (0.010)
T
B
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9
MC74AC257, MC74ACT257
PACKAGE DIMENSIONS
TSSOP−16
DT SUFFIX
16 PIN PLASTIC TSSOP PACKAGE
CASE948F−01
ISSUE O
16X KREF
M
S
S
0.10 (0.004)
T
U
V
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD FLASH.
PROTRUSIONS OR GATE BURRS. MOLD FLASH
OR GATE BURRS SHALL NOT EXCEED 0.15
(0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE INTERLEAD
FLASH OR PROTRUSION. INTERLEAD FLASH OR
PROTRUSION SHALL NOT EXCEED
0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN
EXCESS OF THE K DIMENSION AT MAXIMUM
MATERIAL CONDITION.
S
U
0.15 (0.006) T
K
K1
16
9
2X L/2
J1
B
SECTION N−N
L
−U−
J
PIN 1
IDENT.
8
1
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE DETERMINED
AT DATUM PLANE −W−.
N
0.25 (0.010)
S
0.15 (0.006) T
U
A
M
MILLIMETERS
INCHES
MIN
−V−
DIM MIN
MAX
5.10
4.50
1.20
0.15
0.75
MAX
0.200
0.177
0.047
0.006
0.030
A
B
4.90
4.30
−−−
0.193
0.169
−−−
N
C
F
DETAIL E
D
0.05
0.50
0.002
0.020
F
G
H
0.65 BSC
0.026 BSC
0.18
0.09
0.09
0.19
0.19
0.28
0.20
0.16
0.30
0.25
0.007
0.004
0.004
0.007
0.007
0.011
0.008
0.006
0.012
0.010
J
J1
K
−W−
C
K1
L
6.40 BSC
_
0.252 BSC
0
0.10 (0.004)
M
0
8
8
_
_
_
DETAIL E
H
SEATING
PLANE
−T−
D
G
EIAJ−16
M SUFFIX
16 PIN PLASTIC EIAJ PACKAGE
CASE966−01
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
ISSUE O
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH OR PROTRUSIONS AND ARE MEASURED
AT THE PARTING LINE. MOLD FLASH OR
PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006)
PER SIDE.
L
16
9
E
Q
1
H
E
M
_
4. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
E
5. THE LEAD WIDTH DIMENSION (b) DOES NOT
INCLUDE DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08 (0.003)
TOTAL IN EXCESS OF THE LEAD WIDTH
DIMENSION AT MAXIMUM MATERIAL CONDITION.
DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OR THE FOOT. MINIMUM SPACE
BETWEEN PROTRUSIONS AND ADJACENT LEAD
TO BE 0.46 ( 0.018).
1
8
L
DETAIL P
Z
D
VIEW P
e
MILLIMETERS
INCHES
MIN
−−−
A
DIM MIN
MAX
MAX
0.081
0.008
0.020
0.011
0.413
0.215
c
A
−−−
0.05
0.35
0.18
9.90
5.10
2.05
A
1
0.20 0.002
0.50 0.014
0.27 0.007
b
c
D
E
10.50 0.390
5.45 0.201
A
1
b
0.13 (0.005)
e
1.27 BSC
0.050 BSC
0.10 (0.004)
M
H
7.40
0.50
1.10
8.20 0.291
0.85 0.020
1.50 0.043
0.323
0.033
0.059
E
L
L
E
M
Q
0
10
0.90 0.028
10
_
0.035
0.031
0
_
_
_
0.70
−−−
1
Z
0.78
−−−
http://onsemi.com
10
MC74AC257, MC74ACT257
Notes
http://onsemi.com
11
MC74AC257, MC74ACT257
Notes
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