MC74ACT573N [ONSEMI]

OCTAL D-TYPE LATCH WITH 3-STATE OUTPUTS; 八D型锁存器带3态输出
MC74ACT573N
型号: MC74ACT573N
厂家: ONSEMI    ONSEMI
描述:

OCTAL D-TYPE LATCH WITH 3-STATE OUTPUTS
八D型锁存器带3态输出

锁存器 逻辑集成电路 光电二极管 输出元件 驱动
文件: 总12页 (文件大小:126K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
MC74AC573, MC74ACT573  
Octal Buffer/Line Driver  
with 3−State Outputs  
The MC74AC573/74ACT573 is a high−speed octal latch with  
buffered common Latch Enable (LE) and buffered common Output  
Enable (OE) inputs.  
The MC74AC573/74ACT573 is functionally identical to the  
MC74AC373/74ACT373 but has inputs and outputs on opposite sides.  
http://onsemi.com  
MARKING  
Features  
DIAGRAM  
Inputs and Outputs on Opposite Sides of Package Allowing Easy  
Interface with Microprocessors  
Useful as Input or Output Port for Microprocessors  
MC74xxx573N  
AWLYYWWG  
20  
Functionally Identical to MC74AC373/74ACT373  
3−State Outputs for Bus Interfacing  
Outputs Source/Sink 24 mA  
1
PDIP−20  
N SUFFIX  
CASE 738  
ACT573 Has TTL Compatible Inputs  
Pb−Free Packages are Available*  
V
O
O
O
O
O
O
5
O
6
O
7
LE  
11  
CC  
0
1
2
3
4
xxx573  
AWLYYWWG  
20  
19  
18  
17  
16  
15  
14  
12  
13  
20  
1
SO−20  
DW SUFFIX  
CASE 751D  
xxx  
573  
1
2
3
4
5
6
7
9
8
10  
20  
OE  
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
GND  
ALYW G  
1
G
Figure 1. Pinout 20−Lead Packages Conductors  
(Top View)  
TSSOP−20  
DT SUFFIX  
CASE 948E  
PIN ASSIGNMENT  
PIN  
FUNCTION  
D −D  
Data Inputs  
0
7
74xxx573  
AWLYWWG  
LE  
Latch Enable Input  
20  
OE  
3−State Output Enable Input  
3−State Latch Outputs  
1
O −O  
0
7
EIAJ−20  
M SUFFIX  
CASE 967  
D
0
D
1
D
2
D D D D D  
3 4 5 6 7  
xxx  
A
= AC or ACT  
= Assembly Location  
WL, L = Wafer Lot  
YY, Y = Year  
LE  
OE  
O
0
O O O O O O O  
1 2 3 4 5 6 7  
WW, W = Work Week  
G or G = Pb−Free Package  
(Note: Microdot may be in either location)  
Figure 2. Logic Symbol  
*For additional information on our Pb−Free strategy and soldering details, please  
download the ON Semiconductor Soldering and Mounting Techniques  
Reference Manual, SOLDERRM/D.  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 8 of this data sheet.  
© Semiconductor Components Industries, LLC, 2005  
1
Publication Order Number:  
September, 2005 − Rev. 7  
MC74AC573/D  
MC74AC573, MC74ACT573  
Functional Description  
TRUTH TABLE  
The MC74AC573/74ACT574 contains eight D−type  
latches with 3−state output buffers. When the Latch Enable  
Inputs  
Outputs  
OE  
L
LE  
H
H
L
D
O
(LE) input is HIGH, data on the D inputs enters the latches.  
n
n
n
In this condition the latches are transparent, i.e., a latch  
output will change state each time its D input changes. When  
LE is LOW the latches store the information that was present  
on the D inputs a setup time preceding the HIGH−to−LOW  
transition of LE. The 3−state buffers are controlled by the  
Output Enable (OE) input. When OE is LOW, the buffers are  
enabled. When OE is HIGH the buffers are in the high  
impedance mode but this does not interfere with entering  
new data into the latches.  
H
H
L
L
L
X
X
L
O
0
H
X
Z
H = HIGH Voltage Level  
L = LOW Voltage Level  
Z = High Impedance  
X = Immaterial  
O = Previous O before LOW−to−HIGH Transition of Clock  
0
0
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
D
D
D
D
D
D
D
D
Q
Q
Q
Q
Q
Q
Q
Q
LE  
LE  
LE  
LE  
LE  
LE  
LE  
LE  
LE  
OE  
O
0
O
1
O
2
O
3
O
4
O
5
O
6
O
7
NOTE: That this diagram is provided only for the understanding of logic  
operations and should not be used to estimate propagation delays.  
Figure 3. Logic Diagram  
http://onsemi.com  
2
MC74AC573, MC74ACT573  
MAXIMUM RATINGS  
Symbol  
Parameter  
Value  
Unit  
V
V
V
V
DC Supply Voltage (Referenced to GND)  
−0.5 to +7.0  
CC  
DC Input Voltage (Referenced to GND)  
DC Output Voltage (Referenced to GND)  
DC Input Current, per Pin  
−0.5 to V +0.5  
V
IN  
CC  
−0.5 to V +0.5  
V
OUT  
CC  
I
I
I
20  
50  
mA  
mA  
mA  
°C  
IN  
DC Output Sink/Source Current, per Pin  
OUT  
CC  
DC V or GND Current per Output Pin  
50  
CC  
T
stg  
Storage Temperature  
−65 to +150  
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit  
values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,  
damage may occur and reliability may be affected.  
RECOMMENDED OPERATING CONDITIONS  
Symbol  
Parameter  
Min  
2.0  
4.5  
0
Typ  
5.0  
5.0  
Max  
6.0  
Unit  
AC  
V
V
Supply Voltage  
V
V
CC  
ACT  
5.5  
, V  
OUT  
DC Input Voltage, Output Voltage (Ref. to GND)  
V
CC  
IN  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
@ 3.0 V  
@ 4.5 V  
@ 5.5 V  
@ 4.5 V  
@ 5.5 V  
150  
40  
25  
10  
8.0  
Input Rise and Fall Time (Note 1)  
AC Devices except Schmitt Inputs  
ns/V  
t , t  
r
f
Input Rise and Fall Time (Note 2)  
ACT Devices except Schmitt Inputs  
t , t  
ns/V  
r
f
T
J
Junction Temperature (PDIP)  
Operating Ambient Temperature Range  
Output Current − High  
140  
85  
°C  
°C  
T
A
−40  
25  
I
I
−24  
24  
mA  
mA  
OH  
OL  
Output Current − Low  
1. V from 30% to 70% V ; see individual Data Sheets for devices that differ from the typical input rise and fall times.  
IN  
CC  
2. V from 0.8 V to 2.0 V; see individual Data Sheets for devices that differ from the typical input rise and fall times.  
IN  
http://onsemi.com  
3
 
MC74AC573, MC74ACT573  
DC CHARACTERISTICS  
Symbol  
74AC  
74AC  
T
A
=
V
(V)  
CC  
T
= +25°C  
−40°C to  
+85°C  
Parameter  
Unit  
Conditions  
A
Typ  
Guaranteed Limits  
V
V
V
3.0  
4.5  
5.5  
1.5  
2.25  
2.75  
2.1  
3.15  
3.85  
2.1  
3.15  
3.85  
V
= 0.1 V  
Minimum High Level  
Input Voltage  
IH  
OUT  
V
V
V
or V − 0.1 V  
CC  
3.0  
4.5  
5.5  
1.5  
2.25  
2.75  
0.9  
1.35  
1.65  
0.9  
1.35  
1.65  
V
OUT  
= 0.1 V  
Maximum Low Level  
Input Voltage  
IL  
or V − 0.1 V  
CC  
3.0  
4.5  
5.5  
2.99  
4.49  
5.49  
2.9  
4.4  
5.4  
2.9  
4.4  
5.4  
I
= −50 mA  
Minimum High Level  
Output Voltage  
OH  
OUT  
*V = V or V  
IH  
IN  
IL  
3.0  
4.5  
5.5  
2.56  
3.86  
4.86  
2.46  
3.76  
4.76  
−12 mA  
−24 mA  
−24 mA  
V
V
V
I
OH  
V
OL  
3.0  
4.5  
5.5  
0.002  
0.001  
0.001  
0.1  
0.1  
0.1  
0.1  
0.1  
0.1  
I
= 50 mA  
OUT  
Maximum Low Level  
Output Voltage  
*V = V or V  
IN  
IL  
IH  
3.0  
4.5  
5.5  
0.36  
0.36  
0.36  
0.44  
0.44  
0.44  
12 mA  
24 mA  
24 mA  
I
OL  
I
Maximum Input  
Leakage Current  
IN  
5.5  
5.5  
0.1  
0.5  
1.0  
5.0  
mA  
mA  
V = V , GND  
I CC  
I
V (OE) = V , V  
I IL IH  
Maximum  
3−State  
Current  
OZ  
V = V , GND  
I
CC  
V
O
= V , GND  
CC  
I
I
I
5.5  
5.5  
75  
mA  
mA  
V
= 1.65 V Max  
†Minimum Dynamic  
Output Current  
OLD  
OHD  
CC  
OLD  
OHD  
−75  
V
V
= 3.85 V Min  
Maximum Quiescent  
Supply Current  
5.5  
8.0  
80  
mA  
= V or GND  
IN CC  
NOTE:  
I
IN  
and I @ 3.0 V are guaranteed to be less than or equal to the respective limit @ 5.5 V V  
.
CC  
CC  
*All outputs loaded; thresholds on input associated with output under test.  
†Maximum test duration 2.0 ms, one output loaded at a time.  
http://onsemi.com  
4
MC74AC573, MC74ACT573  
AC CHARACTERISTICS (For Figures and Waveforms − See Section 3)  
74AC  
74AC  
T
= −40°C  
A
T
= +25°C  
V
(V)  
*
Fig.  
No.  
A
CC  
to +85°C  
C = 50 pF  
Symbol  
Parameter  
Unit  
C = 50 pF  
L
L
Min  
Typ  
Max  
Min  
Max  
Propagation Delay  
D to O  
3.3  
5.0  
2.5  
2.5  
13.0  
10.0  
2.0  
2.0  
15.0  
11.5  
t
t
t
t
t
t
t
t
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
3−5  
3−5  
3−6  
3−6  
3−7  
3−8  
3−7  
3−8  
PLH  
n
n
Propagation Delay  
D to O  
3.3  
5.0  
2.5  
2.5  
12.0  
9.5  
2.0  
2.0  
14.0  
11.0  
PHL  
PLH  
PHL  
PZH  
PZL  
PHZ  
PLZ  
n
n
Propagation Delay  
LE to O  
3.3  
5.0  
2.5  
2.5  
13.0  
9.5  
2.0  
2.0  
15.0  
11.0  
n
Propagation Delay  
LE to O  
3.3  
5.0  
2.5  
2.5  
12.0  
8.5  
2.0  
2.0  
14.0  
10.0  
n
3.3  
5.0  
2.5  
2.5  
11.0  
9.0  
2.0  
2.0  
12.0  
10.0  
Output Enable Time  
Output Enable Time  
Output Disable Time  
Output Disable Time  
3.3  
5.0  
2.5  
2.5  
11.0  
8.5  
2.0  
2.0  
12.5  
9.5  
3.3  
5.0  
2.5  
2.5  
12.5  
11.0  
2.0  
2.0  
13.5  
12.0  
3.3  
5.0  
2.5  
2.5  
9.5  
8.0  
2.0  
2.0  
10.5  
9.0  
*Voltage Range 3.3 V is 3.3 V 0.3 V.  
Voltage Range 5.0 V is 5.0 V 0.5 V.  
AC OPERATING REQUIREMENTS  
74AC  
74AC  
T
= −40°C  
A
T
= +25°C  
V
(V)  
*
Fig.  
No.  
A
CC  
to +85°C  
C = 50 pF  
Symbol  
Parameter  
Unit  
C = 50 pF  
L
L
Typ  
Guaranteed Minimum  
Setup Time, HIGH or LOW  
D to LE  
n
3.3  
5.0  
3.5  
3.0  
4.0  
3.5  
t
t
t
ns  
ns  
ns  
3−9  
3−9  
3−6  
s
Hold Time, HIGH or LOW  
D to LE  
n
3.3  
5.0  
2.0  
2.0  
2.0  
2.0  
h
w
3.3  
5.0  
6.0  
4.0  
7.0  
5.0  
LE Pulse Width, HIGH  
*Voltage Range 3.3 V is 3.3 V 0.3 V.  
Voltage Range 5.0 V is 5.0 V 0.5 V.  
http://onsemi.com  
5
MC74AC573, MC74ACT573  
DC CHARACTERISTICS  
Symbol  
74ACT  
74ACT  
T
A
=
V
(V)  
CC  
T
= +25°C  
−40°C to  
+85°C  
Parameter  
Unit  
Conditions  
A
Typ  
Guaranteed Limits  
V
V
V
4.5  
5.5  
1.5  
1.5  
2.0  
2.0  
2.0  
2.0  
V
= 0.1 V  
Minimum High Level  
Input Voltage  
IH  
OUT  
V
V
V
or V − 0.1 V  
CC  
4.5  
5.5  
1.5  
1.5  
0.8  
0.8  
0.8  
0.8  
V
OUT  
= 0.1 V  
Maximum Low Level  
Input Voltage  
IL  
or V − 0.1 V  
CC  
4.5  
5.5  
4.49  
5.49  
4.4  
5.4  
4.4  
5.4  
I
= −50 mA  
Minimum High Level  
Output Voltage  
OH  
OUT  
*V = V or V  
IH  
IN  
IL  
4.5  
5.5  
3.86  
4.86  
3.76  
4.76  
V
V
V
−24 mA  
−24 mA  
I
I
OH  
V
OL  
4.5  
5.5  
0.001  
0.001  
0.1  
0.1  
0.1  
0.1  
= 50 mA  
OUT  
Maximum Low Level  
Output Voltage  
*V = V or V  
IN  
IL  
IH  
4.5  
5.5  
0.36  
0.36  
0.44  
0.44  
24 mA  
24 mA  
I
OL  
I
Maximum Input  
Leakage Current  
IN  
5.5  
5.5  
0.1  
1.0  
1.5  
mA  
V = V , GND  
I CC  
DI  
Additional Max. I /Input  
0.6  
mA  
V = V − 2.1 V  
I CC  
CCT  
CC  
I
V (OE) = V , V  
I IL IH  
Maximum  
3-State  
OZ  
5.5  
0.5  
5.0  
mA  
V = V , GND  
I
CC  
Current  
V
V
V
= V , GND  
O
CC  
I
I
I
5.5  
5.5  
75  
mA  
mA  
= 1.65 V Max  
†Minimum Dynamic  
Output Current  
OLD  
OLD  
OHD  
−75  
= 3.85 V Min  
OHD  
CC  
Maximum Quiescent  
Supply Current  
5.5  
8.0  
80  
mA  
V
IN  
= V or GND  
CC  
*All outputs loaded; thresholds on input associated with output under test.  
†Maximum test duration 2.0 ms, one output loaded at a time.  
AC CHARACTERISTICS (For Figures and Waveforms − See Section 3)  
74ACT  
= +25°C  
74ACT  
T
= −40°C  
A
T
A
V
(V)  
*
Fig.  
CC  
to +85°C  
C = 50 pF  
Symbol  
Parameter  
Unit  
No.  
C = 50 pF  
L
L
Min  
Typ  
Max  
Min  
Max  
Propagation Delay  
D to O  
t
t
t
t
5.0  
5.0  
5.0  
5.0  
2.5  
10.5  
2.0  
12  
12  
ns  
ns  
ns  
ns  
3−5  
3−5  
3−6  
3−6  
PLH  
n
n
Propagation Delay  
D to O  
2.5  
3.0  
2.5  
10.5  
10.5  
9.5  
2.0  
2.5  
2.0  
PHL  
PLH  
PHL  
n
n
Propagation Delay  
LE to O  
12  
n
Propagation Delay  
LE to O  
10.5  
n
t
t
t
t
Output Enable Time  
Output Enable Time  
Output Disable Time  
Output Disable Time  
5.0  
5.0  
5.0  
5.0  
2.0  
1.5  
2.5  
1.5  
10  
9.5  
11  
1.5  
1.5  
1.5  
1.0  
11  
ns  
ns  
ns  
ns  
3−7  
3−8  
3−7  
3−8  
PZH  
PZL  
PHZ  
PLZ  
10.5  
12.5  
9.5  
8.5  
*Voltage Range 5.0 V is 5.0 V 0.5 V.  
http://onsemi.com  
6
MC74AC573, MC74ACT573  
AC OPERATING REQUIREMENTS  
74ACT  
74ACT  
T
= −40°C  
A
T
= +25°C  
V
(V)  
*
Fig.  
No.  
A
CC  
to +85°C  
C = 50 pF  
Symbol  
Parameter  
Unit  
C = 50 pF  
L
L
Typ  
Guaranteed Minimum  
Setup Time, HIGH or LOW  
D to LE  
n
t
s
5.0  
3.0  
3.5  
ns  
3−9  
Hold Time, HIGH or LOW  
D to LE  
n
t
t
5.0  
5.0  
0
0
ns  
ns  
3−9  
3−6  
h
LE Pulse Width, HIGH  
3.5  
4.0  
w
*Voltage Range 5.0 V is 5.0 V 0.5 V.  
CAPACITANCE  
Symbol  
Value  
Parameter  
Unit  
Test Conditions  
Typ  
5.0  
25  
C
C
Input Capacitance  
Power Dissipation Capacitance  
pF  
pF  
V
V
= 5.0 V  
= 5.0 V  
IN  
CC  
PD  
CC  
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7
MC74AC573, MC74ACT573  
ORDERING INFORMATION  
Package  
Device  
Shipping  
MC74AC573N  
PDIP−20  
18 Units / Rail  
18 Units / Rail  
MC74AC573NG  
PDIP−20  
(Pb−Free)  
MC74AC573DW  
SOIC−20  
38 Units / Rail  
38 Units / Rail  
MC74AC573DWG  
SOIC−20  
(Pb−Free)  
MC74AC573DWR2  
MC74AC573DWR2G  
SOIC−20  
1000 Units / Tape & Reel  
1000 Units / Tape & Reel  
SOIC−20  
(Pb−Free)  
MC74AC573DTR2  
MC74AC573DTR2G  
MC74AC573MEL  
MC74AC573MELG  
TSSOP−20*  
TSSOP−20*  
SOEIAJ−20  
2500 Units / Tape & Reel  
2500 Units / Tape & Reel  
2000 Units / Tape & Reel  
2000 Units / Tape & Reel  
SOEIAJ−20  
(Pb−Free)  
MC74ACT573N  
PDIP−20  
18 Units / Rail  
18 Units / Rail  
MC74ACT573NG  
PDIP−20  
(Pb−Free)  
MC74ACT573DW  
MC74ACT573DWG  
SOIC−20  
38 Units / Rail  
38 Units / Rail  
SOIC−20  
(Pb−Free)  
MC74ACT573DWR2  
MC74ACT573DWR2G  
SOIC−20  
1000 Units / Tape & Reel  
1000 Units / Tape & Reel  
SOIC−20  
(Pb−Free)  
MC74ACT573DTR2  
MC74ACT573DTR2G  
TSSOP−20*  
TSSOP−20*  
2500 Units / Tape & Reel  
2500 Units / Tape & Reel  
†For information on tape and reel specifications,including part orientation and tape sizes, please refer to our Tape and Reel Packaging  
Specifications Brochure, BRD8011/D.  
*This package is inherently Pb−Free.  
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8
MC74AC573, MC74ACT573  
PACKAGE DIMENSIONS  
PDIP−20  
N SUFFIX  
20 PIN PLASTIC DIP PACKAGE  
CASE 738−03  
ISSUE E  
−A−  
NOTES:  
1. DIMENSIONING AND TOLERANCING PER ANSI  
Y14.5M, 1982.  
2. CONTROLLING DIMENSION: INCH.  
3. DIMENSION L TO CENTER OF LEAD WHEN  
FORMED PARALLEL.  
20  
1
11  
10  
B
4. DIMENSION B DOES NOT INCLUDE MOLD  
FLASH.  
L
C
INCHES  
DIM MIN MAX  
1.070 25.66  
MILLIMETERS  
MIN  
MAX  
27.17  
6.60  
4.57  
0.55  
A
B
C
D
E
F
1.010  
0.240  
0.150  
0.015  
0.260  
0.180  
0.022  
6.10  
3.81  
0.39  
−T−  
SEATING  
PLANE  
K
0.050 BSC  
1.27 BSC  
M
0.050  
0.070  
1.27  
1.77  
N
E
G
J
0.100 BSC  
2.54 BSC  
0.008  
0.110  
0.015  
0.140  
0.21  
2.80  
0.38  
3.55  
G
F
K
L
J 20 PL  
0.300 BSC  
7.62 BSC  
D 20 PL  
M
M
B
0.25 (0.010)  
T
M
N
0
0.020  
15  
_
0.040  
0
_
0.51  
15  
_
1.01  
_
M
M
0.25 (0.010)  
T
A
SO−20  
DW SUFFIX  
20 PIN PLASTIC SOIC PACKAGE  
CASE 751D−05  
ISSUE G  
D
A
q
NOTES:  
1. DIMENSIONS ARE IN MILLIMETERS.  
2. INTERPRET DIMENSIONS AND TOLERANCES  
PER ASME Y14.5M, 1994.  
20  
11  
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD  
PROTRUSION.  
E
4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE.  
5. DIMENSION B DOES NOT INCLUDE DAMBAR  
PROTRUSION. ALLOWABLE PROTRUSION SHALL  
BE 0.13 TOTAL IN EXCESS OF B DIMENSION AT  
MAXIMUM MATERIAL CONDITION.  
1
10  
MILLIMETERS  
DIM MIN  
MAX  
2.65  
0.25  
0.49  
0.32  
12.95  
7.60  
B
A
A1  
B
C
D
E
2.35  
0.10  
0.35  
0.23  
12.65  
7.40  
20X B  
M
S
S
B
T
0.25  
A
e
1.27 BSC  
A
H
h
10.05  
0.25  
0.50  
0
10.55  
0.75  
0.90  
7
L
SEATING  
PLANE  
q
_
_
18X e  
A1  
C
T
http://onsemi.com  
9
MC74AC573, MC74ACT573  
PACKAGE DIMENSIONS  
TSSOP−20  
DT SUFFIX  
20 PIN PLASTIC TSSOP PACKAGE  
CASE 948E−02  
ISSUE B  
20X K REF  
NOTES:  
ꢀꢁ1. DIMENSIONING AND TOLERANCING PER ANSI  
Y14.5M, 1982.  
M
S
S
V
0.10 (0.004)  
T
U
S
T U  
0.15 (0.006)  
ꢀꢁ2. CONTROLLING DIMENSION: MILLIMETER.  
ꢀꢁ3. DIMENSION A DOES NOT INCLUDE MOLD  
FLASH, PROTRUSIONS OR GATE BURRS. MOLD  
FLASH OR GATE BURRS SHALL NOT EXCEED  
0.15 (0.006) PER SIDE.  
ꢀꢁ4. DIMENSION B DOES NOT INCLUDE  
INTERLEAD FLASH OR PROTRUSION.  
INTERLEAD FLASH OR PROTRUSION SHALL NOT  
EXCEED 0.25 (0.010) PER SIDE.  
ꢀꢁ5. DIMENSION K DOES NOT INCLUDE DAMBAR  
PROTRUSION. ALLOWABLE DAMBAR  
PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN  
EXCESS OF THE K DIMENSION AT MAXIMUM  
MATERIAL CONDITION.  
K
K1  
20  
11  
2X L/2  
J J1  
B
L
−U−  
PIN 1  
IDENT  
SECTION N−N  
1
10  
0.25 (0.010)  
ꢀꢁ6. TERMINAL NUMBERS ARE SHOWN FOR  
REFERENCE ONLY.  
N
S
ꢀꢁ7. DIMENSION A AND B ARE TO BE  
DETERMINED AT DATUM PLANE −W−.  
0.15 (0.006)  
T U  
M
A
−V−  
MILLIMETERS  
DIM MIN MAX  
INCHES  
MIN  
MAX  
0.260  
0.177  
0.047  
0.006  
0.030  
A
B
6.40  
4.30  
−−−  
6.60 0.252  
4.50 0.169  
N
C
1.20  
−−−  
D
0.05  
0.50  
0.15 0.002  
0.75 0.020  
F
F
G
H
0.65 BSC  
0.026 BSC  
DETAIL E  
0.27  
0.09  
0.09  
0.19  
0.19  
0.37  
0.011  
0.015  
0.008  
0.006  
0.012  
0.010  
J
0.20 0.004  
0.16 0.004  
0.30 0.007  
0.25 0.007  
−W−  
J1  
K
C
K1  
L
6.40 BSC  
0.252 BSC  
0
G
D
M
0
8
8
_
_
_
_
H
DETAIL E  
0.100 (0.004)  
−T− SEATING  
PLANE  
http://onsemi.com  
10  
MC74AC573, MC74ACT573  
PACKAGE DIMENSIONS  
SOEIAJ−20  
M SUFFIX  
20 PIN PLASTIC EIAJ PACKAGE  
CASE 967−01  
ISSUE O  
NOTES:  
ꢀꢁ1. DIMENSIONING AND TOLERANCING PER ANSI  
Y14.5M, 1982.  
ꢀꢁ2. CONTROLLING DIMENSION: MILLIMETER.  
ꢀꢁ3. DIMENSIONS D AND E DO NOT INCLUDE  
MOLD FLASH OR PROTRUSIONS AND ARE  
MEASURED AT THE PARTING LINE. MOLD FLASH  
OR PROTRUSIONS SHALL NOT EXCEED 0.15  
(0.006) PER SIDE.  
L
E
20  
11  
Q
1
ꢀꢁ4. TERMINAL NUMBERS ARE SHOWN FOR  
REFERENCE ONLY.  
H
E
_
E
M
ꢀꢁ5. THE LEAD WIDTH DIMENSION (b) DOES NOT  
INCLUDE DAMBAR PROTRUSION. ALLOWABLE  
DAMBAR PROTRUSION SHALL BE 0.08 (0.003)  
TOTAL IN EXCESS OF THE LEAD WIDTH  
DIMENSION AT MAXIMUM MATERIAL CONDITION.  
DAMBAR CANNOT BE LOCATED ON THE LOWER  
RADIUS OR THE FOOT. MINIMUM SPACE  
BETWEEN PROTRUSIONS AND ADJACENT LEAD  
TO BE 0.46 ( 0.018).  
L
1
10  
DETAIL P  
Z
D
VIEW P  
MILLIMETERS  
INCHES  
MIN  
−−−  
e
A
DIM MIN  
MAX  
MAX  
0.081  
0.008  
0.020  
0.011  
0.504  
0.215  
c
A
−−−  
0.05  
0.35  
0.18  
12.35  
5.10  
2.05  
A
1
0.20 0.002  
0.50 0.014  
0.27 0.007  
b
c
D
E
e
12.80 0.486  
5.45 0.201  
A
b
1
1.27 BSC  
0.050 BSC  
M
0.10 (0.004)  
0.13 (0.005)  
H
7.40  
0.50  
1.10  
8.20 0.291  
0.85 0.020  
1.50 0.043  
0.323  
0.033  
0.059  
E
L
L
E
M
Q
0
10  
0.90 0.028  
10  
_
0.035  
0.032  
0
_
_
_
0.70  
−−−  
1
Z
0.81  
−−−  
http://onsemi.com  
11  
MC74AC573, MC74ACT573  
ON Semiconductor and  
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice  
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability  
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.  
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All  
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights  
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications  
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should  
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,  
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death  
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal  
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.  
PUBLICATION ORDERING INFORMATION  
LITERATURE FULFILLMENT:  
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ON Semiconductor Website: http://onsemi.com  
Order Literature: http://www.onsemi.com/litorder  
Literature Distribution Center for ON Semiconductor  
P.O. Box 61312, Phoenix, Arizona 85082−1312 USA  
Phone: 480−829−7710 or 800−344−3860 Toll Free USA/Canada  
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For additional information, please contact your  
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MC74AC573/D  

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