MC74HC32AN [ONSEMI]
Quad 2-Input OR Gate; 四2输入或门
| 型号： | MC74HC32AN |
| 厂家： | 
ONSEMI |
| 描述： | Quad 2-Input OR Gate |
| 文件： | 总8页 (文件大小：133K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
High–Performance Silicon–Gate CMOS
The MC74HC32A is identical in pinout to the LS32. The device
inputs are compatible with Standard CMOS outputs; with pullup
resistors, they are compatible with LSTTL outputs.
http://onsemi.com
• Output Drive Capability: 10 LSTTL Loads
• Outputs Directly Interface to CMOS, NMOS and TTL
• Operating Voltage Range: 2 to 6V
MARKING
DIAGRAMS
14
• Low Input Current: 1µA
PDIP–14
N SUFFIX
CASE 646
MC74HC32AN
AWLYYWW
• High Noise Immunity Characteristic of CMOS Devices
• In Compliance With the JEDEC Standard No. 7A Requirements
• Chip Complexity: 48 FETs or 12 Equivalent Gates
1
14
SOIC–14
D SUFFIX
CASE 751A
HC32A
AWLYWW
LOGIC DIAGRAM
1
A1
3
1
Y1
Y2
Y3
Y4
2
B1
14
4
5
HC
32A
ALYW
TSSOP–14
DT SUFFIX
CASE 948G
A2
B2
6
8
Y = A+B
1
9
A3
B3
A
= Assembly Location
10
WL or L = Wafer Lot
YY or Y = Year
12
13
WW or W = Work Week
A4
B4
11
FUNCTION TABLE
PIN 14 = V
CC
PIN 7 = GND
Inputs
Output
A
B
Y
Pinout: 14–Lead Packages (Top View)
L
L
L
H
L
L
H
H
H
V
B4
13
A4
12
Y4
11
B3
10
A3
9
Y3
8
CC
H
H
14
H
ORDERING INFORMATION
1
2
3
4
5
6
7
Device
Package
PDIP–14
Shipping
A1
B1
Y1
A2
B2
Y2 GND
MC74HC32AN
2000 / Box
55 / Rail
MC74HC32AD
SOIC–14
SOIC–14
TSSOP–14
TSSOP–14
MC74HC32ADR2
MC74HC32ADT
MC74HC32ADTR2
2500 / Reel
96 / Rail
2500 / Reel
Semiconductor Components Industries, LLC, 2000
1
Publication Order Number:
March, 2000 – Rev. 7
MC74HC32A/D
MC74HC32A
MAXIMUM RATINGS*
Symbol
Parameter
Value
Unit
V
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this high–impedance cir-
V
DC Supply Voltage (Referenced to GND)
DC Input Voltage (Referenced to GND)
DC Output Voltage (Referenced to GND)
DC Input Current, per Pin
– 0.5 to + 7.0
CC
V
– 0.5 to V
+ 0.5
V
in
CC
CC
V
out
– 0.5 to V
+ 0.5
V
I
± 20
mA
mA
mA
mW
in
cuit. For proper operation, V and
in
I
I
DC Output Current, per Pin
± 25
± 50
out
V
should be constrained to the
out
range GND (V or V
)
V
CC
.
DC Supply Current, V
and GND Pins
CC
in out
CC
Unused inputs must always be
tied to an appropriate logic voltage
P
D
Power Dissipation in Still Air,
Plastic DIP†
SOIC Package†
TSSOP Package†
750
500
450
level (e.g., either GND or V ).
CC
Unused outputs must be left open.
T
Storage Temperature
– 65 to + 150
C
C
stg
T
Lead Temperature, 1 mm from Case for 10 Seconds
Plastic DIP, SOIC or TSSOP Package
L
260
*Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
†Derating — Plastic DIP: – 10 mW/ C from 65 to 125 C
SOIC Package: – 7 mW/ C from 65 to 125 C
TSSOP Package: – 6.1 mW/ C from 65 to 125 C
For high frequency or heavy load considerations, see Chapter 2 of the ON Semiconductor High–Speed CMOS Data Book (DL129/D).
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
2.0
0
Max
Unit
V
V
CC
DC Supply Voltage (Referenced to GND)
DC Input Voltage, Output Voltage (Referenced to GND)
Operating Temperature, All Package Types
6.0
V , V
in out
V
CC
V
T
A
– 55 + 125
C
t , t
r f
Input Rise and Fall Time
(Figure 1)
V
CC
V
CC
V
CC
= 2.0 V
= 4.5 V
= 6.0 V
0
0
0
1000
500
400
ns
http://onsemi.com
2
MC74HC32A
DC CHARACTERISTICS (Voltages Referenced to GND)
Guaranteed Limit
V
CC
V
Symbol
Parameter
Condition
–55 to 25°C ≤85°C ≤125°C
Unit
V
IH
Minimum High–Level Input
Voltage
V
= 0.1V or V
–0.1V
2.0
3.0
4.5
6.0
1.50
2.10
3.15
4.20
1.50
2.10
3.15
4.20
1.50
2.10
3.15
4.20
V
out
|I | ≤ 20µA
CC
out
V
Maximum Low–Level Input
Voltage
V
= 0.1V or V
– 0.1V
2.0
3.0
4.5
6.0
0.50
0.90
1.35
1.80
0.50
0.90
1.35
1.80
0.50
0.90
1.35
1.80
V
V
IL
out
|I | ≤ 20µA
CC
out
V
OH
Minimum High–Level Output
Voltage
V
in
= V or V
2.0
4.5
6.0
1.9
4.4
5.9
1.9
4.4
5.9
1.9
4.4
5.9
IH
IL
IL
IL
IL
|I | ≤ 20µA
out
V
=V or V
IH
|I | ≤ 2.4mA
out
3.0
4.5
6.0
2.48
3.98
5.48
2.34
3.84
5.34
2.20
3.70
5.20
in
in
|I | ≤ 4.0mA
out
|I | ≤ 5.2mA
out
V
OL
Maximum Low–Level Output
Voltage
V
= V or V
IH
2.0
4.5
6.0
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
V
|I | ≤ 20µA
out
V
in
= V or V
IH
|I | ≤ 2.4mA
out
3.0
4.5
6.0
0.26
0.26
0.26
0.33
0.33
0.33
0.40
0.40
0.40
|I | ≤ 4.0mA
out
|I | ≤ 5.2mA
out
I
Maximum Input Leakage
Current
V
V
= V
= V
or GND
or GND
6.0
±0.1
±1.0
±1.0
µA
µA
in
in
CC
CC
I
Maximum Quiescent Supply
Current (per Package)
6.0
1.0
10
40
CC
in
I
= 0µA
out
NOTE: InformationontypicalparametricvaluescanbefoundinChapter2oftheONSemiconductorHigh–SpeedCMOSDataBook(DL129/D).
AC CHARACTERISTICS (C = 50pF, Input t = t = 6ns)
L
r
f
Guaranteed Limit
V
CC
V
Symbol
Parameter
–55 to 25°C
≤85°C
≤125°C
Unit
t
t
,
Maximum Propagation Delay, Input A or B to Output Y
(Figures 1 and 2)
2.0
3.0
4.5
6.0
75
30
15
13
95
40
19
16
110
55
22
ns
PLH
PHL
19
t
t
,
Maximum Output Transition Time, Any Output
(Figures 1 and 2)
2.0
3.0
4.5
6.0
75
27
15
13
95
32
19
16
110
36
22
ns
TLH
THL
19
C
Maximum Input Capacitance
10
10
10
pF
in
NOTE: For propagation delays with loads other than 50 pF, and information on typical parametric values, see Chapter 2 of the ON
Semiconductor High–Speed CMOS Data Book (DL129/D).
Typical @ 25°C, V
= 5.0 V, V
= 0 V
EE
CC
C
Power Dissipation Capacitance (Per Buffer)*
pF
20
PD
2
* Used to determine the no–load dynamic power consumption: P = C
D
ON Semiconductor High–Speed CMOS Data Book (DL129/D).
V
f + I
V
. For load considerations, see Chapter 2 of the
PD CC
CC CC
http://onsemi.com
3
MC74HC32A
t
r
t
f
V
CC
90%
50%
10%
INPUT
A OR B
GND
t
t
PLH
PHL
90%
50%
10%
OUTPUT Y
t
t
THL
TLH
Figure 1. Switching Waveforms
TEST
POINT
OUTPUT
DEVICE
UNDER
TEST
C *
L
*Includes all probe and jig capacitance
Figure 2. Test Circuit
A
B
Y
Figure 3. Expanded Logic Diagram
(1/4 of the Device)
http://onsemi.com
4
MC74HC32A
PACKAGE DIMENSIONS
PDIP–14
N SUFFIX
CASE 646–06
ISSUE L
NOTES:
1. LEADS WITHIN 0.13 (0.005) RADIUS OF TRUE
POSITION AT SEATING PLANE AT MAXIMUM
MATERIAL CONDITION.
2. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
3. DIMENSION B DOES NOT INCLUDE MOLD
FLASH.
4. ROUNDED CORNERS OPTIONAL.
14
1
8
7
B
INCHES
DIM MIN MAX
0.770 18.16
MILLIMETERS
A
F
MIN
MAX
19.56
6.60
4.69
0.53
1.78
A
B
C
D
F
0.715
0.240
0.145
0.015
0.040
0.260
0.185
0.021
0.070
6.10
3.69
0.38
1.02
L
C
G
H
J
K
L
0.100 BSC
2.54 BSC
0.052
0.008
0.115
0.095
0.015
0.135
1.32
0.20
2.92
2.41
0.38
3.43
J
N
0.300 BSC
7.62 BSC
SEATING
PLANE
K
M
N
0
10
0.039
0
0.39
10
1.01
0.015
H
G
D
M
SOIC–14
D SUFFIX
CASE 751A–03
ISSUE F
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
–A–
14
1
8
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
–B–
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
P 7 PL
M
M
0.25 (0.010)
B
7
MILLIMETERS
DIM MIN MAX
INCHES
MIN MAX
G
F
R X 45
C
A
B
C
D
F
8.55
3.80
1.35
0.35
0.40
8.75 0.337 0.344
4.00 0.150 0.157
1.75 0.054 0.068
0.49 0.014 0.019
1.25 0.016 0.049
–T–
SEATING
PLANE
J
M
G
J
K
M
P
1.27 BSC
0.050 BSC
0.25 0.008 0.009
0.25 0.004 0.009
K
D 14 PL
0.19
0.10
0
M
S
S
0.25 (0.010)
T B
A
7
0
7
5.80
0.25
6.20 0.228 0.244
0.50 0.010 0.019
R
http://onsemi.com
5
MC74HC32A
PACKAGE DIMENSIONS
TSSOP–14
DT SUFFIX
CASE 948G–01
ISSUE O
NOTES:
14X K REF
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
M
S
S
0.10 (0.004)
T U
V
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD FLASH,
PROTRUSIONS OR GATE BURRS. MOLD FLASH
OR GATE BURRS SHALL NOT EXCEED 0.15
(0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE INTERLEAD
FLASH OR PROTRUSION. INTERLEAD FLASH OR
PROTRUSION SHALL NOT EXCEED
0.25 (0.010) PER SIDE.
S
0.15 (0.006) T U
N
0.25 (0.010)
14
8
2X L/2
M
B
–U–
5. DIMENSION K DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN
EXCESS OF THE K DIMENSION AT MAXIMUM
MATERIAL CONDITION.
L
N
PIN 1
IDENT.
F
7
1
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
DETAIL E
7. DIMENSION A AND B ARE TO BE DETERMINED
AT DATUM PLANE –W–.
S
K
0.15 (0.006) T U
A
MILLIMETERS
DIM MIN MAX
INCHES
MIN MAX
K1
–V–
A
B
C
4.90
4.30
–––
5.10 0.193 0.200
4.50 0.169 0.177
J J1
1.20
––– 0.047
D
F
0.05
0.50
0.15 0.002 0.006
0.75 0.020 0.030
SECTION N–N
G
H
J
J1
K
K1
L
0.65 BSC
0.026 BSC
0.60 0.020 0.024
0.20 0.004 0.008
0.16 0.004 0.006
0.30 0.007 0.012
0.25 0.007 0.010
0.50
0.09
0.09
0.19
0.19
–W–
C
6.40 BSC
0.252 BSC
0.10 (0.004)
M
0
8
0
8
SEATING
PLANE
–T–
H
G
DETAIL E
D
http://onsemi.com
6
MC74HC32A
Notes
http://onsemi.com
7
MC74HC32A
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes
withoutfurthernoticetoanyproductsherein. SCILLCmakesnowarranty,representationorguaranteeregardingthesuitabilityofitsproductsforanyparticular
purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability,
including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be
validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others.
SCILLCproductsarenotdesigned, intended, orauthorizedforuseascomponentsinsystemsintendedforsurgicalimplantintothebody, orotherapplications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or
death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold
SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable
attorneyfees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim
alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.
PUBLICATION ORDERING INFORMATION
NORTH AMERICA Literature Fulfillment:
CENTRAL/SOUTH AMERICA:
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Spanish Phone: 303–308–7143 (Mon–Fri 8:00am to 5:00pm MST)
Email: ONlit–spanish@hibbertco.com
Phone: 303–675–2175 or 800–344–3860 Toll Free USA/Canada
Fax: 303–675–2176 or 800–344–3867 Toll Free USA/Canada
Email: ONlit@hibbertco.com
ASIA/PACIFIC: LDC for ON Semiconductor – Asia Support
Phone: 303–675–2121 (Tue–Fri 9:00am to 1:00pm, Hong Kong Time)
Toll Free from Hong Kong & Singapore:
Fax Response Line: 303–675–2167 or 800–344–3810 Toll Free USA/Canada
001–800–4422–3781
N. American Technical Support: 800–282–9855 Toll Free USA/Canada
Email: ONlit–asia@hibbertco.com
EUROPE: LDC for ON Semiconductor – European Support
German Phone: (+1) 303–308–7140 (M–F 1:00pm to 5:00pm Munich Time)
Email: ONlit–german@hibbertco.com
JAPAN: ON Semiconductor, Japan Customer Focus Center
4–32–1 Nishi–Gotanda, Shinagawa–ku, Tokyo, Japan 141–8549
Phone: 81–3–5740–2745
French Phone: (+1) 303–308–7141 (M–F 1:00pm to 5:00pm Toulouse Time)
Email: ONlit–french@hibbertco.com
English Phone: (+1) 303–308–7142 (M–F 12:00pm to 5:00pm UK Time)
Email: ONlit@hibbertco.com
Email: r14525@onsemi.com
ON Semiconductor Website: http://onsemi.com
EUROPEAN TOLL–FREE ACCESS*: 00–800–4422–3781
For additional information, please contact your local
Sales Representative.
*Available from Germany, France, Italy, England, Ireland
MC74HC32A/D
相关型号：
MC74HC354
8-Input Data Selector/Multiplexer With Data and Address Latches and 3-State Outputs
MOTOROLA
MC74HC354DW
8-Input Data Selector/Multiplexer With Data and Address Latches and 3-State Outputs
MOTOROLA
MC74HC354N
8-Input Data Selector/Multiplexer With Data and Address Latches and 3-State Outputs
MOTOROLA
©2020 ICPDF网 联系我们和版权申明