MC74LCX257DTR2 [ONSEMI]
Low-Voltage CMOS Quad 2-Input Multiplexer With 5.0 V−Tolerant Inputs and Outputs (3−State, Non−Inverting); 低电压CMOS四2输入多路复用器采用5.0 V容限输入和输出（三态，非反相）
| 型号： | MC74LCX257DTR2 |
| 厂家： | 
ONSEMI |
| 描述： | Low-Voltage CMOS Quad 2-Input Multiplexer With 5.0 V−Tolerant Inputs and Outputs (3−State, Non−Inverting) |
| 文件： | 总8页 (文件大小：87K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MC74LCX257
Low−Voltage CMOS Quad
2−Input Multiplexer
With 5.0 V−Tolerant Inputs and Outputs
(3−State, Non−Inverting)
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MARKING
The MC74LCX257 is a high performance, quad 2−input
multiplexer with 3−state outputs operating from a 2.3 to 3.6 V supply.
High impedance TTL compatible inputs significantly reduce current
loading to input drivers while TTL compatible outputs offer improved
DIAGRAMS
16
switching noise performance. A V specification of 5.5 V allows
I
SOIC−16
D SUFFIX
CASE 751B
LCX257
AWLYWW
MC74LCX257 inputs to be safely driven from 5.0 V devices.
Four bits of data from two sources can be selected using the Select
input. The four outputs present the selected data in the true
(non−inverted) form. The outputs may be switched to a high
impedance state by placing a logic HIGH on the Output Enable (OE)
input. Current drive capability is 24 mA at the outputs.
16
1
1
16
TSSOP−16
DT SUFFIX
CASE 948F
LCX
257
ALYW
Features
16
• Designed for 2.3 to 3.6 V V Operation
CC
1
• 5.0 V Tolerant − Interface Capability with 5.0 V TTL Logic
• Supports Live Insertion and Withdrawal
• I
Specification Guarantees High Impedance When V = 0 V
1
OFF
CC
16
• LVTTL Compatible
• LVCMOS Compatible
SOEIAJ−16
M SUFFIX
CASE 966
74LCX257
ALYW
• 24 mA Balanced Output Sink and Source Capability
• Near Zero Static Supply Current in All Three Logic States (10 mA)
Substantially Reduces System Power Requirements
• Latchup Performance Exceeds 500 mA
16
1
1
• ESD Performance:
Human Body Model >2000 V
Machine Model >200 V
A
L, WL
Y
= Assembly Location
= Wafer Lot
= Year
• Pb−Free Packages are Available*
W, WW = Work Week
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 3 of this data sheet.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
Semiconductor Components Industries, LLC, 2005
1
Publication Order Number:
January, 2005 − Rev. 3
MC74LCX257/D
MC74LCX257
I0c I1c
Zc
I0d
I1d
2
V
OE
Zd
CC
4
I0a
Za
Zb
Zc
Zd
16
15
14
13
12
11
10
9
3
I1a
5
7
I0b
6
I1b
14
12
9
I0c
1
2
3
4
5
6
7
8
I1a
I1b
13
I0a
S
Za I0b
Zb GND
I1c
Figure 1. Pinout: 16−Lead Plastic Package
11
I0d
(Top View)
10
I1d
15
OE
1
S
Figure 2. Logic Diagram
PIN NAMES
Pins
Function
Source 0 Data Inputs
Source 1 Data Inputs
Output Enable Input
Select Input
l0n
l1n
OE
S
Zn
Outputs
TRUTH TABLE
Inputs
Outputs
OE
H
L
S
X
H
H
L
l0n
X
l1n
X
Zn
Z
X
L
L
L
X
H
X
H
L
L
L
L
L
H
X
H
H = High Voltage Level
L
X
Z
=
=
=
Low Voltage Level
High or Low Voltage Level and Transitions are Acceptable
High Impedance State
For ICC reasons, DO NOT FLOAT Inputs
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2
MC74LCX257
MAXIMUM RATINGS
Symbol
Parameter
Value
Condition
Unit
V
V
V
V
DC Supply Voltage
−0.5 to +7.0
CC
I
DC Input Voltage
−0.5 ≤ V ≤ +7.0
V
I
DC Output Voltage
−0.5 ≤ V ≤ +7.0
Output in 3−State
V
O
I
−0.5 ≤ V ≤ V + 0.5
Output in HIGH or LOW State (Note 1)
V
O
CC
I
I
DC Input Diode Current
DC Output Diode Current
−50
V < GND
mA
mA
mA
mA
mA
mA
°C
IK
I
−50
+50
V < GND
O
OK
V
O
> V
CC
I
I
I
DC Output Source/Sink Current
DC Supply Current Per Supply Pin
DC Ground Current Per Ground Pin
Storage Temperature Range
±50
O
±100
±100
CC
GND
T
−65 to +150
STG
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
1. I absolute maximum rating must be observed.
O
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
Type
Max
Unit
V
CC
Supply Voltage
Operating
Data Retention Only
2.0
1.5
2.5, 3.3
2.5, 3.3
3.6
3.6
V
V
V
Input Voltage
0
5.5
V
V
I
Output Voltage
(HIGH or LOW State)
(3−State)
0
0
V
CC
5.5
O
I
HIGH Level Output Current
LOW Level Output Current
V
V
V
= 3.0 V − 3.6 V
= 2.7 V − 3.0 V
= 2.3 V − 2.7 V
−24
−12
−8
mA
mA
OH
CC
CC
CC
I
OL
V
CC
V
CC
V
CC
= 3.0 V − 3.6 V
= 2.7 V − 3.0 V
= 2.3 V − 2.7 V
+24
+12
+8
T
Operating Free−Air Temperature
Input Transition Rise or Fall Rate, V from 0.8 V to 2.0 V,
−40
0
+85
10
°C
A
Dt/DV
ns/V
IN
V
CC
= 3.0 V
ORDERING INFORMATION
Device
†
Package
Shipping
MC74LCX257DR2
MC74LCX257DR2G
SOIC−16
2500 Tape & Reel
2500 Tape & Reel
SOIC−16
(Pb−Free)
MC74LCX257DT
MC74LCX257DTR2
MC74LCX257M
TSSOP−16*
TSSOP−16*
SOEIAJ−16
SOEIAJ−16
96 Units / Rail
2500 Tape & Reel
48 Units / Rail
MC74LCX257MEL
2000 Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*This package is inherently Pb−Free.
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3
MC74LCX257
DC ELECTRICAL CHARACTERISTICS
T
A
= −40°C to +85°C
Symbol
Characteristic
Condition
Min
1.7
2.0
Max
Unit
V
V
V
HIGH Level Input Voltage (Note 2)
2.3 V ≤ V ≤ 2.7 V
V
IH
CC
2.7 V ≤ V ≤ 3.6 V
CC
LOW Level Input Voltage (Note 2)
HIGH Level Output Voltage
2.3 V ≤ V ≤ 2.7 V
0.7
0.8
V
V
IL
CC
2.7 V ≤ V ≤ 3.6 V
CC
2.3 V ≤ V ≤ 3.6 V; I = −100 mA
V
− 0.2
OH
CC
OH
CC
V
= 2.3 V; I = −8 mA
1.8
2.2
2.4
2.2
CC
OH
V
CC
V
CC
V
CC
= 2.7 V; I = −12 mA
OH
= 3.0 V; I = −18 mA
OH
= 3.0 V; I = −24 mA
OH
V
LOW Level Output Voltage
2.3 V ≤ V ≤ 3.6 V; I = 100 mA
0.2
0.6
0.4
0.4
0.55
±5
V
OL
CC
OL
V
CC
= 2.3 V; I = 8 mA
OL
V
CC
V
CC
V
CC
= 2.7 V; I = 12 mA
OL
= 3.0 V; I = 16 mA
OL
= 3.0 V; I = 24 mA
OL
I
I
Input Leakage Current
3−State Output Current
2.3 V ≤ V ≤ 3.6 V; 0 V ≤ V ≤ 5.5 V
mA
mA
I
CC
I
2.3 ≤ V ≤ 3.6 V; 0 V ≤ V ≤ 5.5 V;
±5
OZ
CC
O
V = V or V
IL
I
IH
I
I
Power−Off Leakage Current
Quiescent Supply Current
V
= 0 V; V or V = 5.5 V
10
10
mA
mA
OFF
CC
I
O
2.3 ≤ V ≤ 3.6 V; V = GND or V
CC
CC
CC
I
2.3 ≤ V ≤ 3.6 V; 3.6 ≤ V or V ≤ 5.5 V
±10
500
CC
I
O
DI
CC
Increase in I per Input
2.3 ≤ V ≤ 3.6 V; V = V − 0.6 V
mA
CC
CC
IH
CC
2. These values of V are used to test DC electrical characteristics only.
I
AC CHARACTERISTICS t = t = 2.5 ns; R = 500 W
R
F
L
Limits
= −40°C to +85°C
T
A
V
CC
= 3.3 V ± 0.3 V
V
CC
= 2.7 V
V = 2.5 V ± 0.2 V
CC
C = 50 pF
L
C = 50 pF
L
C = 30 pF
L
Symbol
Parameter
Propagation Delay
In to Zn
Waveform
Min
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
Max
6.0
6.0
7.0
7.0
7.0
7.0
5.5
5.5
1.0
1.0
Min
Max
6.5
6.5
8.5
8.5
8.5
8.5
6.0
6.0
Min
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
Max
7.2
7.2
9.1
9.1
9.1
9.1
6.6
6.6
Unit
t
t
t
t
t
t
t
t
t
t
1
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
ns
PLH
PHL
PLH
PHL
PZH
PZL
Propagation Delay
S to Zn
1, 2
3
ns
ns
ns
ns
Output Enable Time to
High and Low Level
Output Disable Time From
High and Low Level
Output−to−Output Skew
(Note 3)
3
PHZ
PLZ
OSHL
OSLH
3. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device.
The specification applies to any outputs switching in the same direction, either HIGH−to−LOW (t
) or LOW−to−HIGH (t
); parameter
OSHL
OSLH
guaranteed by design.
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4
MC74LCX257
DYNAMIC SWITCHING CHARACTERISTICS
T
A
= +25°C
Symbol
Characteristic
Condition
Min
Typ
Max
Unit
V
OLP
Dynamic LOW Peak Voltage
(Note 4)
V
V
= 3.3 V, C = 50 pF, V = 3.3 V, V = 0 V
0.8
0.6
V
V
CC
L
IH
IL
= 2.5 V, C = 30 pF, V = 2.5 V, V = 0 V
CC
L
IH
IL
V
OLV
Dynamic LOW Valley Voltage
(Note 4)
V
V
= 3.3 V, C = 50 pF, V = 3.3 V, V = 0 V
−0.8
−0.6
V
V
CC
L
IH
IL
= 2.5 V, C = 30 pF, V = 2.5 V, V = 0 V
CC
L
IH
IL
4. Number of outputs defined as “n”. Measured with “n−1” outputs switching from HIGH−to−LOW or LOW−to−HIGH. The remaining output is
measured in the LOW state.
CAPACITIVE CHARACTERISTICS
Symbol
Parameter
Input Capacitance
Condition
= 3.3 V, V = 0 V or V
Typical
Unit
pF
C
C
C
V
V
7
8
IN
CC
I
CC
CC
Input/Output Capacitance
= 3.3 V, V = 0 V or V
pF
I/O
PD
CC
I
Power Dissipation Capacitance
10 MHz, V = 3.3 V, V = 0 V or V
25
pF
CC
I
CC
V
CC
V
CC
Vmi
Vmi
Vmi
Vmi
In, S
S
0 V
V
0 V
t
t
t
t
PHL
PLH
PHL
PLH
V
OH
OH
Vmo
Vmo
Vmo
Vmo
Zn
Zn
V
OL
V
OL
WAVEFORM 1 − NON−INVERTING PROPAGATION DELAYS
= t = 2.5 ns, 10% to 90%; f = 1.0 MHz; t = 500 ns
WAVEFORM 2 − INVERTING PROPAGATION DELAYS
= t = 2.5 ns, 10% to 90%; f = 1.0 MHz; t = 500 ns
t
R
t
R
F
W
F
W
V
CC
Vmi
Vmi
OE
0 V
t
t
t
t
PZH
PHZ
V
V
V
CC
OH
− 0.3
Vmo
Vmo
Zn
≈ 0 V
PZL
PLZ
≈ 3.0V
Zn
V
OL
+ 0.3 V
GND
WAVEFORM 3 − OUTPUT ENABLE AND DISABLE TIMES
t
R
= t = 2.5 ns, 10% to 90%; f = 1.0 MHz; t = 500 ns
F W
Vcc
2.7 V
1.5 V
1.5 V
Symbol
Vmi
3.3 V + 0.3 V
1.5 V
2.5 V + 0.2 V
Vcc/2
Vmo
1.5 V
Vcc/2
V
V
+ 0.3 V
− 0.3 V
V
+ 0.3 V
V
+ 0.15 V
− 0.15 V
HZ
LZ
OL
OL
OL
V
V
OH
V
OH
− 0.3 V
V
OH
Figure 3. AC Waveforms
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5
MC74LCX257
PACKAGE DIMENSIONS
SOIC−16
D SUFFIX
CASE 751B−05
ISSUE J
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
−A−
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
16
9
8
−B−
P 8 PL
M
S
B
0.25 (0.010)
1
MILLIMETERS
INCHES
MIN
0.386
G
DIM MIN
MAX
MAX
0.393
0.157
0.068
0.019
0.049
A
B
C
D
F
9.80
3.80
1.35
0.35
0.40
10.00
4.00 0.150
1.75 0.054
0.49 0.014
1.25 0.016
F
R X 45
K
_
G
J
1.27 BSC
0.050 BSC
C
0.19
0.10
0
0.25 0.008
0.25 0.004
0.009
0.009
7
−T−
SEATING
PLANE
K
M
P
R
J
7
0
_
_
_
_
M
5.80
0.25
6.20 0.229
0.50 0.010
0.244
0.019
D
16 PL
M
S
S
0.25 (0.010)
T
B
A
TSSOP−16
DT SUFFIX
CASE 948F−01
ISSUE O
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD FLASH.
PROTRUSIONS OR GATE BURRS. MOLD FLASH
OR GATE BURRS SHALL NOT EXCEED 0.15
(0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE INTERLEAD
FLASH OR PROTRUSION. INTERLEAD FLASH OR
PROTRUSION SHALL NOT EXCEED
0.25 (0.010) PER SIDE.
16X KREF
M
S
S
0.10 (0.004)
T
U
V
S
0.15 (0.006) T U
K
K1
16
9
2X L/2
J1
5. DIMENSION K DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN
EXCESS OF THE K DIMENSION AT MAXIMUM
MATERIAL CONDITION.
B
−U−
SECTION N−N
L
J
PIN 1
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE DETERMINED
AT DATUM PLANE −W−.
IDENT.
8
1
N
0.25 (0.010)
MILLIMETERS
DIM MIN MAX
INCHES
MIN
MAX
0.200
0.177
0.047
0.006
0.030
S
0.15 (0.006) T U
A
M
A
B
4.90
4.30
−−−
5.10 0.193
4.50 0.169
−V−
C
1.20
−−−
D
0.05
0.50
0.15 0.002
0.75 0.020
N
F
F
G
H
0.65 BSC
0.026 BSC
0.18
0.09
0.09
0.19
0.19
0.28 0.007
0.20 0.004
0.16 0.004
0.30 0.007
0.25 0.007
0.011
0.008
0.006
0.012
0.010
J
DETAIL E
J1
K
K1
L
6.40 BSC
0.252 BSC
0
−W−
M
0
8
8
_
_
_
_
C
0.10 (0.004)
DETAIL E
H
SEATING
PLANE
−T−
D
G
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6
MC74LCX257
PACKAGE DIMENSIONS
SOEIAJ−16
M SUFFIX
CASE 966−01
ISSUE O
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
16
9
L
E
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH OR PROTRUSIONS AND ARE MEASURED
AT THE PARTING LINE. MOLD FLASH OR
PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006)
PER SIDE.
Q
1
H
E
M
_
E
4. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
1
8
L
5. THE LEAD WIDTH DIMENSION (b) DOES NOT
INCLUDE DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08 (0.003)
TOTAL IN EXCESS OF THE LEAD WIDTH
DIMENSION AT MAXIMUM MATERIAL CONDITION.
DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OR THE FOOT. MINIMUM SPACE
BETWEEN PROTRUSIONS AND ADJACENT LEAD
TO BE 0.46 ( 0.018).
DETAIL P
Z
D
VIEW P
e
A
c
MILLIMETERS
INCHES
MIN
−−−
DIM MIN
MAX
MAX
0.081
0.008
0.020
0.011
0.413
0.215
A
−−−
0.05
0.35
0.18
9.90
5.10
2.05
A
A
1
0.20 0.002
0.50 0.014
0.27 0.007
1
b
0.13 (0.005)
b
c
0.10 (0.004)
M
D
E
10.50 0.390
5.45 0.201
e
1.27 BSC
0.050 BSC
H
7.40
0.50
1.10
8.20 0.291
0.85 0.020
1.50 0.043
0.323
0.033
0.059
E
L
L
E
0
10
0.90 0.028
10
_
0.035
0.031
M
Q
0
_
_
_
0.70
−−−
1
Z
0.78
−−−
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7
MC74LCX257
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
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For additional information, please contact your
local Sales Representative.
MC74LCX257/D
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ONSEMI
MC74LCX258
Low-Voltage CMOS Quad 2-Input Multiplexer With 5 V−Tolerant Inputs and Outputs (3−State, Inverting)
ONSEMI
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