MC74LCX86MG [ONSEMI]
Low-Voltage CMOS Quad 2-Input XOR Gate With 5 V−Tolerant Inputs; 低电压CMOS四2输入异或门采用5 V容限输入型号: | MC74LCX86MG |
厂家: | ONSEMI |
描述: | Low-Voltage CMOS Quad 2-Input XOR Gate With 5 V−Tolerant Inputs |
文件: | 总8页 (文件大小:80K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
MC74LCX86
Low−Voltage CMOS Quad
2−Input XOR Gate
With 5 V−Tolerant Inputs
The MC74LCX86 is a high performance, quad 2−input XOR gate
operating from a 2.3 to 3.6 V supply. High impedance TTL compatible
inputs significantly reduce current loading to input drivers while TTL
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MARKING
compatible outputs offer improved switching noise performance. A V
I
DIAGRAMS
specification of 5.5 V allows MC74LCX86 inputs to be safely driven
from 5.0 V devices.
14
Current drive capability is 24 mA at the outputs.
SOIC−14
D SUFFIX
CASE 751A
LCX86G
AWLYWW
14
Features
1
1
• Designed for 2.3 to 3.6 V V Operation
CC
• 5.0 V Tolerant Inputs − Interface Capability With 5.0 V TTL Logic
• LVTTL Compatible
• LVCMOS Compatible
14
LCX
86
• 24 mA Balanced Output Sink and Source Capability
• Near Zero Static Supply Current (10 mA) Substantially Reduces System
Power Requirements
TSSOP−14
DT SUFFIX
CASE 948G
14
ALYWG
1
G
1
• Latchup Performance Exceeds 500 mA
• ESD Performance:
Human Body Model >2000 V
Machine Model >200 V
14
• Pb−Free Packages are Available*
SOEIAJ−14
M SUFFIX
CASE 965
74LCX86
ALYWG
14
1
1
A
L, WL
Y, YY
= Assembly Location
= Wafer Lot
= Year
W, WW = Work Week
G
= Pb−Free Package
= Pb−Free Package
G
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
Semiconductor Components Industries, LLC, 2005
1
Publication Order Number:
May, 2005 − Rev. 5
MC74LCX86/D
MC74LCX86
1
A0
3
6
O0
O1
O2
O3
2
4
B0
A1
V
A2
13
B2
12
O2
11
A3
10
B3
9
O3
8
CC
14
5
B1
A2
13
11
8
12
10
9
B2
A3
B3
1
2
3
4
5
6
7
A0
B0
O0
A1
B1
O1 GND
Figure 1. Pinout: 14−Lead (Top View)
Figure 2. Logic Diagram
PIN NAMES
TRUTH TABLE
Inputs
Outputs
On
Pins
Function
An
Bn
An, Bn
On
Data Inputs
Outputs
L
L
L
H
L
L
H
H
L
H
H
H
MAXIMUM RATINGS
Symbol
Parameter
Value
Condition
Unit
V
V
V
V
DC Supply Voltage
DC Input Voltage
−0.5 to +7.0
−0.5 ≤ V ≤ +7.0
CC
I
V
I
DC Output Voltage
−0.5 ≤ V ≤ V + 0.5
Note 1
V < GND
V
O
O
CC
I
I
DC Input Diode Current
DC Output Diode Current
−50
mA
mA
mA
mA
mA
mA
°C
IK
I
−50
+50
V < GND
O
OK
V
O
> V
CC
I
I
I
DC Output Source/Sink Current
DC Supply Current Per Supply Pin
DC Ground Current Per Ground Pin
Storage Temperature Range
±50
O
±100
±100
CC
GND
T
−65 to +150
STG
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
1. Output in HIGH or LOW State. I absolute maximum rating must be observed.
O
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2
MC74LCX86
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
Typ
Max
Unit
V
CC
Supply Voltage
Operating
Data Retention Only
2.0
1.5
3.3
3.3
3.6
3.6
V
V
V
Input Voltage
0
0
5.5
V
V
I
Output Voltage
(HIGH or LOW State)
V
CC
O
I
I
I
I
HIGH Level Output Current, V = 3.0 V − 3.6 V
−24
24
mA
mA
mA
mA
°C
OH
OL
OH
OL
CC
LOW Level Output Current, V = 3.0 V − 3.6 V
CC
HIGH Level Output Current, V = 2.7 V − 3.0 V
−12
12
CC
LOW Level Output Current, V = 2.7 V − 3.0 V
CC
T
Operating Free−Air Temperature
−40
0
+85
10
A
Dt/DV
Input Transition Rise or Fall Rate, V from 0.8 V to 2.0 V,
ns/V
IN
V
CC
= 3.0 V
DC ELECTRICAL CHARACTERISTICS
T
A
= −40°C to +85°C
Symbol
Characteristic
HIGH Level Input Voltage (Note 2)
LOW Level Input Voltage (Note 2)
HIGH Level Output Voltage
Condition
2.7 V ≤ V ≤ 3.6 V
Min
2.0
Max
Unit
V
V
V
V
IH
CC
2.7 V ≤ V ≤ 3.6 V
0.8
V
IL
CC
2.7 V ≤ V ≤ 3.6 V; I = −100 mA
V − 0.2
CC
V
OH
CC
OH
V
CC
V
CC
V
CC
= 2.7 V; I = −12 mA
2.2
OH
= 3.0 V; I = −18 mA
2.4
2.2
OH
= 3.0 V; I = −24 mA
OH
V
LOW Level Output Voltage
2.7 V ≤ V ≤ 3.6 V; I = 100 mA
0.2
0.4
V
OL
CC
OL
V
= 2.7 V; I = 12 mA
OL
CC
CC
CC
V
V
= 3.0 V; I = 16 mA
0.4
OL
= 3.0 V; I = 24 mA
0.55
±5.0
10
OL
I
I
Input Leakage Current
2.7 V ≤ V ≤ 3.6 V; 0 V ≤ V ≤ 5.5 V
mA
mA
mA
mA
I
CC
I
Quiescent Supply Current
2.7 V ≤ V ≤ 3.6 V; V = GND or V
CC I CC
CC
2.7 V ≤ V ≤ 3.6 V; 3.6 V ≤ V ≤ 5.5 V
±10
500
CC
I
DI
Increase in I per Input
2.7 V ≤ V ≤ 3.6 V; V = V − 0.6 V
CC IH CC
CC
CC
2. These values of V are used to test DC electrical characteristics only.
I
AC CHARACTERISTICS (tR = tF = 2.5ns; CL = 50pF; RL = 500W)
Limits
T
A
= −40°C to +85°C
V
CC
= 3.0 V to 3.6 V
V
CC
= 2.7 V
Symbol
Parameter
Waveform
Min
Max
Max
Unit
t
t
Propagation Delay Input to Output
1,2
1.5
1.5
6.5
6.5
7.0
7.0
ns
PLH
PHL
t
t
Output−to−Output Skew (Note 3)
1.0
1.0
ns
OSHL
OSLH
3. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device.
The specification applies to any outputs switching in the same direction, either HIGH−to−LOW (t
guaranteed by design.
) or LOW−to−HIGH (t
); parameter
OSHL
OSLH
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3
MC74LCX86
DYNAMIC SWITCHING CHARACTERISTICS
T
A
= +25°C
Typ
Symbol
Characteristic
Condition
= 3.3 V, C = 50 pF, V = 3.3 V, V = 0 V
Min
Max
Unit
V
V
V
Dynamic LOW Peak Voltage (Note 4)
Dynamic LOW Valley Voltage (Note 4)
V
V
0.8
OLP
CC
L
IH
IL
= 3.3 V, C = 50 pF, V = 3.3 V, V = 0 V
0.8
V
OLV
CC
L
IH
IL
4. Number of outputs defined as “n”. Measured with “n−1” outputs switching from HIGH−to−LOW or LOW−to−HIGH. The remaining output is
measured in the LOW state.
CAPACITIVE CHARACTERISTICS
Symbol
Parameter
Input Capacitance
Condition
= 3.3 V, V = 0 V or V
Typical
Unit
pF
C
C
C
V
V
7
8
IN
CC
I
CC
CC
Output Capacitance
= 3.3 V, V = 0 V or V
pF
OUT
PD
CC
I
Power Dissipation Capacitance
10 MHz, V = 3.3 V, V = 0 V or V
CC
25
pF
CC
I
ORDERING INFORMATION
Device
†
Package
Shipping
MC74LCX86DR2
MC74LCX86DR2G
SOIC−14
2500 Tape & Reel
2500 Tape & Reel
SOIC−14
(Pb−Free)
MC74LCX86DTR2
MC74LCX86DTR2G
MC74LCX86M
TSSOP−14*
TSSOP−14*
SOEIAJ−14
2500 Tape & Reel
2500 Tape & Reel
50 Units / Rail
MC74LCX86MG
SOEIAJ−14
(Pb−Free)
50 Units / Rail
MC74LCX86MEL
MC74LCX86MELG
SOEIAJ−14
2000 Tape & Reel
2000 Tape & Reel
SOEIAJ−14
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*This package is inherently Pb−Free.
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4
MC74LCX86
2.7 V
0 V
1.5 V
1.5 V
An, Bn
t
t
PHL
PLH
V
OH
OL
1.5 V
1.5 V
On
V
WAVEFORM 1 − NON−INVERTING PROPAGATION DELAYS
= t = 2.5 ns, 10% to 90%; f = 1 MHz; t = 500 ns
t
R
F
W
2.7 V
0 V
1.5 V
1.5 V
An, Bn
t
t
PLH
PHL
V
OH
OL
1.5 V
1.5 V
On
V
WAVEFORM 2 − INVERTING PROPAGATION DELAYS
= t = 2.5 ns, 10% to 90%; f = 1 MHz; t = 500 ns
t
R
F
W
Figure 3. AC Waveforms
V
CC
PULSE
GENERATOR
DUT
R
T
C
L
R
L
C = 50pF or equivalent (Includes jig and probe capacitance)
L
R = R = 500 W or equivalent
L
1
R = Z
of pulse generator (typically 50 W)
T
OUT
Figure 4. Test Circuit
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5
MC74LCX86
PACKAGE DIMENSIONS
SOIC−14
D SUFFIX
CASE 751A−03
ISSUE G
NOTES:
−A−
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
14
8
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
−B−
P 7 PL
5. DIMENSION D DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.127
(0.005) TOTAL IN EXCESS OF THE D
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
M
M
B
0.25 (0.010)
7
1
G
F
R X 45
_
C
MILLIMETERS
DIM MIN MAX
INCHES
MIN MAX
A
B
C
D
F
G
J
K
M
P
R
8.55
3.80
1.35
0.35
0.40
8.75 0.337 0.344
4.00 0.150 0.157
1.75 0.054 0.068
0.49 0.014 0.019
1.25 0.016 0.049
0.050 BSC
0.25 0.008 0.009
0.25 0.004 0.009
−T−
SEATING
PLANE
J
M
K
D 14 PL
M
S
S
A
0.25 (0.010)
T
B
1.27 BSC
0.19
0.10
0
7
0
7
_
_
_
_
5.80
0.25
6.20 0.228 0.244
0.50 0.010 0.019
TSSOP−14
DT SUFFIX
CASE 948G−01
ISSUE A
NOTES:
14X K REF
1. DIMENSIONING AND TOLERANCING PER
M
S
S
V
ANSI Y14.5M, 1982.
0.10 (0.004)
T
U
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH OR GATE BURRS SHALL NOT
EXCEED 0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION SHALL
NOT EXCEED 0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08
(0.003) TOTAL IN EXCESS OF THE K
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
S
0.15 (0.006) T U
N
0.25 (0.010)
14
8
2X L/2
M
B
−U−
L
N
PIN 1
IDENT.
F
7
1
DETAIL E
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE −W−.
S
K
0.15 (0.006) T U
A
K1
−V−
MILLIMETERS
DIM MIN MAX
INCHES
MIN MAX
A
B
C
D
F
4.90
4.30
−−−
0.05
0.50
5.10 0.193 0.200
4.50 0.169 0.177
J J1
1.20
−−− 0.047
0.15 0.002 0.006
0.75 0.020 0.030
SECTION N−N
G
H
J
J1
K
0.65 BSC
0.026 BSC
0.60 0.020 0.024
0.20 0.004 0.008
0.16 0.004 0.006
0.30 0.007 0.012
0.25 0.007 0.010
0.50
0.09
0.09
0.19
−W−
C
0.10 (0.004)
K1 0.19
L
M
6.40 BSC
0.252 BSC
SEATING
PLANE
−T−
H
G
DETAIL E
D
0
8
0
8
_
_
_
_
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6
MC74LCX86
PACKAGE DIMENSIONS
SOEIAJ−14
M SUFFIX
CASE 965−01
ISSUE O
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH OR PROTRUSIONS AND ARE MEASURED
AT THE PARTING LINE. MOLD FLASH OR
PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006)
PER SIDE.
L
14
8
E
Q
1
H
E
_
E
M
4. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
L
7
1
5. THE LEAD WIDTH DIMENSION (b) DOES NOT
INCLUDE DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08 (0.003)
TOTAL IN EXCESS OF THE LEAD WIDTH
DIMENSION AT MAXIMUM MATERIAL CONDITION.
DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OR THE FOOT. MINIMUM SPACE
BETWEEN PROTRUSIONS AND ADJACENT LEAD
TO BE 0.46 ( 0.018).
DETAIL P
Z
D
VIEW P
A
e
c
MILLIMETERS
INCHES
MIN
−−−
DIM MIN
MAX
2.05
MAX
0.081
0.008
0.020
0.011
0.413
0.215
A
−−−
0.05
0.35
0.18
9.90
5.10
b
A
1
A
1
b
c
0.20 0.002
0.50 0.014
0.27 0.007
M
0.13 (0.005)
0.10 (0.004)
D
E
e
10.50 0.390
5.45 0.201
1.27 BSC
0.050 BSC
H
7.40
0.50
1.10
8.20 0.291
0.85 0.020
1.50 0.043
0.323
0.033
0.059
E
L
L
E
M
0
10
0.90 0.028
10
_
0.035
0.056
0
_
_
_
Q
0.70
−−−
1
Z
1.42
−−−
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7
MC74LCX86
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
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MC74LCX86/D
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