MC74LVXU04DTR2G [ONSEMI]
Hex Inverter;
| 型号： | MC74LVXU04DTR2G |
| 厂家： | 
ONSEMI |
| 描述： | Hex Inverter 栅 光电二极管 逻辑集成电路 触发器 |
| 文件： | 总6页 (文件大小：106K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MC74LVXU04
Hex Inverter
(Unbuffered)
The MC74LVX04 is an advanced high speed CMOS unbuffered hex
inverter. The inputs tolerate voltages up to 7.0 V, allowing the
interface of 5.0 V systems to 3.0 V systems.
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Features
• High Speed: t = 4.1 ns (Typ) at V = 3.3 V
PD
CC
• Low Power Dissipation: I = 2 mA (Max) at T = 25°C
CC
A
SOIC−14 NB
D SUFFIX
CASE 751A
TSSOP−14
DT SUFFIX
CASE 948G
• Power Down Protection Provided on Inputs
• Balanced Propagation Delays
• Low Noise: V
= 0.5 V (Max)
OLP
PIN ASSIGNMENT
• Pin and Function Compatible with Other Standard Logic Families
• These Devices are Pb−Free and are RoHS Compliant
V
A5 O5 A4 O4 A3 O3
13 12 11 10 9 8
CC
14
1
2
A0
A1
A2
A3
A4
A5
O0
O1
O2
O3
O4
O5
3
4
5
6
1
2
3
4
5
6
7
A0 O0 A1 O1 A2 O2 GND
9
8
14−Lead (Top View)
11
13
10
12
MARKING DIAGRAMS
14
LVXU04G
AWLYWW
Figure 1. Logic Diagram
1
PIN NAMES
Pins
SOIC−14 NB
Function
14
An
On
Data Inputs
Outputs
LVX
U04
ALYWG
G
FUNCTION TABLE
An
1
TSSOP−14
On
L
H
H
L
LVXU04
A
WL, L
Y
= Specific Device Code
= Assembly Location
= Wafer Lot
= Year
WW, W
G or G
= Work Week
= Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
© Semiconductor Components Industries, LLC, 2014
1
Publication Order Number:
August, 2014 − Rev. 4
MC74LVXU04/D
MC74LVXU04
MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
V
V
CC
DC Supply Voltage
−0.5 to +7.0
−0.5 to +7.0
V
IN
DC Input Voltage
V
V
OUT
DC Output Voltage
−0.5 to V + 0.5
V
CC
I
DC Input Diode Current
DC Output Diode Current
DC Output Sink Current
DC Supply Current per Supply Pin
Storage Temperature Range
V < GND
−20
20
mA
mA
mA
mA
_C
IK
I
I
V
< GND
O
OK
I
25
OUT
I
50
CC
T
−65 to +150
260
STG
T
Lead Temperature, 1 mm from Case for 10 Seconds
Junction Temperature under Bias
Thermal Resistance
_C
L
T
+150
250
_C
_C/W
J
q
SOIC
TSSOP
JA
P
D
Power Dissipation in Still Air at 85_C
SOIC
TSSOP
250
mW
MSL
Moisture Sensitivity
Flammability Rating
ESD Withstand Voltage
Level 1
F
R
Oxygen Index: 30% − 35%
UL 94−V0 @ 0.125 in
V
ESD
Human Body Model (Note 1)
Machine Model (Note 2)
> 2000
> 200
2000
V
Charged Device Model (Note 3)
I
Latchup Performance
Above V and Below GND at 85_C (Note 4)
300
mA
Latchup
CC
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Tested to EIA/JESD22−A114−A.
2. Tested to EIA/JESD22−A115−A.
3. Tested to JESD22−C101−A.
4. Tested to EIA/JESD78.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
2.0
0
Max
3.6
Unit
V
V
CC
Supply Voltage
V
I
Input Voltage
(Note 5)
5.5
V
V
O
Output Voltage
(HIGH or LOW State)
0
V
CC
V
T
Operating Free−Air Temperature
Input Transition Rise or Fall Rate
−40
0
+85
100
_C
ns/V
A
Dt/DV
V
CC
= 3.0 V 0.3 V
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
5. Unused inputs may not be left open. All inputs must be tied to a high− or low−logic input voltage level.
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2
MC74LVXU04
DC ELECTRICAL CHARACTERISTICS
T
A
= 25°C
T = −40 to 85°C
A
V
CC
V
Min
Typ
Max
Min
Max
Symbol
Parameter
Test Conditions
Unit
V
IH
High−Level Input Voltage
2.0
3.0
3.6
1.5
2.0
2.4
1.5
2.0
2.4
V
V
Low−Level Input Voltage
2.0
3.0
3.6
0.5
0.8
0.8
0.5
0.8
0.8
V
V
V
IL
V
OH
High−Level Output Voltage
(V = V or V )
I
I
I
= −50 mA
= −50 mA
= −4 mA
2.0
3.0
3.0
1.9
2.9
2.58
2.0
3.0
1.9
2.9
2.48
OH
OH
OH
in
IH
IL
V
OL
Low−Level Output Voltage
(V = V or V )
I
OL
I
OL
I
OL
= 50 mA
= 50 mA
= 4 mA
2.0
3.0
3.0
0.0
0.0
0.1
0.1
0.36
0.1
0.1
0.44
in
IH
IL
I
Input Leakage Current
V
V
= 5.5 V or GND
3.6
3.6
0.1
2.0
1.0
mA
mA
in
in
I
Quiescent Supply Current
= V or GND
20.0
CC
in
CC
AC ELECTRICAL CHARACTERISTICS (Input t = t = 3.0ns)
r
f
T
A
= 25°C
T = −40 to 85°C
A
Min
Typ
Max
Min
Max
Symbol
Parameter
Test Conditions
Unit
Propagation Delay, Input to
Output
t
t
,
V
V
= 2.7V
C = 15 pF
C = 50 pF
L
5.4
7.9
10.1
13.6
1.0
1.0
12.5
16.0
ns
PLH
CC
L
PHL
= 3.3 0.3V C = 15 pF
4.1
6.6
6.2
9.7
1.0
1.0
7.5
11.0
CC
L
C = 50 pF
L
t
t
Output−to−Output Skew
(Note 6)
V
CC
V
CC
= 2.7V
= 3.3 0.3V C = 50 pF
C = 50 pF
1.5
1.5
1.5
1.5
ns
OSHL
OSLH
L
L
6. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device.
The specification applies to any outputs switching in the same direction, either HIGH−to−LOW (t
) or LOW−to−HIGH (t
); parameter
OSHL
OSLH
guaranteed by design.
CAPACITIVE CHARACTERISTICS
T
A
= 25°C
T = −40 to 85°C
A
Min
Typ
4
Max
Min
Max
Symbol
Parameter
Unit
pF
Cin
Input Capacitance
Power Dissipation Capacitance (Note 7)
10
10
C
18
pF
PD
7. C is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
PD
Average operating current can be obtained by the equation: I
no−load dynamic power consumption; P = C ꢀ V
) = C ꢀ V ꢀ f + I /6 (per buffer). C is used to determine the
CC(OPR
PD CC in CC PD
2
ꢀ f + I ꢀ V
.
D
PD
CC
in
CC
CC
NOISE CHARACTERISTICS (Input t = t = 3.0 ns, C = 50 pF, V = 3.3 V, Measured in SOIC Package)
r
f
L
CC
T
A
= 25°C
Typ
0.3
Max
Symbol
Characteristic
Unit
V
V
Quiet Output Maximum Dynamic V
0.5
−0.5
2.0
OLP
OLV
OL
V
Quiet Output Minimum Dynamic V
−0.3
V
OL
V
IHD
Minimum High Level Dynamic Input Voltage
Maximum Low Level Dynamic Input Voltage
V
V
ILD
0.8
V
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3
MC74LVXU04
TEST POINT
V
CC
A
OUTPUT
50%
DEVICE
UNDER
TEST
GND
t
t
PHL
PLH
C *
L
O
50% V
CC
*Includes all probe and jig capacitance
Figure 2. Switching Waveforms
Figure 3. Test Circuit
ORDERING INFORMATION
Device
†
Package
Shipping
MC74LVXU04DG
SOIC−14 NB
(Pb−Free)
55 Units / Rail
2500 Tape & Reel
96 Units / Rail
MC74LVXU04DR2G
MC74LVXU04DTG
MC74LVXU04DTR2G
SOIC−14 NB
(Pb−Free)
TSSOP−14
(Pb−Free)
TSSOP−14
(Pb−Free)
2500 Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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4
MC74LVXU04
PACKAGE DIMENSIONS
TSSOP−14
CASE 948G
ISSUE B
NOTES:
1. DIMENSIONING AND TOLERANCING PER
14X K REF
M
S
S
V
ANSI Y14.5M, 1982.
0.10 (0.004)
T
U
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH OR GATE BURRS SHALL NOT
EXCEED 0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION SHALL
NOT EXCEED 0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN
EXCESS OF THE K DIMENSION AT MAXIMUM
MATERIAL CONDITION.
S
0.15 (0.006) T
U
N
0.25 (0.010)
14
8
2X L/2
M
B
L
N
−U−
PIN 1
IDENT.
F
7
1
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
DETAIL E
7. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE −W−.
S
K
0.15 (0.006) T
U
A
MILLIMETERS
DIM MIN MAX
INCHES
MIN MAX
K1
−V−
A
B
C
D
F
4.90
4.30
−−−
0.05
0.50
5.10 0.193 0.200
4.50 0.169 0.177
J J1
1.20
−−− 0.047
0.15 0.002 0.006
0.75 0.020 0.030
SECTION N−N
G
H
J
J1
K
0.65 BSC
0.026 BSC
0.60 0.020 0.024
0.20 0.004 0.008
0.16 0.004 0.006
0.30 0.007 0.012
0.25 0.007 0.010
0.50
0.09
0.09
0.19
−W−
C
K1 0.19
L
M
6.40 BSC
0.252 BSC
0.10 (0.004)
0
8
0
8
_
_
_
_
SEATING
PLANE
−T−
H
G
DETAIL E
D
SOLDERING FOOTPRINT*
7.06
1
0.65
PITCH
14X
0.36
14X
1.26
DIMENSIONS: MILLIMETERS
For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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5
MC74LVXU04
PACKAGE DIMENSIONS
SOIC−14 NB
CASE 751A−03
ISSUE K
NOTES:
D
A
B
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE PROTRUSION
SHALL BE 0.13 TOTAL IN EXCESS OF AT
MAXIMUM MATERIAL CONDITION.
4. DIMENSIONS D AND E DO NOT INCLUDE
MOLD PROTRUSIONS.
14
8
7
A3
E
H
5. MAXIMUM MOLD PROTRUSION 0.15 PER
SIDE.
L
DETAIL A
1
MILLIMETERS
DIM MIN MAX
INCHES
MIN MAX
13X b
M
M
B
0.25
A
A1
A3
b
D
E
1.35
0.10
0.19
0.35
8.55
3.80
1.75 0.054 0.068
0.25 0.004 0.010
0.25 0.008 0.010
0.49 0.014 0.019
8.75 0.337 0.344
4.00 0.150 0.157
M
S
S
0.25
C
A
B
DETAIL A
h
X 45
A
_
e
H
h
L
1.27 BSC
0.050 BSC
6.20 0.228 0.244
0.50 0.010 0.019
1.25 0.016 0.049
5.80
0.25
0.40
0
M
A1
e
M
7
0
7
_
_
_
_
SEATING
PLANE
C
SOLDERING FOOTPRINT*
6.50
14X
1.18
1
1.27
PITCH
14X
0.58
DIMENSIONS: MILLIMETERS
For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and the
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MC74LVXU04/D
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