MC74VHC1GU04DF2G [ONSEMI]
INVERT GATE;
| 型号： | MC74VHC1GU04DF2G |
| 厂家： | 
ONSEMI |
| 描述： | INVERT GATE 光电二极管 逻辑集成电路 |
| 文件： | 总8页 (文件大小：87K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MC74VHC1GU04
Single Unbuffered Inverter
The MC74VHC1GU04 is an advanced high speed CMOS
Unbuffered inverter fabricated with silicon gate CMOS technology.
This device consists of a single unbuffered inverter. In combination
with others, or in the MC74VHCU04 Hex Unbuffered Inverter, these
devices are well suited for use as oscillators, pulse shapers, and in
many other applications requiring a high−input impedance amplifier.
For digital applications, the MC74VHC1G04 or the MC74VHC04 are
recommended.
The internal circuit is composed of three stages, including a buffer
output which provides high noise immunity and stable output.
The MC74VHC1GU04 input structure provides protection when
voltages up to 7.0 V are applied, regardless of the supply voltage. This
allows the MC74VHC1GU04 to be used to interface 5.0 V circuits to
3.0 V circuits.
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MARKING
DIAGRAMS
5
1
V6d
SC70−5/SC−88A/SOT−353
DF SUFFIX
CASE 419A
Pin 1
• High Speed: t = 2.5 ns (Typ) at V = 5 V
PD
CC
5
• Low Power Dissipation: I = 1 mA (Max) at T = 25°C
CC
A
V6d
1
• Power Down Protection Provided on Inputs
SOT23−5/TSOP−5/SC59−5
DT SUFFIX
• Balanced Propagation Delays
• Pin and Function Compatible with Other Standard Logic Families
• Chip Complexity: FETs = 105
Pin 1
CASE 483
d = Date Code
PIN ASSIGNMENT
V
1
2
3
NC
IN A
GND
CC
5
1
2
3
4
5
NC
IN A
GND
OUT Y
V
CC
OUT Y
4
FUNCTION TABLE
Figure 1. Pinout
A Input
Y Output
L
H
L
H
1
IN A
OUT Y
Figure 2. Logic Symbol
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
Semiconductor Components Industries, LLC, 2003
1
Publication Order Number:
December, 2003 − Rev. 13
MC74VHC1GU04/D
MC74VHC1GU04
MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
V
V
V
V
DC Supply Voltage
*0.5 to )7.0
−0.5 to +7.0
CC
IN
DC Input Voltage
V
DC Output Voltage
*0.5 to V )0.5
V
OUT
CC
I
I
I
I
DC Input Diode Current
DC Output Diode Current
DC Output Sink Current
DC Supply Current per Supply Pin
Storage Temperature Range
−20
$20
mA
mA
mA
mA
°C
IK
OK
$12.5
$25
OUT
CC
T
T
T
*65 to )150
260
STG
Lead Temperature, 1 mm from Case for 10 Seconds
Junction Temperature Under Bias
Thermal Resistance
°C
L
)150
°C
J
q
SC70−5/SC−88A (Note 1)
TSOP−5
350
230
°C/W
JA
P
D
Power Dissipation in Still Air at 85°C
SC70−5/SC−88A
TSOP−5
150
200
mW
MSL
Moisture Sensitivity
Flammability Rating
ESD Withstand Voltage
Level 1
F
R
Oxygen Index: 28 to 34
UL 94 V−0 @ 0.125 in
V
ESD
Human Body Model (Note 2)
Machine Model (Note 3)
Charged Device Model (Note 4)
u1500
u200
N/A
V
I
Latch−Up Performance
Above V and Below GND at 125°C (Note 5)
$500
mA
LATCH−UP
CC
Maximum Ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those
indicated may adversely affect device reliability. Functional operation under absolute−maximum−rated conditions is not implied. Functional
operation should be restricted to the Recommended Operating Conditions.
1. Measured with minimum pad spacing on an FR4 board, using 10 mm−by−1 inch, 2−ounce copper trace with no air flow.
2. Tested to EIA/JESD22−A114−A.
3. Tested to EIA/JESD22−A115−A.
4. Tested to JESD22−C101−A.
5. Tested to EIA/JESD78.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
2.0
Max
5.5
Unit
V
V
DC Supply Voltage
CC
IN
V
V
DC Input Voltage
0.0
5.5
V
DC Output Voltage
0.0
V
CC
V
OUT
T
Operating Temperature Range
Input Rise and Fall Time
*55
)125
°C
ns/V
A
t , t
r
V
CC
V
CC
= 3.3 V ± 0.3 V
= 5.0 V ± 0.5 V
0
0
100
20
f
DEVICE JUNCTION TEMPERATURE VERSUS
TIME TO 0.1% BOND FAILURES
Junction
Temperature °C
FAILURE RATE OF PLASTIC = CERAMIC
UNTIL INTERMETALLICS OCCUR
Time, Hours
Time, Years
80
1,032,200
419,300
178,700
79,600
37,000
17,800
8,900
117.8
47.9
20.4
9.4
90
100
110
120
130
140
1
4.2
1
10
100
1000
2.0
TIME, YEARS
1.0
Figure 3. Failure Rate vs. Time Junction Temperature
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2
MC74VHC1GU04
DC ELECTRICAL CHARACTERISTICS
T
A
= 25°C
T
A
≤ 85°C
−55 ≤ T ≤ 125°C
A
V
CC
Min
Typ
Max
Min
Max
Min
Max
(V)
Symbol
Parameter
Test Conditions
Unit
V
V
V
Minimum High−Level
Input Voltage
2.0
3.0
4.5
5.5
1.7
2.4
3.6
4.4
1.7
2.4
3.6
4.4
1.7
2.4
3.6
4.4
V
IH
Maximum Low−Level
Input Voltage
2.0
3.0
4.5
5.5
0.3
0.6
0.9
1.1
0.3
0.6
0.9
1.1
0.3
0.6
0.9
1.1
V
IL
V
I
= V or V
= −50 mA
2.0
3.0
4.5
1.9
2.9
4.4
2.0
3.0
4.5
1.9
2.9
4.4
1.9
2.9
4.4
V
V
V
V
Minimum High−Level
Output Voltage
IN
OH
IH
IL
IL
IL
IL
OH
V
IN
= V or V
IH IL
V
= V or V
IN
OH
OH
IH
I
I
= −4 mA
= −8 mA
3.0
4.5
2.58
3.94
2.48
3.80
2.34
3.66
V
I
= V or V
2.0
3.0
4.5
0.0
0.0
0.0
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
V
OL
Maximum Low−Level
Output Voltage
IN
OL
IH
= 50 mA
V
IN
= V or V
IH IL
V
= V or V
IN
OL
OL
IH
I
I
= 4 mA
= 8 mA
3.0
4.5
0.36
0.36
0.44
0.44
0.52
0.52
I
I
Maximum Input
Leakage Current
V
= 5.5 V or GND
0 to
5.5
±0.1
±1.0
±1.0
mA
mA
IN
IN
Maximum Quiescent
Supply Current
V
IN
= V or GND
5.5
1.0
20
40
CC
CC
AC ELECTRICAL CHARACTERISTICS Input t = t = 3.0 ns
r
f
T
A
= 25°C
T
A
≤ 85°C
−55 ≤ T ≤ 125°C
A
Min
Typ
Max
Min
Max
Min
Max
Symbol
Parameter
Test Conditions
Unit
t
t
,
V
V
= 3.3 ± 0.3 V C = 15 pF
3.5
4.8
8.9
11.4
10.5
13.0
12.0
15.5
ns
Maximum Propaga-
tion Delay,
Input A to Y
PLH
PHL
CC
L
C = 50 pF
L
= 5.0 ± 0.5 V C = 15 pF
2.5
3.8
5.5
7.0
6.5
8.0
8.0
9.5
CC
L
C = 50 pF
L
C
Maximum Input Ca-
pacitance
4
10
10
10
pF
pF
IN
Typical @ 25°C, V = 5.0V
CC
22
C
Power Dissipation Capacitance (Note 6)
PD
6. C is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
PD
Average operating current can be obtained by the equation: I
) = C ꢀ V ꢀ f + I . C is used to determine the no−load dynamic
CC(OPR
PD CC in CC PD
2
power consumption; P = C ꢀ V
ꢀ f + I ꢀ V
.
D
PD
CC
in
CC
CC
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3
MC74VHC1GU04
OUTPUT
INPUT
C
L*
V
CC
A
Y
50% V
CC
GND
t
t
PLH
PHL
V
V
OH
*Includes all probe and jig capacitance.
A 1−MHz square input wave is recommended for
propagation delay tests.
50% V
CC
OL
Figure 4. Switching Waveforms
Figure 5. Test Circuit
DEVICE ORDERING INFORMATION
Device Nomenclature
Device
Temp
Range
Identifier
Tape &
Reel
Suffix
Package Type
(Name/SOT#/
Common Name)
Circuit
Indicator
Package
Suffix
Tape and
Reel Size
Device
Order Number
†
Function
Technology
SC70−5/SC−88A/
SOT−353
178 mm (7 in)
3000 Unit
MC74VHC1GU04DFT1
MC74VHC1GU04DFT2
MC
MC
74
74
VHC1G
VHC1G
U04
U04
DF
DF
T1
T2
SC70−5/SC−88A/
SOT−353
178 mm (7 in)
3000 Unit
SOT23−5/TSOP−5
178 mm (7 in)
3000 Unit
/
SC59−5
MC74VHC1GU04DTT1
MC
74
VHC1G
U04
DT
T1
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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4
MC74VHC1GU04
TAPE TRAILER
(Connected to Reel Hub)
NO COMPONENTS
160 mm MIN
TAPE LEADER
NO COMPONENTS
400 mm MIN
COMPONENTS
DIRECTION OF FEED
CAVITY TOP TAPE
TAPE
Figure 6. Tape Ends for Finished Goods
TAPE DIMENSIONS mm
4.00
4.00
Ğ1.50 TYP
2.00
1.75
3.50 $0.50
8.00 $0.30
1
Ğ1.00 MIN
DIRECTION OF FEED
Figure 7. SC−70−5/SC−88A/SOT−353 DFT1 Reel Configuration/Orientation
TAPE DIMENSIONS mm
4.00
4.00
Ğ1.50 TYP
2.00
1.75
3.50 $0.50
8.00 $0.30
1
Ğ1.00 MIN
DIRECTION OF FEED
Figure 8. SC−70/SC−88A/SOT−353 DFT2 and SOT23−5/TSOP−5/SC59−5 DTT1 Reel Configuration/Orientation
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5
MC74VHC1GU04
t MAX
13.0 mm $0.2 mm
(0.512 in $0.008 in)
1.5 mm MIN
(0.06 in)
50 mm MIN
(1.969 in)
20.2 mm MIN
(0.795 in)
A
FULL RADIUS
G
Figure 9. Reel Dimensions
REEL DIMENSIONS
Tape Size
T and R Suffix
A Max
G
t Max
8 mm
T1, T2
178 mm
(7 in)
8.4 mm, + 1.5 mm, −0.0
(0.33 in + 0.059 in, −0.00)
14.4 mm
(0.56 in)
DIRECTION OF FEED
BARCODE LABEL
POCKET
HOLE
Figure 10. Reel Winding Direction
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6
MC74VHC1GU04
PACKAGE DIMENSIONS
SC70−5/SC−88A/SOT−353
DF SUFFIX
NOTES:
5−LEAD PACKAGE
CASE 419A−02
ISSUE G
1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. 419A−01 OBSOLETE. NEW STANDARD
419A−02.
A
G
4. DIMENSIONS A AND B DO NOT INCLUDE
MOLD FLASH, PROTRUSIONS, OR GATE
BURRS.
INCHES
DIM MIN MAX
MILLIMETERS
5
4
3
MIN
1.80
1.15
0.80
0.10
MAX
2.20
1.35
1.10
0.30
A
B
C
D
G
H
J
0.071
0.045
0.031
0.004
0.087
0.053
0.043
0.012
−B−
S
1
2
0.026 BSC
0.65 BSC
−−−
0.004
0.004
0.004
0.010
0.012
−−−
0.10
0.10
0.10
0.25
0.30
K
N
S
M
M
0.2 (0.008)
B
D 5 PL
0.008 REF
0.20 REF
0.079
0.087
2.00
2.20
N
J
K
SOLDERING FOOTPRINT*
0.50
0.0197
0.65
0.025
0.65
0.025
0.40
0.0157
mm
inches
ǒ
Ǔ
SCALE 20:1
1.9
0.0748
Figure 11. SC−88A/SC70−5/SOT−353
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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7
MC74VHC1GU04
PACKAGE DIMENSIONS
SOT23−5/TSOP−5/SC59−5
DT SUFFIX
NOTES:
5−LEAD PACKAGE
CASE 483−01
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. MAXIMUM LEAD THICKNESS INCLUDES
LEAD FINISH THICKNESS. MINIMUM LEAD
THICKNESS IS THE MINIMUM THICKNESS
OF BASE MATERIAL.
D
ISSUE C
5
4
3
B
C
S
4. A AND B DIMENSIONS DO NOT INCLUDE
MOLD FLASH, PROTRUSIONS, OR GATE
BURRS.
1
2
L
MILLIMETERS
DIM MIN MAX
INCHES
MIN MAX
G
A
B
C
D
G
H
J
K
L
M
S
2.90
1.30
0.90
0.25
0.85
3.10 0.1142 0.1220
1.70 0.0512 0.0669
1.10 0.0354 0.0433
0.50 0.0098 0.0197
1.05 0.0335 0.0413
A
J
0.013 0.100 0.0005 0.0040
0.05 (0.002)
0.10
0.20
1.25
0
0.26 0.0040 0.0102
0.60 0.0079 0.0236
1.55 0.0493 0.0610
H
M
K
10
0
10
_
_
_
_
2.50
3.00 0.0985 0.1181
SOLDERING FOOTPRINT*
1.9
0.074
0.95
0.037
2.4
0.094
1.0
0.039
mm
inches
ǒ
Ǔ
0.7
0.028
SCALE 10:1
Figure 12. THIN SOT23−5/TSOP−5/SC59−5
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
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For additional information, please contact your
local Sales Representative.
MC74VHC1GU04/D
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