MC74VHC244ML2 [ONSEMI]

IC,BUFFER/DRIVER,DUAL,4-BIT,AHC/VHC-CMOS,SOP,20PIN,PLASTIC;
MC74VHC244ML2
型号: MC74VHC244ML2
厂家: ONSEMI    ONSEMI
描述:

IC,BUFFER/DRIVER,DUAL,4-BIT,AHC/VHC-CMOS,SOP,20PIN,PLASTIC

驱动 光电二极管 逻辑集成电路
文件: 总6页 (文件大小:165K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
SEMICONDUCTOR TECHNICAL DATA  
The MC74VHC244 is an advanced high speed CMOS octal bus buffer  
fabricated with silicon gate CMOS technology. It achieves high speed  
operation similar to equivalent Bipolar Schottky TTL while maintaining  
CMOS low power dissipation.  
The MC74VHC244 is a noninverting 3–state buffer, and has two  
active–low output enables. This device is designed to be used with 3–state  
memory address drivers, etc.  
The internal circuit is composed of three stages, including a buffer output  
which provides high noise immunity and stable output. The inputs tolerate  
voltages up to 7V, allowing the interface of 5V systems to 3V systems.  
DW SUFFIX  
20–LEAD SOIC PACKAGE  
CASE 751D–04  
High Speed: t  
= 3.9ns (Typ) at V  
= 5V  
PD  
Low Power Dissipation: I  
CC  
= 4µA (Max) at T = 25°C  
CC  
NIH  
A
High Noise Immunity: V  
Power Down Protection Provided on Inputs  
Balanced Propagation Delays  
Designed for 2V to 5.5V Operating Range  
= V  
= 28% V  
NIL CC  
DT SUFFIX  
20–LEAD TSSOP PACKAGE  
CASE 948E–02  
Low Noise: V  
= 0.9V (Max)  
OLP  
Pin and Function Compatible with Other Standard Logic Families  
Latchup Performance Exceeds 300mA  
ESD Performance: HBM > 2000V; Machine Model > 200V  
Chip Complexity: 136 FETs or 34 Equivalent Gates  
M SUFFIX  
20–LEAD SOIC EIAJ PACKAGE  
CASE 967–01  
LOGIC DIAGRAM  
ORDERING INFORMATION  
2
4
6
8
18  
16  
14  
12  
MC74VHCXXXDW  
MC74VHCXXXDT  
MC74VHCXXXM  
SOIC  
TSSOP  
SOIC EIAJ  
A1  
A2  
A3  
A4  
YA1  
YA2  
YA3  
YA4  
PIN ASSIGNMENT  
OEA  
1
20  
V
CC  
DATA  
INPUTS  
NONINVERTING  
OUTPUTS  
11  
13  
9
7
A1  
YB4  
A2  
2
3
4
19  
18  
17  
OEB  
YA1  
B4  
B1  
B2  
YB1  
YB2  
YB3  
A3  
5
16  
15  
14  
13  
12  
11  
YA2  
B3  
15  
17  
5
3
B3  
B4  
YB3  
YB4  
6
YB2  
A4  
7
YA3  
B2  
8
YB1  
GND  
9
YA4  
B1  
10  
1
OEA  
OEB  
OUTPUT  
ENABLES  
19  
FUNCTION TABLE  
INPUTS  
OUTPUTS  
YA, YB  
OEA, OEB  
A, B  
L
L
H
L
H
X
L
H
Z
6/97  
REV 1  
Motorola, Inc. 1997  
MC74VHC244  
MAXIMUM RATINGS*  
Symbol  
Parameter  
Value  
Unit  
V
This device contains protection  
circuitry to guard against damage  
due to high static voltages or electric  
fields. However, precautions must  
be taken to avoid applications of any  
voltage higher than maximum rated  
voltages to this high–impedance cir-  
V
DC Supply Voltage  
DC Input Voltage  
– 0.5 to + 7.0  
– 0.5 to + 7.0  
CC  
V
V
in  
V
DC Output Voltage  
Input Diode Current  
Output Diode Current  
– 0.5 to V  
CC  
+ 0.5  
V
out  
I
IK  
– 20  
mA  
mA  
mA  
mA  
mW  
cuit. For proper operation, V and  
in  
I
± 20  
± 25  
± 50  
OK  
V
should be constrained to the  
out  
range GND (V or V  
)
V
.
I
DC Output Current, per Pin  
DC Supply Current, V and GND Pins  
in out  
CC  
out  
CC  
Unused inputs must always be  
tied to an appropriate logic voltage  
I
CC  
level (e.g., either GND or V  
).  
P
D
Power Dissipation in Still Air,  
SOIC Packages†  
TSSOP Package†  
500  
450  
CC  
Unused outputs must be left open.  
T
stg  
Storage Temperature  
– 65 to + 150  
C
* Absolute maximum continuous ratings are those values beyond which damage to the device  
may occur. Exposure to these conditions or conditions beyond those indicated may adversely  
affect device reliability. Functional operation under absolute–maximum–rated conditions is not  
implied.  
†Derating — SOIC Packages: – 7 mW/ C from 65 to 125 C  
TSSOP Package: – 6.1 mW/ C from 65 to 125 C  
RECOMMENDED OPERATING CONDITIONS  
Symbol  
Parameter  
Min  
2.0  
0
Max  
5.5  
Unit  
V
V
CC  
DC Supply Voltage  
DC Input Voltage  
DC Output Voltage  
V
in  
5.5  
V
V
out  
0
V
CC  
V
T
A
Operating Temperature, All Package Types  
– 40  
+ 85  
C
t , t  
r f  
Input Rise and Fall Time  
V
CC  
V
CC  
= 3.3V ±0.3V  
=5.0V ±0.5V  
0
0
100  
20  
ns/V  
DC ELECTRICAL CHARACTERISTICS  
T
A
= 25°C  
T = – 40 to 85°C  
A
V
CC  
V
Symbol  
Parameter  
Test Conditions  
Unit  
Min  
1.50  
Typ  
Max  
Min  
Max  
V
IH  
Minimum High–Level  
Input Voltage  
2.0  
3.0 to  
5.5  
1.50  
V
V
x 0.7  
V
x 0.7  
CC  
CC  
V
Maximum Low–Level  
Input Voltage  
2.0  
3.0 to  
5.5  
0.50  
0.50  
V
V
IL  
V
x 0.3  
V
x 0.3  
CC  
CC  
V
OH  
Minimum High–Level  
Output Voltage  
V
= V or V  
IH  
2.0  
3.0  
4.5  
1.9  
2.9  
4.4  
2.0  
3.0  
4.5  
1.9  
2.9  
4.4  
in  
IL  
IL  
I
= – 50µA  
OH  
V
in  
= V or V  
IH  
I
I
= – 4mA  
3.0  
4.5  
2.58  
3.94  
2.48  
3.80  
OH  
OH  
= – 8mA  
V
OL  
Maximum Low–Level  
Output Voltage  
V
= V or V  
IH IL  
= 50µA  
2.0  
3.0  
4.5  
0.0  
0.0  
0.0  
0.1  
0.1  
0.1  
0.1  
0.1  
0.1  
V
in  
I
OL  
V
= V or V  
in  
in  
IH  
IL  
I
I
= 4mA  
= 8mA  
3.0  
4.5  
0.36  
0.36  
0.44  
0.44  
OL  
OL  
I
in  
Maximum Input  
Leakage Current  
V
= 5.5V or GND  
0 to 5.5  
± 0.1  
± 1.0  
µA  
MOTOROLA  
2
MC74VHC244  
DC ELECTRICAL CHARACTERISTICS  
T
A
= 25°C  
T = – 40 to 85°C  
A
V
CC  
V
Symbol  
Parameter  
Test Conditions  
Min  
Typ  
Max  
Min  
Max  
Unit  
I
Maximum Three–State  
Leakage Current  
V
= V or V  
5.5  
± 0.25  
± 2.5  
µA  
OZ  
in  
IL  
= V  
IH  
or GND  
V
out  
CC  
or GND  
I
Maximum Quiescent  
Supply Current  
V
in  
= V  
5.5  
4.0  
40.0  
µA  
CC  
CC  
AC ELECTRICAL CHARACTERISTICS (Input t = t = 3.0ns)  
r
f
T
A
= 25°C  
T
A
= – 40 to 85°C  
Symbol  
Parameter  
Test Conditions  
Unit  
Min  
Typ  
Max  
Min  
1.0  
Max  
t
t
,
Maximum Propagation Delay,  
A to YA or B to YB  
V
V
V
= 3.3 ± 0.3V  
= 5.0 ± 0.5V  
= 3.3 ± 0.3V  
C
C
= 15pF  
= 50pF  
5.8  
8.3  
8.4  
11.9  
10.0  
13.5  
ns  
PLH  
CC  
CC  
CC  
L
L
1.0  
PHL  
C
C
= 15pF  
= 50pF  
3.9  
5.4  
5.5  
7.5  
1.0  
1.0  
6.5  
8.5  
L
L
t
t
,
Output Enable Time  
OEA to YA or OEB to YB  
C
C
= 15pF  
= 50pF  
6.6  
9.1  
10.6  
14.1  
1.0  
1.0  
12.5  
16.0  
ns  
ns  
pF  
PZL  
L
L
R
= 1kΩ  
PZH  
L
V
R
= 5.0 ± 0.5V  
= 1kΩ  
C
L
C
L
= 15pF  
= 50pF  
4.7  
6.2  
7.3  
9.3  
1.0  
1.0  
8.5  
10.5  
CC  
L
t
t
,
Output Disable Time  
OEA to YA or OEB to YB  
V
R
= 3.3 ± 0.3V  
= 1kΩ  
C
C
C
C
= 50pF  
= 50pF  
= 50pF  
= 50pF  
10.3  
14.0  
9.2  
1.5  
1.0  
10  
1.0  
16.0  
10.5  
1.5  
PLZ  
CC  
L
L
L
L
PHZ  
L
V
R
= 5.0 ± 0.5V  
= 1kΩ  
6.7  
1.0  
CC  
L
t
t
,
Output to Output Skew  
V
CC  
= 3.3 ± 0.3V  
(Note 1.)  
OSLH  
OSHL  
V
= 5.0 ± 0.5V  
CC  
(Note 1.)  
1.0  
C
Maximum Input Capacitance  
4
6
10  
pF  
pF  
in  
C
Maximum Three–State Output  
Capacitance (Output in  
out  
High–Impedance State)  
Typical @ 25°C, V  
= 5.0V  
CC  
C
Power Dissipation Capacitance (Note 2.)  
pF  
19  
PD  
1. Parameter guaranteed by design. t = |t – t  
|, t  
= |t  
– t |.  
PHLm PHLn  
OSLH  
PLHm PLHn OSHL  
2. C  
is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.  
PD  
Averageoperatingcurrentcanbeobtainedbytheequation:I  
=C  
V
f
+I  
/8(perbit).C isusedtodeterminetheno–load  
PD  
CC(OPR)  
PD CC in CC  
2
dynamic power consumption; P = C  
V
f
+ I  
in CC  
V
.
D
PD  
CC  
CC  
NOISE CHARACTERISTICS (Input t = t = 3.0ns, C = 50pF, V  
= 5.0V)  
r
f
L
CC  
T
A
= 25°C  
Symbol  
Parameter  
Unit  
V
Typ  
Max  
V
OLP  
Quiet Output Maximum Dynamic V  
0.6  
0.9  
– 0.9  
3.5  
OL  
V
OLV  
Quiet Output Minimum Dynamic V  
– 0.6  
V
OL  
V
IHD  
Minimum High Level Dynamic Input Voltage  
Maximum Low Level Dynamic Input Voltage  
V
V
ILD  
1.5  
V
3
MOTOROLA  
MC74VHC244  
SWITCHING WAVEFORMS  
V
CC  
V
A or B  
CC  
OEA or OEB  
50%  
50%  
GND  
GND  
t
t
PLZ  
PZL  
HIGH  
IMPEDANCE  
t
t
PHL  
PLH  
YA or YB  
50% V  
CC  
YA or YB  
YA or YB  
50% V  
CC  
V
V
+0.3V  
OL  
t
t
PHZ  
PZH  
–0.3V  
OH  
50% V  
CC  
HIGH  
IMPEDANCE  
Figure 1.  
Figure 2.  
TEST CIRCUITS  
TEST POINT  
TEST POINT  
1 k  
OUTPUT  
CONNECT TO V  
WHEN  
.
PZL  
CC  
AND t  
OUTPUT  
TESTING t  
PLZ  
CONNECT TO GND WHEN  
TESTING t AND t  
DEVICE  
UNDER  
TEST  
DEVICE  
UNDER  
TEST  
.
PZH  
PHZ  
C *  
C *  
L
L
* Includes all probe and jig capacitance  
* Includes all probe and jig capacitance  
Figure 3. Test Circuit  
Figure 4. Test Circuit  
INPUT  
Figure 5. Input Equivalent Circuit  
MOTOROLA  
4
MC74VHC244  
OUTLINE DIMENSIONS  
DW SUFFIX  
PLASTIC SOIC PACKAGE  
CASE 751D–04  
ISSUE E  
NOTES:  
1. DIMENSIONING AND TOLERANCING PER  
–A–  
ANSI Y14.5M, 1982.  
20  
11  
2. CONTROLLING DIMENSION: MILLIMETER.  
3. DIMENSIONS A AND B DO NOT INCLUDE  
MOLD PROTRUSION.  
4. MAXIMUM MOLD PROTRUSION 0.150  
(0.006) PER SIDE.  
10X P  
–B–  
5. DIMENSION D DOES NOT INCLUDE  
DAMBAR PROTRUSION. ALLOWABLE  
DAMBAR PROTRUSION SHALL BE 0.13  
(0.005) TOTAL IN EXCESS OF D DIMENSION  
AT MAXIMUM MATERIAL CONDITION.  
M
M
0.010 (0.25)  
B
1
10  
MILLIMETERS  
INCHES  
20X D  
DIM  
A
B
C
D
MIN  
12.65  
7.40  
2.35  
0.35  
0.50  
MAX  
12.95  
7.60  
2.65  
0.49  
0.90  
MIN  
MAX  
0.510  
0.299  
0.104  
0.019  
0.035  
J
0.499  
0.292  
0.093  
0.014  
0.020  
M
S
S
0.010 (0.25)  
T
A
B
F
F
G
J
K
M
P
R
1.27 BSC  
0.050 BSC  
0.25  
0.10  
0
0.32  
0.25  
7
0.010  
0.004  
0
0.012  
0.009  
7
R X 45  
10.05  
0.25  
10.55  
0.75  
0.395  
0.010  
0.415  
0.029  
C
SEATING  
PLANE  
–T–  
M
18X G  
K
DT SUFFIX  
PLASTIC TSSOP PACKAGE  
CASE 948E–02  
ISSUE A  
20X K REF  
0.10 (0.004)  
NOTES:  
1. DIMENSIONING AND TOLERANCING PER ANSI  
Y14.5M, 1982.  
M
S
S
T
U
V
S
0.15 (0.006)  
T U  
2. CONTROLLING DIMENSION: MILLIMETER.  
3. DIMENSION A DOES NOT INCLUDE MOLD FLASH,  
PROTRUSIONS OR GATE BURRS. MOLD FLASH  
OR GATE BURRS SHALL NOT EXCEED 0.15  
(0.006) PER SIDE.  
4. DIMENSION B DOES NOT INCLUDE INTERLEAD  
FLASH OR PROTRUSION. INTERLEAD FLASH OR  
PROTRUSION SHALL NOT EXCEED 0.25 (0.010)  
PER SIDE.  
5. DIMENSION K DOES NOT INCLUDE DAMBAR  
PROTRUSION. ALLOWABLE DAMBAR  
PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN  
EXCESS OF THE K DIMENSION AT MAXIMUM  
MATERIAL CONDITION.  
6. TERMINAL NUMBERS ARE SHOWN FOR  
REFERENCE ONLY.  
K
K1  
20  
11  
2X L/2  
J J1  
B
L
–U–  
PIN 1  
IDENT  
SECTION N–N  
1
10  
0.25 (0.010)  
N
S
7. DIMENSION A AND B ARE TO BE DETERMINED  
AT DATUM PLANE –W–.  
0.15 (0.006)  
T U  
M
A
MILLIMETERS  
INCHES  
DIM  
A
B
C
D
MIN  
6.40  
4.30  
–––  
0.05  
0.50  
MAX  
6.60  
4.50  
1.20  
0.15  
0.75  
MIN  
MAX  
0.260  
0.177  
0.047  
0.006  
0.030  
–V–  
0.252  
0.169  
–––  
0.002  
0.020  
N
F
F
G
H
J
J1  
K
K1  
L
0.65 BSC  
0.026 BSC  
DETAIL E  
0.27  
0.09  
0.09  
0.19  
0.19  
0.37  
0.20  
0.16  
0.30  
0.25  
0.011  
0.004  
0.004  
0.007  
0.007  
0.015  
0.008  
0.006  
0.012  
0.010  
–W–  
C
6.40 BSC  
0.252 BSC  
G
D
M
0
8
0
8
H
DETAIL E  
0.100 (0.004)  
–T– SEATING  
PLANE  
5
MOTOROLA  
MC74VHC244  
OUTLINE DIMENSIONS  
M SUFFIX  
PLASTIC SOIC EIAJ PACKAGE  
CASE 967–01  
ISSUE O  
NOTES:  
1. DIMENSIONING AND TOLERANCING PER ANSI  
Y14.5M, 1982.  
2. CONTROLLING DIMENSION: MILLIMETER.  
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD  
FLASH OR PROTRUSIONS AND ARE MEASURED  
AT THE PARTING LINE. MOLD FLASH OR  
PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006)  
PER SIDE.  
L
E
20  
11  
Q
1
4. TERMINAL NUMBERS ARE SHOWN FOR  
REFERENCE ONLY.  
H
E
E
M
5. THE LEAD WIDTH DIMENSION (b) DOES NOT  
INCLUDE DAMBAR PROTRUSION. ALLOWABLE  
DAMBAR PROTRUSION SHALL BE 0.08 (0.003)  
TOTAL IN EXCESS OF THE LEAD WIDTH  
DIMENSION AT MAXIMUM MATERIAL CONDITION.  
DAMBAR CANNOT BE LOCATED ON THE LOWER  
RADIUS OR THE FOOT. MINIMUM SPACE  
BETWEEN PROTRUSIONS AND ADJACENT LEAD  
TO BE 0.46 ( 0.018).  
L
1
10  
DETAIL P  
Z
D
VIEW P  
MILLIMETERS  
INCHES  
e
A
DIM  
A
1
b
c
D
E
e
MIN  
–––  
MAX  
2.05  
0.20  
0.50  
0.27  
12.80  
5.45  
MIN  
MAX  
0.081  
0.008  
0.020  
0.011  
0.504  
0.215  
c
–––  
0.002  
0.014  
0.007  
0.486  
0.201  
A
0.05  
0.35  
0.18  
12.35  
5.10  
A
b
1
1.27 BSC  
0.050 BSC  
M
0.10 (0.004)  
0.13 (0.005)  
H
7.40  
0.50  
1.10  
0
8.20  
0.85  
1.50  
10  
0.291  
0.020  
0.043  
0
0.323  
0.033  
0.059  
10  
E
L
L
M
E
Q
Z
0.70  
–––  
0.90  
0.81  
0.028  
–––  
0.035  
0.032  
1
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the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and  
specificallydisclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motorola  
datasheetsand/orspecificationscananddovaryindifferentapplicationsandactualperformancemayvaryovertime. Alloperatingparameters,includingTypicals”  
must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of  
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arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that  
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MC74VHC244/D  

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MC74VHC245

Octal Bus Transceiver
ONSEMI

MC74VHC245DT

Octal Bus Transceiver
ONSEMI

MC74VHC245DTG

Octal Bus Buffer/Line Driver
ONSEMI

MC74VHC245DTR2

Octal Bus Transceiver
ONSEMI

MC74VHC245DTR2G

Octal Bus Buffer/Line Driver
ONSEMI

MC74VHC245DW

Octal Bus Transceiver
ONSEMI

MC74VHC245DWG

Octal Bus Transceiver, SOIC-20 WB, 38-TUBE
ONSEMI

MC74VHC245DWR2

Octal Bus Transceiver
ONSEMI

MC74VHC245DWR2G

Octal Bus Buffer/Line Driver
ONSEMI

MC74VHC245M

Octal Bus Transceiver
ONSEMI