MC74VHC86 [ONSEMI]
Quad 2-Input XOR Gate; 四2输入异或门
| 型号： | MC74VHC86 |
| 厂家： | 
ONSEMI |
| 描述： | Quad 2-Input XOR Gate |
| 文件： | 总5页 (文件大小：140K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SEMICONDUCTOR TECHNICAL DATA
The MC74VHC86 is an advanced high speed CMOS 2–input Exclu-
sive–OR gate fabricated with silicon gate CMOS technology. It achieves high
speed operation similar to equivalent Bipolar Schottky TTL while maintaining
CMOS low power dissipation.
The internal circuit is composed of three stages, including a buffer output
which provides high noise immunity and stable output. The inputs tolerate
voltages up to 7V, allowing the interface of 5V systems to 3V systems.
D SUFFIX
14–LEAD SOIC PACKAGE
CASE 751A–03
•
•
•
•
•
•
•
•
•
•
•
High Speed: t
= 4.8ns (Typ) at V
= 5V
PD
Low Power Dissipation: I
CC
= 2µA (Max) at T = 25°C
CC
A
High Noise Immunity: V
Power Down Protection Provided on Inputs
Balanced Propagation Delays
= V
= 28% V
NIH
NIL CC
DT SUFFIX
14–LEAD TSSOP PACKAGE
CASE 948G–01
Designed for 2V to 5.5V Operating Range
Low Noise: V
= 0.8V (Max)
OLP
Pin and Function Compatible with Other Standard Logic Families
Latchup Performance Exceeds 300mA
ESD Performance: HBM > 2000V; Machine Model > 200V
Chip Complexity: 56 FETs or 14 Equivalent Gates
M SUFFIX
14–LEAD SOIC EIAJ PACKAGE
CASE 965–01
LOGIC DIAGRAM
1
ORDERING INFORMATION
A1
3
Y1
Y2
Y3
Y4
2
4
MC74VHCXXD
MC74VHCXXDT
MC74VHCXXM
SOIC
TSSOP
SOICEIAJ
B1
A2
6
8
5
9
B2
A3
Y = A
B
FUNCTION TABLE
10
12
B3
A4
Inputs
Output
Y
11
13
A
B
B4
L
L
L
H
L
L
H
H
L
H
H
H
Pinout: 14–Lead Packages (Top View)
V
B4
13
A4
12
Y4
11
B3
10
A3
9
Y3
8
CC
14
1
2
3
4
5
6
7
A1
B1
Y1
A2
B2
Y2
GND
6/97
REV 0
Motorola, Inc. 1997
MC74VHC86
MAXIMUM RATINGS*
Symbol
Parameter
Value
Unit
V
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this high–impedance cir-
V
DC Supply Voltage
DC Input Voltage
– 0.5 to + 7.0
– 0.5 to + 7.0
CC
V
V
in
V
DC Output Voltage
Input Diode Current
Output Diode Current
– 0.5 to V
CC
+ 0.5
V
out
I
IK
– 20
mA
mA
mA
mA
mW
cuit. For proper operation, V and
in
I
± 20
± 25
± 50
OK
V
should be constrained to the
out
range GND (V or V
)
V
.
I
DC Output Current, per Pin
DC Supply Current, V and GND Pins
in out
CC
out
CC
Unused inputs must always be
tied to an appropriate logic voltage
I
CC
level (e.g., either GND or V
).
P
D
Power Dissipation in Still Air,
SOIC Packages†
TSSOP Package†
500
450
CC
Unused outputs must be left open.
T
stg
Storage Temperature
– 65 to + 150
C
* Absolute maximum continuous ratings are those values beyond which damage to the device
may occur. Exposure to these conditions or conditions beyond those indicated may adversely
affect device reliability. Functional operation under absolute–maximum–rated conditions is not
implied.
†Derating — SOIC Packages: – 7 mW/ C from 65 to 125 C
TSSOP Package: – 6.1 mW/ C from 65 to 125 C
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
2.0
0
Max
5.5
Unit
V
V
CC
DC Supply Voltage
DC Input Voltage
DC Output Voltage
V
in
5.5
V
V
out
0
V
CC
V
T
A
Operating Temperature, All Package Types
– 40
+ 85
C
t , t
r f
Input Rise and Fall Time
V
CC
V
CC
= 3.3V ±0.3V
=5.0V ±0.5V
0
0
100
20
ns/V
DC ELECTRICAL CHARACTERISTICS
T
A
= 25°C
T = – 40 to 85°C
A
V
CC
V
Symbol
Parameter
Test Conditions
Unit
Min
1.50
Typ
Max
Min
Max
V
IH
High–Level Input
Voltage
2.0
3.0 to
5.5
1.50
V
V
x 0.7
V
x 0.7
CC
CC
V
Low–Level Input
Voltage
2.0
3.0 to
5.5
0.50
0.50
V
V
IL
V
x 0.3
V
x 0.3
CC
CC
V
OH
High–Level Output
Voltage
V
= V or V
IH
2.0
3.0
4.5
1.9
2.9
4.4
2.0
3.0
4.5
1.9
2.9
4.4
in
IL
IL
I
= – 50µA
OH
V
in
= V or V
IH
I
I
= – 4mA
3.0
4.5
2.58
3.94
2.48
3.80
OH
OH
= – 8mA
V
OL
Low–Level Output
Voltage
V
= V or V
IH IL
= 50µA
2.0
3.0
4.5
0.0
0.0
0.0
0.1
0.1
0.1
0.1
0.1
0.1
V
in
I
OL
V
in
= V or V
IH
IL
I
I
= 4mA
= 8mA
3.0
4.5
0.36
0.36
0.44
0.44
OL
OL
I
Input Leakage Current
V
V
= 5.5V or GND
0 to 5.5
5.5
± 0.1
± 1.0
µA
µA
in
in
I
Quiescent Supply
Current
= V
or GND
CC
2.0
20.0
CC
in
MOTOROLA
2
MC74VHC86
AC ELECTRICAL CHARACTERISTICS (Input t = t = 3.0ns)
r
f
T
A
= 25°C
T = – 40 to 85°C
A
Symbol
Parameter
Test Conditions
Unit
Min
Typ
Max
Min
Max
t
t
,
Propagation Delay, A or B to Y
V
V
= 3.3 ± 0.3V
C
C
= 15pF
= 50pF
7.0
9.5
11.0
14.5
1.0
1.0
13.0
16.5
ns
PLH
CC
L
L
PHL
= 5.0 ± 0.5V
C
C
= 15pF
= 50pF
4.8
6.3
6.8
8.8
1.0
1.0
8.0
10.0
CC
L
L
C
C
Input Capacitance
4
10
10
pF
pF
in
Typical @ 25°C, V
= 5.0V
CC
Power Dissipation Capacitance (Note NO TAG)
18
PD
PD
1. C
is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
=C +I /4(pergate).C isusedtodeterminetheno–load
Averageoperatingcurrentcanbeobtainedbytheequation:I
dynamic power consumption; P = C
V
f
CC(OPR)
PD CC in CC
PD
2
V
f
+ I
in CC
V
CC
.
D
PD
CC
NOISE CHARACTERISTICS (Input t = t = 3.0ns, C = 50pF, V
= 5.0V, Measured in SOIC Package)
r
f
L
CC
T
A
= 25°C
Symbol
Characteristic
Unit
V
Typ
Max
V
OLP
Quiet Output Maximum Dynamic V
0.3
0.8
– 0.8
3.5
OL
V
OLV
Quiet Output Minimum Dynamic V
– 0.3
V
OL
V
IHD
Minimum High Level Dynamic Input Voltage
Maximum Low Level Dynamic Input Voltage
V
V
ILD
1.5
V
TEST POINT
V
CC
A or B
OUTPUT
50%
DEVICE
UNDER
TEST
GND
t
t
PHL
PLH
C *
L
Y
50% V
CC
* Includes all probe and jig capacitance
Figure 1. Switching Waveforms
Figure 2. Test Circuit
INPUT
Figure 3. Input Equivalent Circuit
3
MOTOROLA
MC74VHC86
OUTLINE DIMENSIONS
D SUFFIX
PLASTIC SOIC PACKAGE
CASE 751A–03
ISSUE F
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
–A–
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
14
1
8
7
P 7 PL
–B–
M
M
0.25 (0.010)
B
MILLIMETERS
INCHES
G
F
R X 45°
DIM
A
B
C
D
F
G
J
MIN
8.55
3.80
1.35
0.35
0.40
MAX
8.75
4.00
1.75
0.49
1.25
MIN
MAX
0.344
0.157
0.068
0.019
0.049
C
0.337
0.150
0.054
0.014
0.016
J
M
SEATING
PLANE
K
D 14 PL
1.27 BSC
0.050 BSC
0.19
0.10
0.25
0.25
0.008
0.004
0.009
0.009
M
S
S
0.25 (0.010)
T
B
A
K
M
P
R
0
5.80
0.25
°
7
6.20
0.50
°
0
°
7°
0.244
0.019
0.228
0.010
DT SUFFIX
PLASTIC TSSOP PACKAGE
CASE 948G–01
ISSUE O
NOTES:
14X K REF
1. DIMENSIONING AND TOLERANCING PER ANSI
M
S
S
Y14.5M, 1982.
0.10 (0.004)
T
U
V
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD FLASH,
PROTRUSIONS OR GATE BURRS. MOLD FLASH
OR GATE BURRS SHALL NOT EXCEED 0.15
(0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE INTERLEAD
FLASH OR PROTRUSION. INTERLEAD FLASH OR
PROTRUSION SHALL NOT EXCEED
0.25 (0.010) PER SIDE.
S
0.15 (0.006) T
U
N
0.25 (0.010)
14
8
2X L/2
M
B
–U–
5. DIMENSION K DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN
EXCESS OF THE K DIMENSION AT MAXIMUM
MATERIAL CONDITION.
L
N
PIN 1
IDENT.
F
7
1
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
DETAIL E
7. DIMENSION A AND B ARE TO BE DETERMINED
AT DATUM PLANE –W–.
S
K
0.15 (0.006) T
U
A
MILLIMETERS
INCHES
K1
DIM
A
B
C
D
F
G
H
J
J1
K
MIN
4.90
4.30
–––
0.05
0.50
MAX
5.10
4.50
1.20
0.15
0.75
MIN
MAX
0.200
0.177
0.047
0.006
0.030
–V–
0.193
0.169
–––
0.002
0.020
J J1
SECTION N–N
0.65 BSC
0.026 BSC
0.50
0.09
0.09
0.19
0.19
0.60
0.20
0.16
0.30
0.25
0.020
0.004
0.004
0.007
0.007
0.024
0.008
0.006
0.012
0.010
–W–
C
K1
L
6.40 BSC
0.252 BSC
0.10 (0.004)
M
0
8
0
8
SEATING
PLANE
–T–
H
G
DETAIL E
D
MOTOROLA
4
MC74VHC86
OUTLINE DIMENSIONS
M SUFFIX
PLASTIC SOIC EIAJ PACKAGE
CASE 965–01
ISSUE O
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH OR PROTRUSIONS AND ARE MEASURED
AT THE PARTING LINE. MOLD FLASH OR
PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006)
PER SIDE.
L
E
14
8
Q
1
H
E
4. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
E
M
5. THE LEAD WIDTH DIMENSION (b) DOES NOT
INCLUDE DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08 (0.003)
TOTAL IN EXCESS OF THE LEAD WIDTH
DIMENSION AT MAXIMUM MATERIAL CONDITION.
DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OR THE FOOT. MINIMUM SPACE
BETWEEN PROTRUSIONS AND ADJACENT LEAD
TO BE 0.46 ( 0.018).
L
7
1
DETAIL P
Z
D
VIEW P
MILLIMETERS
INCHES
A
e
DIM
A
1
b
c
D
E
e
MIN
–––
MAX
2.05
0.20
0.50
0.27
10.50
5.45
MIN
MAX
0.081
0.008
0.020
0.011
0.413
0.215
c
–––
0.002
0.014
0.007
0.390
0.201
A
0.05
0.35
0.18
9.90
5.10
b
A
1
M
1.27 BSC
0.050 BSC
0.13 (0.005)
0.10 (0.004)
H
7.40
0.50
1.10
0
8.20
0.85
1.50
10
0.291
0.020
0.043
0
0.323
0.033
0.059
10
E
0.50
L
M
E
Q
Z
0.70
–––
0.90
1.42
0.028
–––
0.035
0.056
1
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the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and
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datasheetsand/orspecificationscananddovaryindifferentapplicationsandactualperformancemayvaryovertime. Alloperatingparameters,including“Typicals”
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