MCK12140D [ONSEMI]
Phase-Frequency Detector; 相位频率检测
| 型号： | MCK12140D |
| 厂家： | 
ONSEMI |
| 描述： | Phase-Frequency Detector |
| 文件： | 总4页 (文件大小：53K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MCH12140, MCK12140
Phase-Frequency Detector
The MCH/K12140 is a phase frequency−detector intended for
phase−locked loop applications which require a minimum amount of
phase and frequency difference at lock. When used in conjunction
with high performance VCO such as the MC100EL1648, a high
bandwidth PLL can be realized. The device is functionally compatible
with the MC12040 phase−frequency detector with the maximum
frequency extending to 800 MHz.
When the Reference (R) and VCO (V) inputs are unequal in
frequency and/or phase, the differential UP (U) and DOWN (D)
outputs will provide pulse streams which when subtracted and
integrated provide an error voltage for control of a VCO. See
AND8040 for further information. The device is packaged in a small
outline, surface mount 8−lead SOIC package. There are two versions
of the device to provide I/O compatibility to the two existing ECL
standards. The MCH12140 is compatible with MECL 10H logic levels
while the MCK12140 is compatible to 100 K ECL logic levels. This
device can also be used in +5.0 V systems. See AND8020 for
termination information
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MARKING
DIAGRAM
8
SOIC−8
D SUFFIX
CASE 751
x140
ALYW
8
1
1
x
= H or K
A
L
Y
= Assembly Location
= Wafer Lot
= Year
Features
W = Work Week
• 800 MHz Typical Bandwidth
• Small Outline 8-Lead SOIC Package
• 75 kW Internal Input Pulldown Resistors
• >1000 V ESD Protection
PIN CONNECTIONS
1
2
3
4
8
7
6
5
V
U
U
D
CC
• Pb−Free Package is Available
R
V
V
For proper operation, the input edge rate of the R and V inputs
should be less than 5.0 ns.
D
EE
(Top View)
ORDERING INFORMATION
†
Device
Package
SOIC−8
SOIC−8
Shipping
MCH12140D
98 Units/Rail
MCH12140DR2
MCH12140DR2G
2500 Tape & Reel
2500 Tape & Reel
SOIC−8
(Pb−Free)
U (fR > fV)
MCK12140D
SOIC−8
SOIC−8
98 Units/Rail
R
U (fR > fV)
R
S
Q
Q
MCK12140DR2
2500 Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
S
R
D (fV > fR)
D (fV > fR)
V
Figure 1. Logic Diagram
Semiconductor Components Industries, LLC, 2004
1
Publication Order Number:
April, 2004 − Rev. 7
MCH12140/D
MCH12140, MCK12140
TRUTH TABLE*
Input
Output
Input
Output
R
V
U
D
U
D
R
V
U
D
U
D
0
0
1
0
0
1
1
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
1
1
1
1
1
0
1
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
1
0
1
1
1
1
1
0
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
0
1
1
1
1
0
0
0
1
1
0
1
1
1
0
0
1
*This is not strictly a functional table; i.e., it does not cover all possible modes of operation. However, it gives a sufficient number of tests to ensure
that the device will function properly.
H−SERIES DC CHARACTERISTICS (V = V (min) − V (max); V = GND (Note 1), unless otherwise noted.)
EE
EE
EE
CC
−40°C
0°C
25°C
70°C
Min
Max
Min
−1020
−1950
−1170
−1950
0.5
Max
−840
−1630
−840
−1480
−
Min
Max
−810
−1630
−810
−1480
−
Min
Max
−720
−1595
−720
−1445
−
Characteristic
Output HIGH Voltage
Output LOW Voltage
Input HIGH Voltage
Input LOW Voltage
Input LOW Current
Symbol
Unit
mV
mV
mV
mV
mA
V
OH
−1080
−1950
−1230
−1950
0.5
−890
−980
−910
V
OL
−1650
−890
−1500
−
−1950
−1130
−1950
0.5
−1950
−1060
−1950
0.3
V
IH
V
IL
I
IL
K−SERIES DC CHARACTERISTICS (V = V (min) − V (max); V = GND (Note 2), unless otherwise noted.)
EE
EE
EE
CC
−40°C
0°C to 70°C
Min
−1085
−1830
−1095
−
Typ
Max
Min
−1025
−1810
−1035
−
Typ
Max
−880
−1620
−
Characteristic
Output HIGH Voltage
Output LOW Voltage
Output HIGH Voltage
Output LOW Voltage
Input HIGH Voltage
Input LOW Voltage
Input LOW Current
Symbol
Condition
Unit
mV
mV
mV
mV
mV
mV
mA
V
OH
−1005
−880
−1555
−
−955
V
= V (max)
IN IH
V
OL
−1695
−1705
or V (min)
IL
V
OHA
−
−
−
−
−
−
−
−
−
−
V
= V (min)
IN IH
V
OLA
−1555
−880
−1475
−
−1610
−880
−1475
−
or V (max)
IL
V
IH
−1165
−1810
0.5
−1165
−1810
0.5
−
−
V
IL
I
IL
V
= V (max)
IN IL
MAXIMUM RATINGS (Note 3)
Rating
Symbol
Value
Unit
VDC
VDC
mA
Power Supply (V = 0 V)
V
EE
−8.0 to 0
0 to −6.0
CC
Input Voltage (V = 0 V)
V
I
CC
Output Current
Continuous
Surge
I
50
100
out
Operating Temperature Range
Operating Range (Notes 3 and 4)
T
−40 to +70
°C
A
V
EE
−5.7 to −4.2
V
NOTE: ESD data available upon request.
1. 10H circuits are designed to meet the DC specifications shown in the table after thermal equilibrium has been established. The circuit is in
a test socket or mounted on a printed circuit board and transverse airflow greater than 500 lfpm is maintained. Outputs are terminated through
a 50 W resistor to −2.0 V except where otherwise specified on the individual data sheets.
2. This table replaces the three tables traditionally seen in ECL 100 K data books. The same DC parameter values at V = −4.5 V now apply
EE
across the full V range of −4.2 V to −5.5 V. Outputs are terminated through a 50 W resistor to −2.0 V except where otherwise specified
EE
on the individual data sheets.
3. Absolute maximum rating, beyond which, device life may be impaired, unless otherwise specified on an individual data sheet.
4. Parametric values specified at: H−Series: −4.20 V to −5.50 V
K−Series: −4.94 V to −5.50 V
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2
MCH12140, MCK12140
DC CHARACTERISTICS (V = V (min) − V (max); V = GND, unless otherwise noted.)
EE
EE
EE
CC
−40°C
0°C
25°C
Typ Max
70°C
Typ Max
Min
Typ Max
Min
Typ Max
Min
Min
Characteristic
Symbol
Unit
Power Supply Current
H
K
I
EE
−
−
45
45
−
−
38
38
45
45
52
52
38
38
45
45
52
52
38
42
45
50
52
58
mA
Power Supply Voltage
Input HIGH Current
H
K
V
−4.75 −5.2 −5.5 −4.75 −5.2 −5.5 −4.75 −5.2 −5.5 −4.75 −5.2 −5.5
−4.20 −4.5 −5.5 −4.20 −4.5 −5.5 −4.20 −4.5 −5.5 −4.20 −4.5 −5.5
V
EE
IH
I
−
−
150
−
−
150
−
−
150
−
−
150
mA
AC CHARACTERISTICS (V = V (min) − V (max); V = GND, unless otherwise noted.)
EE
EE
EE
CC
−40°C
0°C
Typ
800
25°C
Typ
800
70°C
Typ
800
Min
Typ Max Min
Max
Min
Max
Min
Max
Characteristic
Symbol
Unit
Maximum Toggle Frequen-
cy
F
MAX
−
800
−
650
−
650
−
650
−
−
Propagation Delay R to D
t
t
−
−
−
−
440
330
330
440
−
−
−
−
320
210
210
320
440
330
330
440
580
470
470
580
320
210
210
320
440
330
330
440
580
470
470
580
360
240
240
360
480
360
360
480
620
500
500
620
ps
ps
PLH
PHL
to Output
R to U
V to D
V to U
Output Rise/Fall Times
Q (20 to 80%)
t
r
t
f
−
225
−
100
225
350
100
225
350
100
225
350
APPLICATIONS INFORMATION
R lags V in phase
The 12140 is a high speed digital circuit used as a phase
comparator in an analog phase-locked loop. The device
determines the “lead” or “lag” phase relationship and time
difference between the leading edges of a VCO (V) signal
and a Reference (R) input. Since these edges occur only once
per cycle, the detector has a range of ±2p radians.
The operation of the 12140 can best be described using the
plots of Figure 2. Figure 2 plots the average value of U, D
and the difference between U and D versus the phase
difference between the V and R inputs.
When the R and V inputs are equal in frequency and the
phase of R lags that of V the U output will stay HIGH while
the D output will pulse from HIGH to LOW. The magnitude
of the pulse will be proportional to the phase difference
between the V and R inputs reaching a minimum 50% duty
cycle under a 180° out of phase condition. The signal on D
indicates to the VCO to decrease in frequency to bring the
loop into lock.
V frequency > R frequency
There are four potential relationships between V and R: R
lags or leads V and the frequency of R is less than or greater
than the frequency of V. Under these four conditions the
12140 will function as follows:
When the frequency of V is greater than that of R the
12140 behaves in a similar fashion as above. Again the
signal on D indicates that the VCO frequency must be
decreased to bring the loop into lock.
R leads V in phase
U
Fv > Fr
R lags V
R leads V
Fv < Fr
When the R and V inputs are equal in frequency and the
phase of R leads that of V the D output will stay HIGH while
the U output pulses from HIGH to LOW. The magnitude of
the pulse will be proportional to the phase difference
between the V and R inputs reaching a minimum 50% duty
cycle under a 180° out of phase condition. The signal on U
indicates to the VCO to increase in frequency to bring the
loop into lock.
V
OH
V
− V
2
OH
OL
−2p
−p
p
2p
D
V
OH
V
− V
2
OH
OL
−2p
−p
p
2p
V frequency < R frequency
U−D
When the frequency of V is less than that of R the 12140
behaves in a similar fashion as above. Again the signal on U
indicates that the VCO frequency must be decreased to bring
the loop into lock.
V
− V
2
OH
OL
−2p
−p
p
2p
From Figure 2 when V and R are at the same frequency and
in phase the value of U − D is zero thus providing a zero error
voltage to the VCO. This situation indicates the loop is in lock
and the 12140 action will maintain the loop in its locked state.
V
− V
2
OL
OH
Figure 2. Average Output Voltage vs. Phase Difference
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3
MCH12140, MCK12140
PACKAGE DIMENSIONS
SOIC−8
D SUFFIX
CASE 751−07
ISSUE AB
NOTES:
−X−
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. 751−01 THRU 751−06 ARE OBSOLETE. NEW
STANDARD IS 751−07.
A
8
5
4
S
M
M
B
0.25 (0.010)
Y
1
K
−Y−
G
MILLIMETERS
DIM MIN MAX
INCHES
MIN
MAX
0.197
0.157
0.069
0.020
C
N X 45
_
A
B
C
D
G
H
J
K
M
N
S
4.80
3.80
1.35
0.33
5.00 0.189
4.00 0.150
1.75 0.053
0.51 0.013
SEATING
PLANE
−Z−
1.27 BSC
0.050 BSC
0.10 (0.004)
0.10
0.19
0.40
0
0.25 0.004
0.25 0.007
1.27 0.016
0.010
0.010
0.050
8
0.020
0.244
M
J
H
D
8
0
_
_
_
_
0.25
5.80
0.50 0.010
6.20 0.228
M
S
S
X
0.25 (0.010)
Z
Y
SOLDERING FOOTPRINT*
1.52
0.060
7.0
0.275
4.0
0.155
0.6
0.024
1.270
0.050
mm
inches
ǒ
Ǔ
SCALE 6:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
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For additional information, please contact your
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MCH12140/D
相关型号：
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