MJ15001_05 [ONSEMI]
Complementary Silicon Power Transistors; 互补硅功率晶体管
| 型号： | MJ15001_05 |
| 厂家： | 
ONSEMI |
| 描述： | Complementary Silicon Power Transistors |
| 文件： | 总4页 (文件大小：72K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MJ15001 (NPN),
MJ15002 (PNP)
Complementary Silicon
Power Transistors
The MJ15001 and MJ15002 are EpiBaset power transistors
designed for high power audio, disk head positioners and other linear
applications.
http://onsemi.com
20 AMPERE
Features
POWER TRANSISTORS
COMPLEMENTARY SILICON
140 VOLTS, 250 WATTS
• High Safe Operating Area (100% Tested) − 5.0 A @ 40 V
0.5 A @ 100 V
• For Low Distortion Complementary Designs
• High DC Current Gain − h = 25 (Min) @ I = 4 Adc
FE
C
• Pb−Free Packages are Available*
MAXIMUM RATINGS
Rating
TO−204AA (TO−3)
CASE 1−07
Symbol
Value
140
Unit
Vdc
Vdc
STYLE 1
Collector−Emitter Voltage
Collector−Base Voltage
V
CEO
V
CBO
V
EBO
140
Emitter−Base Voltage
5
15
5
Vdc
Adc
Adc
Adc
Collector Current − Continuous
Base Current − Continuous
Emitter Current − Continuous
I
MARKING DIAGRAM
C
I
I
B
E
20
Total Power Dissipation @ T = 25°C
P
200
1.14
W
W/°C
C
D
Derate above 25°C
MJ1500xG
AYYWW
MEX
Operating and Storage Junction
Temperature Range
T , T
–65 to +200
°C
J
stg
THERMAL CHARACTERISTICS
Characteristic
Symbol
Max
Unit
Thermal Resistance, Junction−to−Case
R
0.875
°C/W
q
JC
MJ1500x = Device Code
x = 1 or 2
Maximum Lead Temperature for Soldering
Purposes 1/16″ from Case for v 10 secs
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
T
265
°C
L
G
A
YY
WW
MEX
= Pb−Free Package
= Location Code
= Year
= Work Week
= Country of Orgin
ORDERING INFORMATION
Device
Package
Shipping
MJ15001
TO−204AA
100 Units/Tray
100 Units/Tray
MJ15001G
TO−204AA
(Pb−Free)
MJ15002
TO−204AA
100 Units/Tray
100 Units/Tray
MJ15002G
TO−204AA
(Pb−Free)
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
©
Semiconductor Components Industries, LLC, 2005
1
Publication Order Number:
December, 2005 − Rev. 4
MJ15001/D
MJ15001 (NPN), MJ15002 (PNP)
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
C
Characteristic
Symbol
Min
Max
Unit
OFF CHARACTERISTICS
Collector−Emitter Sustaining Voltage (Note 1)
V
140
−
Vdc
CEO(sus)
(I , = 200 mAdc, I = 0)
C
B
Collector Cutoff Current
I
CEX
(V = 140 Vdc, V
= 1.5 Vdc)
= 1.5 Vdc, T = 150°C)
−
−
100
2.0
mAdc
mAdc
CE
BE(off)
BE(off)
(V = 140 Vdc, V
CE
C
Collector Cutoff Current
(V = 140 Vdc, I = 0)
I
I
−
250
mAdc
mAdc
CEO
CE
B
Emitter Cutoff Current
(V = 5 Vdc, I = 0)
−
100
EBO
EB
C
SECOND BREAKDOWN
Second Breakdown Collector Current with Base Forward Biased
I
Adc
S/b
(V = 40 Vdc, t = 1 s (non−repetitive))
5.0
0.5
−
−
CE
(V = 100 Vdc, t = 1 s (non−repetitive))
CE
ON CHARACTERISTICS
DC Current Gain
h
25
−
150
1.0
2.0
−
FE
(I = 4 Adc, V = 2 Vdc)
C
CE
Collector−Emitter Saturation Voltage
(I = 4 Adc, I = 0.4 Adc)
V
Vdc
Vdc
CE(sat)
C
B
Base−Emitter On Voltage
(I = 4 Adc, V = 2 Vdc)
V
−
BE(on)
C
CE
DYNAMIC CHARACTERISTICS
Current−Gain — Bandwidth Product
f
2.0
−
−
MHz
pF
T
(I = 0.5 Adc, V = 10 Vdc, f = 0.5 MHz)
C
CE
test
Output Capacitance
(V = 10 Vdc, I = 0, f = 1 MHz)
test
C
1000
ob
CB
E
1. Pulse Test: Pulse Width = 300 ms, Duty Cycle v 2%.
200
There are two limitations on the power handling ability of
a transistor: average junction temperature and second
T
= 25°C
C
10
7
breakdown. Safe operating area curves indicate I − V
C
CE
limits of the transistor that must be observed for reliable
operation; i.e., the transistor must not be subjected to greater
dissipation than the curves indicate.
5
3
2
The data of Figure 1 is based on T
= 200°C; T is
J (pk)
C
variable depending on conditions. At high case
temperatures, thermal limitations will reduce the power that
can be handled to values less than the limitations imposed by
second breakdown.
T = 200°C
J
BONDING WIRE LIMITED
1
0.7
0.5
THERMAL LIMITATION (SINGLE PULSE)
SECOND BREAKDOWN LIMITED
CURVES APPLY BELOW RATED V
0.3
0.2
CEO
2
3
5
7
10
20 30
50 70 100
200
V
, COLLECTOR−EMITTER VOLTAGE (VOLTS)
CE
Figure 1. Active−Region Safe Operating Area
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2
MJ15001 (NPN), MJ15002 (PNP)
TYPICAL CHARACTERISTICS
10
1000
700
9
T = 25°C
J
C
C
ib
ib
500
MJ15002 (PNP)
8
7
6
300
200
T = 25°C
J
C
C
ob
ob
V
= 10 V
CE
100
70
5
f
= 0.5 MHz
test
4
3
2
1
0
50
MJ15001
(NPN)
30
20
MJ15001 (NPN)
MJ15002 (PNP)
10
1.5 2
3
5
7
10
20 30
50 70 100 150
0.1
0.2 0.3
0.5 0.7
1
2
3
5
7
10
V , REVERSE VOLTAGE (VOLTS)
R
I , COLLECTOR CURRENT (AMP)
C
Figure 2. Capacitances
Figure 3. Current−Gain — Bandwidth Product
MJ15001
MJ15002
200
100
200
100
V
= 2 Vdc
V
= 2 Vdc
CE
CE
T = 100°C
J
T = 100°C
J
25°C
70
50
70
50
25°C
30
20
30
20
10
10
7
5
7
5
3
2
3
2
0.2 0.3
0.5 0.7
1
2
3
5
7
10
20
0.2 0.3
0.5 0.7
1
2
3
5
7
10
20
I , COLLECTOR CURRENT (AMP)
C
I , COLLECTOR CURRENT (AMP)
C
Figure 4. DC Current Gain
MJ15001
MJ15002
2.0
1.6
1.2
0.8
0.4
0
2.0
1.6
1.2
0.8
V
@ V = 2 Vdc
CE
V
@ V = 2 Vdc
BE CE
BE
T = 25°C
J
T = 25°C
J
T = 100°C
T = 100°C
J
J
100°C
0.4
100°C
V
@ I /I = 10
C B
CE(sat)
V
@ I /I = 10
C B
CE(sat)
25°C
25°C
0
0.2 0.3
0.5 0.7
1
2
3
5
7
10
20
0.2 0.3
0.5 0.7
1
2
3
5
7
10
20
I , COLLECTOR CURRENT (AMP)
C
I , COLLECTOR CURRENT (AMP)
C
Figure 5. “On” Voltages
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3
MJ15001 (NPN), MJ15002 (PNP)
PACKAGE DIMENSIONS
TO−204 (TO−3)
CASE 1−07
ISSUE Z
NOTES:
A
N
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. ALL RULES AND NOTES ASSOCIATED WITH
REFERENCED TO−204AA OUTLINE SHALL APPLY.
C
SEATING
PLANE
−T−
E
INCHES
DIM MIN MAX
MILLIMETERS
MIN MAX
39.37 REF
−−− 26.67
K
D 2 PL
A
B
C
D
E
G
H
K
L
1.550 REF
−−− 1.050
M
M
M
Y
0.13 (0.005)
T
Q
0.250
0.038
0.055
0.335
0.043
0.070
6.35
0.97
1.40
8.51
1.09
1.77
U
−Y−
L
0.430 BSC
0.215 BSC
0.440 0.480
10.92 BSC
5.46 BSC
11.18 12.19
V
H
2
1
0.665 BSC
−−− 0.830
16.89 BSC
−−− 21.08
B
G
N
Q
U
V
0.151
1.187 BSC
0.131 0.188
0.165
3.84
4.19
30.15 BSC
3.33
4.77
−Q−
0.13 (0.005)
STYLE 1:
PIN 1. BASE
2. EMITTER
CASE: COLLECTOR
M
M
Y
T
EpiBase is a registered trademark of Semiconductor Components Industries, LLC (SCILLC).
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
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“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
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MJ15001D
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