MLP1N06CL [ONSEMI]

SMARTDISCRETES TM MOSFET 1 Amp, 62 Volts, Logic Level N-Channel TO-220; SMARTDISCRETES TM MOSFET 1安培, 62伏特,逻辑电平N沟道TO- 220
MLP1N06CL
型号: MLP1N06CL
厂家: ONSEMI    ONSEMI
描述:

SMARTDISCRETES TM MOSFET 1 Amp, 62 Volts, Logic Level N-Channel TO-220
SMARTDISCRETES TM MOSFET 1安培, 62伏特,逻辑电平N沟道TO- 220

文件: 总8页 (文件大小:66K)
中文:  中文翻译
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MLP1N06CL  
Preferred Device  
SMARTDISCRETESt MOSFET  
1 Amp, 62 Volts, Logic Level  
N–Channel TO–220  
These SMARTDISCRETES devices feature current limiting for  
short circuit protection, an integral gate–to–source clamp for ESD  
protection and gate–to–drain clamp for over–voltage protection. No  
additional gate series resistance is required when interfacing to the  
output of a MCU, but a 40 kgate pulldown resistor is recommended  
to avoid a floating gate condition.  
http://onsemi.com  
1 AMPERE  
62 VOLTS (Clamped)  
R
= 750 m  
The internal gate–to–source and gate–to–drain clamps allow the  
devices to be applied without use of external transient suppression  
components. The gate–to–source clamp protects the MOSFET input  
from electrostatic gate voltage stresses up to 2.0 kV. The gate–to–drain  
clamp protects the MOSFET drain from drain avalanche stresses that  
occur with inductive loads. This unique design provides voltage  
clamping that is essentially independent of operating temperature.  
DS(on)  
N–Channel  
D
Temperature Compensated Gate–to–Drain Clamp Limits Voltage  
Stress Applied to the Device and Protects the Load From  
Overvoltage  
R1  
G
Integrated ESD Diode Protection  
Controlled Switching Minimizes RFI  
R2  
Low Threshold Voltage Enables Interfacing Power Loads to  
Microprocessors  
S
MARKING DIAGRAM  
& PIN ASSIGNMENT  
MAXIMUM RATINGS (T = 25°C unless otherwise noted)  
C
Rating  
Drain–to–Source Voltage  
Drain–to–Gate Voltage  
Symbol  
Value  
Unit  
Vdc  
Vdc  
4
4
Drain  
V
DSS  
Clamped  
Clamped  
V
DGR  
(R  
= 1.0 M)  
GS  
TO–220AB  
CASE 221A  
STYLE 5  
Gate–to–Source Voltage – Continuous  
V
±10  
Vdc  
Adc  
GS  
L1N06CL  
LLYWW  
Drain Current – Continuous  
Drain Current – Single Pulse  
I
Self–limited  
1.8  
D
I
DM  
1
Total Power Dissipation  
P
40  
Watts  
kV  
2
D
1
Gate  
3
3
Source  
Electrostatic Discharge Voltage  
(Human Body Model)  
ESD  
2.0  
2
Operating and Storage Junction  
Temperature Range  
T , T  
J stg  
–50 to 150  
°C  
Drain  
L1N06CL  
LL  
Y
WW  
= Device Code  
= Location Code  
= Year  
THERMAL CHARACTERISTICS  
Thermal Resistance, Junction to Case  
Thermal Resistance, Junction to  
Ambient  
R
R
3.12  
62.5  
°C/W  
°C  
θJC  
θJA  
= Work Week  
ORDERING INFORMATION  
Maximum Lead Temperature for  
Soldering Purposes, 1/8from case  
T
L
260  
Device  
MLP1N06CL  
Package  
Shipping  
50 Units/Rail  
TO–220AB  
Preferred devices are recommended choices for future use  
and best overall value.  
Semiconductor Components Industries, LLC, 2000  
1
Publication Order Number:  
November, 2000 – Rev. 2  
MLP1N06CL/D  
MLP1N06CL  
UNCLAMPED DRAIN–TO–SOURCE AVALANCHE CHARACTERISTICS  
Rating  
Symbol  
Value  
Unit  
Single Pulse Drain–to–Source Avalanche Energy  
E
AS  
80  
mJ  
(Starting T = 25°C, I = 2.0 A, L = 40 mH) (Figure 6)  
J
D
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)  
J
Characteristic  
OFF CHARACTERISTICS  
Drain–to–Source Sustaining Voltage (Internally Clamped)  
Symbol  
Min  
Typ  
Max  
Unit  
V
Vdc  
µAdc  
µAdc  
(BR)DSS  
(I = 20 mA, V  
(I = 20 mA, V  
D
= 0)  
59  
59  
62  
62  
65  
65  
D
GS  
GS  
= 0, T = 150°C)  
J
Zero Gate Voltage Drain Current  
I
DSS  
(V  
DS  
(V  
DS  
= 45 V, V  
= 45 V, V  
= 0)  
0.6  
6.0  
5.0  
20  
GS  
GS  
= 0, T = 150°C)  
J
Gate–Body Leakage Current  
I
GSS  
(V = 5.0 V, V  
(V = 5.0 V, V  
G
= 0)  
0.5  
1.0  
5.0  
20  
G
DS  
DS  
= 0, T = 150°C)  
J
ON CHARACTERISTICS (Note 1.)  
Gate Threshold Voltage  
V
Vdc  
GS(th)  
(I = 250 µA, V  
= V  
)
1.0  
0.6  
1.5  
2.0  
1.6  
D
D
DS  
DS  
GS  
(I = 250 µA, V  
= V , T = 150°C)  
GS  
J
Static Drain–to–Source On–Resistance  
R
Ohms  
DS(on)  
(I = 1.0 A, V  
= 4.0 V)  
= 5.0 V)  
= 4.0 V, T = 150°C)  
J
= 5.0 V, T = 150°C)  
0.63  
0.59  
1.1  
0.75  
0.75  
1.9  
D
GS  
GS  
GS  
GS  
(I = 1.0 A, V  
D
(I = 1.0 A, V  
D
(I = 1.0 A, V  
1.0  
1.8  
D
J
Forward Transconductance (I = 1.0 A, V  
DS  
= 10 V)  
g
1.0  
1.4  
1.1  
mhos  
Vdc  
A
D
FS  
Static Source–to–Drain Diode Voltage (I = 1.0 A, V  
S
= 0)  
V
SD  
1.5  
GS  
Static Drain Current Limit  
I
D(lim)  
(V  
GS  
(V  
GS  
= 5.0 V, V  
= 5.0 V, V  
= 10 V)  
= 10 V, T = 150°C)  
2.0  
1.1  
2.3  
1.3  
2.75  
1.8  
DS  
DS  
J
RESISTIVE SWITCHING CHARACTERISTICS (Note 1.)  
Turn–On Delay Time  
Rise Time  
t
1.2  
4.0  
4.0  
3.0  
2.0  
6.0  
6.0  
5.0  
µs  
d(on)  
t
r
(V  
= 25 V, I = 1.0 A,  
D
DD  
= 5.0 V, R = 50 Ohms)  
V
GS  
G
Turn–Off Delay Time  
Fall Time  
t
d(off)  
t
f
1. Indicates Pulse Test: Pulse Width 300 µs, Duty Cycle 2.0%.  
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2
MLP1N06CL  
4
3
2
1
T
= 25°C  
J
V
DS  
7.5 V  
4
3
-50°C  
10 V  
6 V  
8 V  
4 V  
25°C  
2
T
= 150°C  
V
= 3 V  
J
GS  
1
0
0
0
2
4
6
8
0
2
4
6
8
V , DRAIN-TO-SOURCE VOLTAGE (VOLTS)  
DS  
V , GATE-TO-SOURCE VOLTAGE (VOLTS)  
GS  
Figure 1. Output Characteristics  
Figure 2. Transfer Function  
THE SMARTDISCRETES CONCEPT  
SHORT CIRCUIT PROTECTION AND THE EFFECT OF  
TEMPERATURE  
From a standard power MOSFET process, several active  
and passive elements can be obtained that provide on–chip  
protection to the basic power device. Such elements require  
only a small increase in silicon area and/or the addition of one  
masking layer to the process. The resulting device exhibits  
significant improvements in ruggedness and reliability as  
well as system cost reduction. The SMARTDISCRETES  
device functions can now provide an economical alternative  
to smart power ICs for power applications requiring low  
on–resistance, high voltage and high current.  
These devices are designed for applications that require a  
rugged power switching device with short circuit protection  
that can be directly interfaced to a microcontroller unit  
(MCU). Ideal applications include automotive fuel injector  
driver, incandescent lamp driver or other applications where  
a high in–rush current or a shorted load condition could occur.  
The on–chip circuitry of the MLP1N06CL offers an  
integrated means of protecting the MOSFET component  
from high in–rush current or a shorted load. As shown in the  
schematic diagram, the current limiting feature is provided  
by an NPN transistor and integral resistors R1 and R2. R2  
senses the current through the MOSFET and forward biases  
the NPN transistor’s base as the current increases. As the  
NPN turns on, it begins to pull gate drive current through R1,  
dropping the gate drive voltage across it, and thus lowering  
the voltage across the gate–to–source of the power  
MOSFET and limiting the current. The current limit is  
temperature dependent as shown in Figure 3, and decreases  
from about 2.3 Amps at 25°C to about 1.3 Amps at 150°C.  
Since the MLP1N06CL continues to conduct current and  
dissipate power during a shorted load condition, it is  
important to provide sufficient heatsinking to limit the  
device junction temperature to a maximum of 150°C.  
The metal current sense resistor R2 adds about 0.4 ohms  
to the power MOSFET’s on–resistance, but the effect of  
temperature on the combination is less than on a standard  
MOSFET due to the lower temperature coefficient of R2.  
The on–resistance variation with temperature for gate  
voltages of 4 and 5 Volts is shown in Figure 5.  
OPERATION IN THE CURRENT LIMIT MODE  
The amount of time that an unprotected device can  
withstand the current stress resulting from a shorted load  
before its maximum junction temperature is exceeded is  
dependent upon a number of factors that include the amount  
of heatsinking that is provided, the size or rating of the  
device, its initial junction temperature, and the supply  
voltage. Without some form of current limiting, a shorted  
load can raise a device’s junction temperature beyond the  
maximum rated operating temperature in only a few  
milliseconds.  
Even with no heatsink, the MLP1N06CL can withstand a  
shorted load powered by an automotive battery (10 to 14  
Volts) for almost a second if its initial operating temperature  
is under 100°C. For longer periods of operation in the  
current–limited mode, device heatsinking can extend  
operation from several seconds to indefinitely depending on  
the amount of heatsinking provided.  
Back–to–back polysilicon diodes between gate and  
source provide ESD protection to greater than 2 kV, HBM.  
This on–chip protection feature eliminates the need for an  
external Zener diode for systems with potentially heavy line  
transients.  
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3
MLP1N06CL  
4
3
2
1
4
I
D
= 1 A  
V
V
Ă=Ă5ĂV  
GS  
DS  
Ă=Ă7.5ĂV  
3
2
150°C  
T Ă=Ă-50°C  
J
25°C  
1
0
0
2
4
6
8
10  
0
-50  
0
50  
100  
150  
V
, GATE-TO-SOURCE VOLTAGE (VOLTS)  
GS  
T , JUNCTION TEMPERATURE (°C)  
J
Figure 4. R  
Variation With  
DS(on)  
Figure 3. I  
Variation With Temperature  
D(lim)  
Gate–To–Source Voltage  
1.25  
1
I
D
= 1 A  
V
GS  
= 4 V  
0.75  
V Ă=Ă5 V  
GS  
0.5  
0.25  
-50  
0
50  
100  
150  
T , JUNCTION TEMPERATURE (°C)  
J
Figure 5. On–Resistance Variation With  
Temperature  
64  
63  
62  
100  
80  
60  
40  
61  
60  
20  
0
-50  
0
50  
100  
150  
25  
50  
75  
100  
125  
150  
T , JUNCTION TEMPERATURE (°C)  
J
T , JUNCTION TEMPERATURE (°C)  
J
Figure 6. Single Pulse Avalanche Energy  
versus Junction Temperature  
Figure 7. Drain–Source Sustaining  
Voltage Variation With Temperature  
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4
MLP1N06CL  
FORWARD BIASED SAFE OPERATING AREA  
(1.8 A at 150°C) and not the R  
. The maximum voltage  
can be calculated by the following equation:  
DS(on)  
The FBSOA curves define the maximum drain–to–source  
voltage and drain current that a device can safely handle  
when it is forward biased, or when it is on, or being turned  
on. Because these curves include the limitations of  
simultaneous high voltage and high current, up to the rating  
of the device, they are especially useful to designers of linear  
systems. The curves are based on a case temperature of 25°C  
and a maximum junction temperature of 150°C. Limitations  
for repetitive pulses at various case temperatures can be  
determined by using the thermal response curves. ON  
Semiconductor Application Note, AN569, “Transient  
Thermal Resistance – General Data and Its Use” provides  
detailed instructions.  
(150 – T )  
A
+ R  
V
=
supply  
I
(R  
)
θCA  
D(lim) θJC  
where the value of R  
is being used in the application.  
is determined by the heatsink that  
θCA  
DUTY CYCLE OPERATION  
When operating in the duty cycle mode, the maximum  
drain voltage can be increased. The maximum operating  
temperature is related to the duty cycle (DC) by the  
following equation:  
T
= (V  
DS  
x I x DC x R ) + T  
D θCA A  
C
MAXIMUM DC VOLTAGE CONSIDERATIONS  
The maximum value of V  
applied when operating in a  
duty cycle mode can be approximated by:  
DS  
The maximum drain–to–source voltage that can be  
continuously applied across the MLP1N06CL when it is in  
current limit is a function of the power that must be  
dissipated. This power is determined by the maximum  
current limit at maximum rated operating temperature  
150 – T  
C
V
=
DS  
I
x DC x R  
D(lim)  
θJC  
10  
6
I
Ă-ĂMAX  
D(lim)  
1Ăms  
3
1.5  
2
ms  
I
Ă-ĂMIN  
D(lim)  
5Ăms  
dc  
1
0.6  
DEVICE/POWER LIMITED  
LIMITED  
R
DS(on)  
0.3  
0.2  
V
Ă=Ă5ĂV  
GS  
SINGLE PULSE  
T
= 25°C  
C
0.1  
1
2
3
6
10  
20 30  
60  
100  
V , DRAIN-TO-SOURCE VOLTAGE (VOLTS)  
DS  
Figure 8. Maximum Rated Forward Bias  
Safe Operating Area (MLP1N06CL)  
1.0  
0.7  
D = 0.5  
R
R
(t) = r(t) R  
θJC  
θJC  
(t) = 3.12°C/W Max  
0.5  
θJC  
D Curves Apply for Power  
0.3  
0.2  
0.2  
0.1  
Pulse Train Shown  
Read Time at t  
1
T
- T = P  
C
R
(t)  
J(pk)  
(pk) θJC  
0.1  
0.07  
0.05  
0.05  
0.02  
P
(pk)  
0.03  
0.02  
0.01  
t
1
t
2
SINGLE PULSE  
DUTY CYCLE, D =t /t  
1 2  
0.01  
0.01  
0.02 0.03 0.05  
0.1  
0.2 0.3 0.5  
1.0  
2.0 3.0 5.0  
t, TIME (ms)  
10  
20 30  
50  
100  
200 300 500 1000  
Figure 9. Thermal Response (MLP1N06CL)  
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5
MLP1N06CL  
t
on  
t
off  
V
DD  
t
t
R
L
V
out  
t
f
t
r
d(off)  
d(on)  
90%  
90%  
V
in  
DUT  
PULSE GENERATOR  
OUTPUT, V  
INVERTED  
out  
z = 50 Ω  
10%  
R
gen  
50Ω  
90%  
50%  
50 Ω  
50%  
10%  
PULSE WIDTH  
INPUT, V  
in  
Figure 10. Switching Test Circuit  
ACTIVE CLAMPING  
Figure 11. Switching Waveforms  
MLP1N06CL, the integrated gate–to–source voltage  
elements provide greater than 2.0 kV electrostatic voltage  
protection.  
SMARTDISCRETES technology can provide on–chip  
realization of the popular gate–to–source and gate–to–drain  
Zener diode clamp elements. Until recently, such features  
have been implemented only with discrete components  
which consume board space and add system cost. The  
SMARTDISCRETES technology approach economically  
melds these features and the power chip with only a slight  
increase in chip area.  
In practice, back–to–back diode elements are formed in a  
polysilicon region monolithicly integrated with, but  
electrically isolated from, the main device structure. Each  
back–to–back diode element provides a temperature  
compensated voltage element of about 7.2 volts. As the  
polysilicon region is formed on top of silicon dioxide, the  
diode elements are free from direct interaction with the  
conduction regions of the power device, thus eliminating  
parasitic electrical effects while maintaining excellent  
thermal coupling.  
The avalanche voltage of the gate–to–drain voltage clamp  
is set less than that of the power MOSFET device. As soon  
as the drain–to–source voltage exceeds this avalanche  
voltage, the resulting gate–to–drain Zener current builds a  
gate voltage across the gate–to–source impedance, turning  
on the power device which then conducts the current. Since  
virtually all of the current is carried by the power device, the  
gate–to–drain voltage clamp element may be small in size.  
This technique of establishing a temperature compensated  
drain–to–source sustaining voltage (Figure 7) effectively  
removes the possibility of drain–to–source avalanche in the  
power device.  
The gate–to–drain voltage clamp technique is particularly  
useful for snubbing loads where the inductive energy would  
otherwise avalanche the power device. An improvement in  
ruggedness of at least four times has been observed when  
inductive energy is dissipated in the gate–to–drain clamped  
conduction mode rather than in the more stressful  
gate–to–source avalanche mode.  
To achieve high gate–to–drain clamp voltages, several  
voltage elements are strung together; the MLP1N06CL uses  
8 such elements. Customarily, two voltage elements are used  
to provide a 14.4 volt gate–to–source voltage clamp. For the  
TYPICAL APPLICATIONS: INJECTOR DRIVER, SOLENOIDS, LAMPS, RELAY COILS  
V
BAT  
The MLP1N06CL has been designed to allow direct  
interface to the output of a microcontrol unit to control an  
isolated load. No additional series gate resistance is  
V
DD  
required, but  
a 40 kgate pulldown resistor is  
recommended to avoid a floating gate condition in the event  
of an MCU failure. The internal clamps allow the device to  
be used without any external transistent suppressing  
components.  
D
S
G
MCU  
MLP1N06CL  
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6
MLP1N06CL  
PACKAGE DIMENSIONS  
TO–220 THREE–LEAD  
TO–220AB  
CASE 221A–09  
ISSUE AA  
NOTES:  
1. DIMENSIONING AND TOLERANCING PER ANSI  
Y14.5M, 1982.  
SEATING  
PLANE  
–T–  
2. CONTROLLING DIMENSION: INCH.  
3. DIMENSION Z DEFINES A ZONE WHERE ALL  
BODY AND LEAD IRREGULARITIES ARE  
ALLOWED.  
C
S
B
F
T
4
1
INCHES  
DIM MIN MAX  
MILLIMETERS  
MIN  
14.48  
9.66  
4.07  
0.64  
3.61  
2.42  
2.80  
0.46  
12.70  
1.15  
4.83  
2.54  
2.04  
1.15  
5.97  
0.00  
1.15  
---  
MAX  
15.75  
10.28  
4.82  
0.88  
3.73  
2.66  
3.93  
0.64  
14.27  
1.52  
5.33  
3.04  
2.79  
1.39  
6.47  
1.27  
---  
A
K
Q
Z
A
B
C
D
F
0.570  
0.380  
0.160  
0.025  
0.142  
0.095  
0.110  
0.018  
0.500  
0.045  
0.190  
0.100  
0.080  
0.045  
0.235  
0.000  
0.045  
---  
0.620  
0.405  
0.190  
0.035  
0.147  
0.105  
0.155  
0.025  
0.562  
0.060  
0.210  
0.120  
0.110  
0.055  
0.255  
0.050  
---  
2
3
U
H
G
H
J
K
L
L
R
J
N
Q
R
S
T
V
G
D
U
V
Z
N
0.080  
2.04  
STYLE 5:  
PIN 1. GATE  
2. DRAIN  
3. SOURCE  
4. DRAIN  
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7
MLP1N06CL  
SMARTDISCRETES is a trademark of Semiconductor Components Industries, LLC (SCILLC).  
ON Semiconductor and  
are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes  
without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular  
purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability,  
including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or  
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be  
validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others.  
SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications  
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or  
death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold  
SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable  
attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim  
alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.  
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Phone: 81–3–5740–2700  
Email: r14525@onsemi.com  
English Phone: (+1) 303–308–7142 (Mon–Fri 12:00pm to 5:00pm GMT)  
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For additional information, please contact your local  
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*Available from Germany, France, Italy, UK, Ireland  
MLP1N06CL/D  

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