MM74HC540WM [ONSEMI]

反相八路 3 态缓冲器;
MM74HC540WM
型号: MM74HC540WM
厂家: ONSEMI    ONSEMI
描述:

反相八路 3 态缓冲器

PC 驱动 光电二极管 输出元件 逻辑集成电路
文件: 总10页 (文件大小:337K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
DATA SHEET  
www.onsemi.com  
Inverting Octal 3-STATE  
Buffer, Octal 3-STATE Buffer  
SOIC20 WB  
CASE 751D05  
MM74HC540, MM74HC541  
General Description  
SOIC20, 300 mils  
CASE 751BJ01  
The MM74HC540 and MM74HC541 3STATE buffers utilize  
advanced silicongate CMOS technology. They possess high drive  
current outputs which enable high speed operation even when driving  
large bus capacitances. These circuits achieve speeds comparable to  
low power Schottky devices, while retaining the advantage of CMOS  
circuitry, i.e., high noise immunity, and low power consumption. Both  
devices have a fanout of 15 LSTTL equivalent inputs.  
TSSOP20 WB  
CASE 948E  
The MM74HC540 is an inverting buffer and the MM74HC541 is  
a noninverting buffer. The 3STATE control gate operates as  
a twoinput NOR such that if either G1 or G2 are HIGH, all eight  
outputs are in the highimpedance state.  
In order to enhance PC board layout, the MM74HC540  
and MM74HC541 offers a pinout having inputs and outputs  
on opposite sides of the package. All inputs are protected from  
TSSOP20, 4.4x6.5  
CASE 948AQ01  
damage due to static discharge by diodes to V and ground.  
CC  
MARKING DIAGRAMS  
Features  
SOIC20  
Typical Propagation Delay: 12 ns  
3STATE Outputs for Connection to System Buses  
Wide Power Supply Range: 26 V  
Low Quiescent Current: 160 mA Maximum (74HC Series)  
Output Current: 6 mA  
20  
HCxxxA  
AWLYYWW  
1
These are PbFree Devices  
TSSOP20  
20  
HC  
xxxA  
ALYW  
1
HCxxxA = Specific Device Code  
xxx  
= 540, 541  
A
WL, L  
Y
= Assembly Location  
= Wafer Lot Number  
= Year  
WW, YW = Work Week  
ORDERING INFORMATION  
See detailed ordering and shipping information on page 5 of  
this data sheet.  
© Semiconductor Components Industries, LLC, 1983  
1
Publication Order Number:  
November, 2022 Rev. 2  
MM74HC541/D  
MM74HC540, MM74HC541  
MM74HC540 (Top View)  
MM74HC541 (Top View)  
Figure 1. Connection Diagrams  
(Pin Assignments for SOIC and TSSOP)  
ABSOLUTE MAXIMUM RATINGS (Note 1)  
Symbol  
Rating  
Value  
Unit  
V
V
CC  
Supply Voltage  
0.5 to +7.0 V  
V
IN  
DC Input Voltage  
0.5 to V +0.5 V  
V
CC  
V
DC Output Voltage  
Clamp Diode Current  
DC Output Current, per pin  
0.5 to V +0.5 V  
V
OUT  
CC  
I
20  
35  
mA  
mA  
mA  
°C  
CD  
I
OUT  
I
DC V or GND Current, per pin  
70  
CC  
CC  
T
STG  
Storage Temperature Range  
Power Dissipation  
65 to +150  
600  
P
Note 2  
mW  
mW  
°C  
D
S. O. Package only  
500  
T
Lead Temperature (Soldering 10 seconds)  
260  
L
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality  
should not be assumed, damage may occur and reliability may be affected.  
1. Unless otherwise specified all voltages are referenced to ground.  
2. Power dissipation temperature derating plastic “N” package: 12 mW/°C from 65°C to 85°C.  
RECOMMENDED OPERATING CONDITIONS  
Symbol  
Parameter  
Min  
2
Max  
Unit  
V
V
CC  
Supply Voltage  
6
V
IN  
, V  
DC Input or Output Voltage  
Operating Temperature Range  
Input Rise or Fall Times  
0
V
CC  
V
OUT  
T
A
55  
+125  
1000  
500  
°C  
ns  
ns  
ns  
t , t  
r
V
CC  
V
CC  
V
CC  
= 2.0 V  
= 4.5 V  
= 6.0 V  
f
400  
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond  
the Recommended Operating Ranges limits may affect device reliability.  
www.onsemi.com  
2
 
MM74HC540, MM74HC541  
DC ELECTRICAL CHARACTERISTICS (Note 3)  
T
A
= 25°C  
T
A
= 40 to  
85°C  
T
A
= 55 to  
125°C  
Symbol  
Parameter  
Conditions  
V
CC  
Typ  
Guaranteed Limits  
Unit  
V
IH  
Minimum HIGH Level  
Input Voltage  
2.0 V  
4.5 V  
6.0 V  
1.5  
3.15  
4.2  
1.5  
3.15  
4.2  
1.5  
3.15  
4.2  
V
V
V
V
IL  
Maximum LOW Level  
Input Voltage  
2.0 V  
4.5 V  
6.0 V  
0.5  
1.35  
1.8  
0.5  
1.35  
1.8  
0.5  
1.35  
1.8  
V
V
V
V
OH  
Minimum HIGH Level  
Output Voltage  
V
= V or V  
IL  
⎪ ≤ 20 mA  
2.0 V  
4.5 V  
6.0 V  
2.0  
4.5  
6.0  
1.9  
4.4  
5.9  
1.9  
4.4  
5.9  
1.9  
4.4  
5.9  
V
V
V
IN  
IH  
I  
OUT  
V
I  
I  
= V or V  
IL  
V
V
IN  
IH  
⎪ ≤ 6.0 mA  
OUT  
⎪ ≤ 7.8 mA  
OUT  
4.5 V  
6.0 V  
4.2  
5.7  
3.98  
5.48  
3.84  
5.34  
3.7  
5.2  
V
OL  
Maximum LOW Level  
Output Voltage  
V
= V or V  
IL  
⎪ ≤ 20 mA  
2.0 V  
4.5 V  
6.0 V  
0
0
0
0.1  
0.1  
0.1  
0.1  
0.1  
0.1  
0.1  
0.1  
0.1  
V
V
V
IN  
IH  
I  
OUT  
V
I  
I  
= V or V  
IL  
V
V
IN  
IH  
⎪ ≤ 6.0 mA  
OUT  
⎪ ≤ 7.8 mA  
OUT  
4.5 V  
6.0 V  
0.2  
0.2  
0.26  
0.26  
0.33  
0.33  
0.4  
0.4  
I
Maximum Input  
Current  
V
= V or GND  
6.0 V  
0.1  
1.0  
1.0  
mA  
mA  
IN  
IN  
CC  
I
Maximum 3STATE  
Output Leakage  
Current  
V
IN  
= V or V ,  
IH IL  
6.0 V  
0.5  
5
10  
OZ  
G = V  
IH  
V
OUT  
= V or GND  
CC  
I
Maximum Quiescent  
Supply Current  
V
= V or GND  
= 0 mA  
6.0 V  
8.0  
80  
160  
mA  
CC  
IN  
CC  
I
OUT  
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product  
performance may not be indicated by the Electrical Characteristics if operated under different conditions.  
3. For a power supply of 5 V 10% the worst case output voltages (V , and V ) occur for HC at 4.5 V. Thus the 4.5 V values should be used  
OH  
OL  
when designing with this supply. Worst case V and V occur at V = 5.5 V and 4.5 V respectively. (The V value at 5.5 V is 3.85 V.) The  
IH  
IL  
CC  
IH  
worst case leakage current (I , I , and I ) occur for CMOS at the higher voltage and so the 6.0 V values should be used.  
IN CC  
OZ  
AC ELECTRICAL CHARACTERISTICS  
(V = 5 V, T = 25°C, t = t = 6 ns)  
CC  
A
r
f
Symbol  
Parameter  
Conditions  
C = 45 pF  
Typ  
12  
Guaranteed Limit  
Unit  
ns  
t
t
, t  
Maximum Propagation Delay (540)  
Maximum Propagation Delay (541)  
Maximum Output Enable Time  
18  
20  
28  
PHL PLH  
L
, t  
C = 45 pF  
L
14  
ns  
PHL PLH  
t
, t  
R = 1 kW  
L
17  
ns  
PZH PZL  
C = 45 pF  
L
t
, t  
Maximum Output Disable Time  
R = 1 kW  
L
15  
25  
ns  
PHZ PLZ  
C = 5 pF  
L
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product  
performance may not be indicated by the Electrical Characteristics if operated under different conditions.  
www.onsemi.com  
3
 
MM74HC540, MM74HC541  
AC ELECTRICAL CHARACTERISTICS  
(V = 2.0 V to 6.0. V, C = 50 pF, t = t = 6 ns, unless otherwise specified)  
CC  
L
r
f
T
A
= 25°C  
T
A
= 40 to  
85°C  
T
A
= 55 to  
125°C  
Symbol  
Parameter  
Conditions  
C = 50 pF  
V
Typ  
Guaranteed Limits  
Unit  
CC  
t
, t  
Maximum Propagation  
Delay (540)  
2.0 V  
2.0 V  
55  
83  
100  
150  
126  
190  
149  
224  
ns  
ns  
PHL PLH  
L
C = 150 pF  
L
C = 50 pF  
C = 150 pF  
L
4.5 V  
4.5 V  
12  
22  
20  
30  
25  
38  
30  
45  
ns  
ns  
L
C = 50 pF  
C = 150 pF  
L
6.0 V  
6.0 V  
11  
18  
17  
26  
21  
32  
25  
38  
ns  
ns  
L
t
, t  
Maximum Propagation  
Delay (541)  
C = 50 pF  
C = 150 pF  
L
2.0 V  
2.0 V  
58  
83  
115  
165  
145  
208  
171  
246  
ns  
ns  
PHL PLH  
L
C = 50 pF  
C = 150 pF  
L
4.5 V  
4.5 V  
14  
17  
23  
33  
29  
42  
34  
49  
ns  
ns  
L
C = 50 pF  
C = 150 pF  
L
6.0 V  
6.0 V  
11  
14  
20  
28  
25  
35  
29  
42  
ns  
ns  
L
t
, t  
Maximum Output  
Enable Time  
R = 1 kW  
L
C = 50 pF  
L
PZH PZL  
2.0 V  
4.5 V  
75  
100  
150  
200  
189  
252  
224  
298  
ns  
ns  
C = 150 pF  
L
C = 50 pF  
C = 150 pF  
L
4.5 V  
4.5 V  
15  
30  
30  
40  
38  
50  
45  
60  
ns  
ns  
L
C = 50 pF  
C = 150 pF  
L
6.0 V  
6.0 V  
13  
17  
26  
34  
32  
43  
38  
51  
ns  
ns  
L
t
, t  
Maximum Output  
Disable Time  
R = 1 kW  
C = 50 pF  
L
2.0 V  
4.5 V  
6.0 V  
75  
15  
13  
150  
30  
26  
189  
38  
32  
224  
45  
38  
ns  
ns  
ns  
PHZ PLZ  
L
t
, t  
Maximum Output Rise  
and Fall Time  
C = 50 pF  
L
2.0 V  
4.5 V  
6.0 V  
25  
7
6
60  
12  
10  
75  
15  
13  
90  
18  
15  
ns  
ns  
ns  
THL TLH  
C
Power Dissipation  
Capacitance (Note 4)  
G = V  
G = V  
10  
50  
pF  
pF  
pF  
PD  
IH  
IL  
C
Maximum Input  
Capacitance  
5
10  
20  
10  
20  
10  
20  
IN  
C
Maximum Output  
Capacitance  
15  
OUT  
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product  
performance may not be indicated by the Electrical Characteristics if operated under different conditions.  
2
4. C determines the no load dynamic power consumption, P = C  
V
f + I  
V
, and the no load dynamic current consumption,  
PD  
D
PD CC  
CC CC  
I
= C  
V
f + I  
.
S
PD CC  
CC  
www.onsemi.com  
4
 
MM74HC540, MM74HC541  
ORDERING INFORMATION  
Device  
Package  
Shipping  
MM74HC540WM  
MM74HC540WMX  
MM74HC540MTC  
MM74HC540MTCX  
MM74HC541WM  
SOIC20 WB  
38 Units / Tube  
1000 / Tape & Reel  
75 Units / Tube  
(PbFree and Halide Free)  
TSSOP20 WB  
(PbFree)  
2500 / Tape & Reel  
38 Units / Tube  
SOIC20 WB  
(PbFree and Halide Free)  
MM74HC541WMX  
MM74HC541MTC  
MM74HC541MTCX  
SOIC20, 300 mils  
1000 / Tape & Reel  
75 Units / Tube  
(PbFree and Halide Free)  
TSSOP20 WB  
(PbFree)  
TSSOP20, 4.4 × 6.5  
(PbFree)  
2500 / Tape & Reel  
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging  
Specifications Brochure, BRD8011/D.  
www.onsemi.com  
5
MECHANICAL CASE OUTLINE  
PACKAGE DIMENSIONS  
SOIC20, 300 mils  
CASE 751BJ01  
ISSUE O  
DATE 19 DEC 2008  
SYMBOL  
MIN  
NOM  
MAX  
2.64  
0.30  
2.55  
0.51  
0.33  
13.00  
10.64  
7.60  
2.36  
2.49  
A
A1  
A2  
b
0.10  
2.05  
0.31  
0.41  
0.27  
c
0.20  
E1  
E
D
12.60  
10.01  
7.40  
12.80  
10.30  
7.50  
E
E1  
e
1.27 BSC  
h
0.25  
0.40  
0º  
0.75  
1.27  
8º  
0.81  
L
b
e
θ
5º  
15º  
θ1  
PIN#1 IDENTIFICATION  
TOP VIEW  
D
h
h
q1  
q
A2  
A
q1  
L
c
A1  
END VIEW  
SIDE VIEW  
Notes:  
(1) All dimensions are in millimeters. Angles in degrees.  
(2) Complies with JEDEC MS-013.  
Electronic versions are uncontrolled except when accessed directly from the Document Repository.  
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.  
DOCUMENT NUMBER:  
DESCRIPTION:  
98AON34287E  
SOIC20, 300 MILS  
PAGE 1 OF 1  
ON Semiconductor and  
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.  
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding  
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically  
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the  
rights of others.  
© Semiconductor Components Industries, LLC, 2019  
www.onsemi.com  
MECHANICAL CASE OUTLINE  
PACKAGE DIMENSIONS  
SOIC20 WB  
CASE 751D05  
ISSUE H  
DATE 22 APR 2015  
SCALE 1:1  
D
A
q
NOTES:  
1. DIMENSIONS ARE IN MILLIMETERS.  
2. INTERPRET DIMENSIONS AND TOLERANCES  
PER ASME Y14.5M, 1994.  
20  
11  
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD  
PROTRUSION.  
E
B
4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE.  
5. DIMENSION B DOES NOT INCLUDE DAMBAR  
PROTRUSION. ALLOWABLE PROTRUSION  
SHALL BE 0.13 TOTAL IN EXCESS OF B  
DIMENSION AT MAXIMUM MATERIAL  
CONDITION.  
1
10  
MILLIMETERS  
DIM MIN  
MAX  
2.65  
0.25  
0.49  
0.32  
12.95  
7.60  
20X b  
A
A1  
b
2.35  
0.10  
0.35  
0.23  
12.65  
7.40  
M
S
S
B
T
0.25  
A
c
D
E
e
A
1.27 BSC  
H
h
10.05  
0.25  
0.50  
0
10.55  
0.75  
0.90  
7
SEATING  
PLANE  
L
18X e  
q
_
_
A1  
c
T
GENERIC  
MARKING DIAGRAM*  
RECOMMENDED  
20  
SOLDERING FOOTPRINT*  
20X  
20X  
0.52  
1.30  
XXXXXXXXXXX  
XXXXXXXXXXX  
AWLYYWWG  
20  
11  
10  
1
XXXXX = Specific Device Code  
11.00  
A
= Assembly Location  
= Wafer Lot  
= Year  
= Work Week  
= PbFree Package  
1
WL  
YY  
WW  
G
1.27  
PITCH  
DIMENSIONS: MILLIMETERS  
*This information is generic. Please refer to  
device data sheet for actual part marking.  
PbFree indicator, “G” or microdot “G”, may  
or may not be present. Some products may  
not follow the Generic Marking.  
*For additional information on our PbFree strategy and soldering  
details, please download the ON Semiconductor Soldering and  
Mounting Techniques Reference Manual, SOLDERRM/D.  
Electronic versions are uncontrolled except when accessed directly from the Document Repository.  
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.  
DOCUMENT NUMBER:  
DESCRIPTION:  
98ASB42343B  
SOIC20 WB  
PAGE 1 OF 1  
onsemi and  
are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves  
the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular  
purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation  
special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others.  
© Semiconductor Components Industries, LLC, 2019  
www.onsemi.com  
MECHANICAL CASE OUTLINE  
PACKAGE DIMENSIONS  
TSSOP20 WB  
CASE 948E  
ISSUE D  
DATE 17 FEB 2016  
SCALE 2:1  
NOTES:  
20X K REF  
1. DIMENSIONING AND TOLERANCING PER  
ANSI Y14.5M, 1982.  
K
K1  
M
S
S
0.10 (0.004)  
T U  
V
S
2. CONTROLLING DIMENSION: MILLIMETER.  
3. DIMENSION A DOES NOT INCLUDE MOLD  
FLASH, PROTRUSIONS OR GATE BURRS.  
MOLD FLASH OR GATE BURRS SHALL NOT  
EXCEED 0.15 (0.006) PER SIDE.  
0.15 (0.006) T U  
J J1  
20  
11  
2X L/2  
4. DIMENSION B DOES NOT INCLUDE  
INTERLEAD FLASH OR PROTRUSION.  
INTERLEAD FLASH OR PROTRUSION  
SHALL NOT EXCEED 0.25 (0.010) PER SIDE.  
5. DIMENSION K DOES NOT INCLUDE  
DAMBAR PROTRUSION. ALLOWABLE  
DAMBAR PROTRUSION SHALL BE 0.08  
(0.003) TOTAL IN EXCESS OF THE K  
DIMENSION AT MAXIMUM MATERIAL  
CONDITION.  
B
SECTION NN  
L
U−  
PIN 1  
IDENT  
0.25 (0.010)  
N
1
10  
6. TERMINAL NUMBERS ARE SHOWN FOR  
REFERENCE ONLY.  
7. DIMENSION A AND B ARE TO BE  
DETERMINED AT DATUM PLANE W.  
M
S
0.15 (0.006) T U  
A
V−  
N
MILLIMETERS  
INCHES  
MIN  
DIM MIN  
MAX  
6.60  
4.50  
1.20  
0.15  
0.75  
MAX  
0.260  
0.177  
0.047  
0.006  
0.030  
F
A
B
6.40  
4.30  
---  
0.252  
0.169  
---  
DETAIL E  
C
D
0.05  
0.50  
0.002  
0.020  
F
G
H
0.65 BSC  
0.026 BSC  
W−  
0.27  
0.09  
0.09  
0.19  
0.19  
0.37  
0.20  
0.16  
0.30  
0.25  
0.011  
0.004  
0.004  
0.007  
0.007  
0.015  
0.008  
0.006  
0.012  
0.010  
C
J
J1  
K
G
D
H
K1  
L
DETAIL E  
6.40 BSC  
0.252 BSC  
0
0.100 (0.004)  
TSEATING  
M
0
8
8
_
_
_
_
PLANE  
GENERIC  
MARKING DIAGRAM*  
SOLDERING FOOTPRINT  
7.06  
XXXX  
XXXX  
ALYWG  
G
1
A
L
= Assembly Location  
= Wafer Lot  
Y
W
G
= Year  
= Work Week  
= PbFree Package  
0.65  
PITCH  
(Note: Microdot may be in either location)  
*This information is generic. Please refer to  
device data sheet for actual part marking.  
PbFree indicator, “G” or microdot “ G”,  
may or may not be present.  
01.36X6  
16X  
1.26  
DIMENSIONS: MILLIMETERS  
Electronic versions are uncontrolled except when accessed directly from the Document Repository.  
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.  
DOCUMENT NUMBER:  
DESCRIPTION:  
98ASH70169A  
TSSOP20 WB  
PAGE 1 OF 1  
ON Semiconductor and  
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.  
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding  
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically  
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© Semiconductor Components Industries, LLC, 2019  
www.onsemi.com  
MECHANICAL CASE OUTLINE  
PACKAGE DIMENSIONS  
TSSOP20, 4.4x6.5  
CASE 948AQ01  
ISSUE A  
DATE 19 MAR 2009  
b
SYMBOL  
MIN  
NOM  
MAX  
A
A1  
A2  
b
1.20  
0.15  
1.05  
0.30  
0.20  
6.60  
6.50  
4.50  
0.05  
0.80  
0.19  
0.09  
6.40  
6.30  
4.30  
E1  
E
c
D
6.50  
6.40  
E
E1  
e
4.40  
0.65 BSC  
0.60  
L
0.45  
0.75  
L1  
1.00 REF  
0º  
8º  
θ
e
TOP VIEW  
D
c
A2  
A
θ1  
L
A1  
L1  
SIDE VIEW  
END VIEW  
Notes:  
(1) All dimensions are in millimeters. Angles in degrees.  
(2) Complies with JEDEC MO-153.  
Electronic versions are uncontrolled except when accessed directly from the Document Repository.  
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.  
DOCUMENT NUMBER:  
DESCRIPTION:  
98AON34453E  
TSSOP20, 4.4X6.5  
PAGE 1 OF 1  
ON Semiconductor and  
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.  
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rights of others.  
© Semiconductor Components Industries, LLC, 2019  
www.onsemi.com  
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