MM74HCT164MX [ONSEMI]

8位串进/并出移位寄存器;


型号：	MM74HCT164MX
厂家：	ONSEMI
描述：	8位串进/并出移位寄存器光电二极管逻辑集成电路触发器移位寄存器
文件：	总6页 (文件大小：207K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

DATA SHEET

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8-Bit Serial-in/Parallel-out

Shift Register

MM74HCT164

SOIC−14

CASE 751EF

Description

MARKING DIAGRAM

The MM74HCT164 utilizes advanced silicon−gate CMOS

technology. It has the high noise immunity and low consumption of

standard CMOS integrated circuits. It also offers speeds comparable to

low power Schottky devices. This 8−bit shift register has gated serial

inputs and CLEAR. Each register bit is a D−type master/slave

flip−flop. Inputs A & B permit complete control over the incoming

data. A LOW at either or both inputs inhibits entry of new data and

resets the first flip−flop to the low level at the next clock pulse. A high

level on one input enables the other input which will then determine

the state of the first flip−flop. Data at the serial inputs may be changed

while the clock is HIGH or LOW, but only information meeting the

setup and hold time requirements will be entered. Data is serially

shifted in and out of the 8−bit register during the positive going

transition of the clock pulse. Clear is independent of the clock and

accomplished by a low level at the CLEAR input.

ZXYKK

MM74HCT

164M

MM74HCT164M = Specific Device Code

= Assembly Plant Code

= Data Code (Year & Week)

= Lot Traceability Code

CONNECTION DIAGRAM

The 74HCT logic family is functionally as well as pin−out

compatible with the standard 74LS logic family. All inputs are

protected from damage due to static discharge by internal diode

clamps to V and ground.

MM74HCT devices are intended to interface between TTL and

NMOS components and standard CMOS devices. These parts are also

plug−in replacements for LS−TTL devices and can be used to reduce

power consumption in existing designs.

Features

• Typical Propagation Delay: 20 ns

• Low Quiescent Current: 160 mA Maximum (74HCT Series)

• Low Input Current: 1 mA Maximum

• Fanout of 10 LS−TTL Loads

• TTL Input Compatible

(Top View)

ORDERING INFORMATION

• These are Pb−Free Devices

†

Device

Package

Shipping

SOIC−14

(Pb−Free)

MM74HCT164M

1100 Units /

Tube

SOIC−14

(Pb−Free)

2500 /

Tape & Reel

MM74HCT164MX

†For information on tape and reel specifications,

including part orientation and tape sizes, please

refer to our Tape and Reel Packaging Specifications

Brochure, BRD8011/D.

Publication Order Number:

November, 2022 − Rev. 1

MM74HCT164/D

MM74HCT164

TRUTH TABLE

Inputs

Outputs

Clear

Clock

…

↑

H = HIGH Level (steady state)

L = LOW Level (steady state)

X = Irrelevant (any input, including transitions)

↑ = Transition from LOW−to−HIGH level

, Q , Q

= the level of Q , Q , or Q , respectively, before the indicated steady state input conditions were established.

HO A B H

, Q = The level of Q or Q before the most recent ↑ transition of the clock; indicated a one−bit shift.

Figure 1. Logic Diagram

Parameter

ABSOLUTE MAXIMUM RATINGS (Note 1)

Symbol

Value

Unit

Supply Voltage

−0.5 to +7.0

DC Input Voltage

−0.5 to V + 0.5

DC Output Voltage

Clamp Diode Current

DC Output Current, per Pin

−0.5 to V + 0.5

OUT

I , I

IK OK

°C

OUT

DC V or GND Current, per Pin

STG

Storage Temperature Range

−65 to +150

Power Dissipation

S. O. Package Only

500

260

Lead Temperature (Soldering 10 seconds)

°C

Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality

should not be assumed, damage may occur and reliability may be affected.

1. Unless otherwise specified all voltages are referenced to ground.

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MM74HCT164

RECOMMENDED OPERATIONG CONDITIONS

Symbol

Parameter

Min

4.5

Max

Unit

Supply Voltage

5.5

, V

OUT

DC Input or Output Voltage

Operating Temperature Range

Input Rise or Fall Times

−55

−

+125

500

°C

t , t

DC ELECTRICAL CHARACTERISTICS (V = 5 V 10% unless otherwise specified)

= −405C

= −555C to

1255C

to 855C

= 255C

Typ

Guaranteed Limits

Symbol

Parameter

Conditions

Unit

Minimum HIGH

−

2.0

0.8

2.0

0.8

Level Input Voltage

Maximum LOW

Level Input Voltage

−

0.8

Minimum HIGH Level

Output Voltage

= V or V

IN IH IL

−0.1

| = 20 mA

| = 4.0 mA, V = 4.5 V

| = 4.8 mA, V = 5.5 V

OUT

4.2

5.2

3.98

4.98

3.84

4.84

3.7

4.7

Maximum LOW Level

Voltage

= V or V

| = 20 mA

| = 4.0 mA, V = 4.5 V

| = 4.8 mA, V = 5.5 V

0.2

0.1

0.26

0.1

0.33

0.1

0.4

OUT

Maximum Input

Current

= V or GND

−

0.1

8.0

1.0

160

1.5

Maximum Quiescent

Supply Current

OUT

= V or GND,

= 0 mA

= 2.4 V or 0.4 V (Note 2)

1.3

2. This is measured per input pin. All other inputs are held at V or ground.

AC ELECTRICAL CHARACTERISTICS (V = 5 V, T = 25°C, C = 15 pF, t = t = 6 ns)

Guaranteed

Limit

Symbol

Parameter

Conditions

50% Duty

Typ

Unit

Maximum Operating Frequency from Clock to Q

MHz

MAX

Cycle Clock

, t

Maximum Propagation Delay, Clock to Q

Maximum Propagation Delay, from Clear to Q

Minimum Removal Time, Clear to Clock

Minimum Setup Time, Data to Clock

Minimum Hold Time, Clock to Data

PHL PLH

PHL

REM

≥ 20 ns

1.5

Minimum Pulse Width, Preset or Clear

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MM74HCT164

AC ELECTRICAL CHARACTERISTICS (V = 5.0 V, 10%, C = 50 pF, t = t = 6 ns unless otherwise specified)

= −55°C to

125°C

= 25°C

T −40°C to 85°C

Typ

Max

Min

Max

Min

Symbol

Parameter

Conditions

50% Duty Cycle Clock

Unit

Maximum Operating

Frequency

−

MHz

MAX

, t

Maximum Propagation

Delay, from Clock to Q

−

PHL PLH

Maximum Propagation

Delay, from Clear to Q

PHL

Minimum Removal Time,

Clear to Clock

REM

Minimum Setup Time,

Data to Clock

≥ 20 ns

Minimum Hold Time,

Clock to Data

1.5

−

Minimum Pulse Width,

Clock or Clear

500

−

500

−

500

−

t t

r, f

Maximum Input Rise and

Fall Time

, t

Maximum Output Rise and

Fall Time

−

TLH THL

Power Dissipation

Capacitance

(Note 3)

160

Maximum Input

Capacitance

−

3. C determines the no load dynamic power consumption, P = C

f + I

, and the no load dynamic current consumption,

PD CC

CC CC

= C

f + I

PD CC

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MECHANICAL CASE OUTLINE

PACKAGE DIMENSIONS

SOIC14

CASE 751EF

ISSUE O

DATE 30 SEP 2016

Electronic versions are uncontrolled except when accessed directly from the Document Repository.

Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.

DOCUMENT NUMBER:

DESCRIPTION:

98AON13739G

SOIC14

PAGE 1 OF 1

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

MM74HCT164MX [ONSEMI]

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