MM74HCT240WMX [ONSEMI]
反相八通道3态缓冲器;
| 型号： | MM74HCT240WMX |
| 厂家： | 
ONSEMI |
| 描述： | 反相八通道3态缓冲器 驱动 光电二极管 逻辑集成电路 |
| 文件： | 总9页 (文件大小：296K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATA SHEET
www.onsemi.com
Inverting Octal 3-STATE
Buffer, Octal 3-STATE Buffer
MM74HCT240,
MM74HCT244
SOIC−20 WB
CASE 751D−05
TSSOP−20 WB
CASE 948E
TSSOP−20
CASE 948AQ
General Description
MARKING DIAGRAMS
The MM74HCT240 and MM74HCT244 3−STATE buffers utilize
advanced silicon−gate CMOS technology and are general purpose
high speed inverting and non−inverting buffers. They possess high
drive current outputs which enable high speed operation even when
driving large bus capacitances. These circuits achieve speeds
comparable to low power Schottky devices, while retaining the low
power consumption of CMOS. All three devices are TTL input
compatible and have a fanout of 15 LS−TTL equivalent inputs.
MM74HCT devices are intended to interface between TTL and
NMOS components and standard CMOS devices. These parts are also
plug−in replacements for LS−TTL devices and can be used to reduce
power consumption in existing designs.
20
1
20
XXX
XXXXXX
AWLYYWWG
XXX
ALYWG
G
1
XXXXX = Specific Device Code
A
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
L/WL
Y/YY
W/WW
G or G
The MM74HCT240 is an inverting buffer and the MM74HCT244 is
a non−inverting buffer. Each device has two active low enables (1G
and 2G), and each enable independently controls 4 buffers.
All inputs are protected from damage due to static discharge by
(Note: Microdot may be in either location)
CONNECTION DIAGRAMS
Pin Assignment for SOIC and TSSOP
diodes to V and ground.
CC
Features
• TTL Input Compatible
• Typical Propagation Delay: 14 ns
• 3−STATE Outputs for Connection to System Buses
• Low Quiescent Supply Current: 160 mA
• High Output Drive Current: 6 mA (min)
• These are Pb−Free Devices
TRUTH TABLES
MM74HCT240
MM74HCT240 (Top View)
1G
1A
L
1Y
H
L
2G
L
2A
L
2Y
H
L
L
L
H
L
L
H
L
H
Z
H
H
Z
H
H
Z
H
Z
MM74HCT244
1G
L
1A
L
1Y
L
2G
L
2A
L
2Y
L
L
H
L
H
Z
L
H
L
H
Z
MM74HCT244 (Top View)
H
H
H
H
H
Z
H
Z
ORDERING INFORMATION
See detailed ordering, marking and shipping information in the
package dimensions section on page 5 of this data sheet.
NOTES: H = HIGH Level
L = LOW Level
Z = High Impedance
© Semiconductor Components Industries, LLC, 2005
1
Publication Order Number:
November, 2022 − Rev. 2
MM74HCT244/D
MM74HCT240, MM74HCT244
Logic Diagrams
MM74HCT240
MM74HCT244
Figure 1. Logic Diagrams
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2
MM74HCT240, MM74HCT244
ABSOLUTE MAXIMUM RATINGS (Note 1)
Symbol
Parameter
Value
Unit
V
V
CC
Supply Voltage
−0.5 to +7.0
V
IN
DC Input Voltage
−0.5 to V + 0.5
V
CC
V
DC Output Voltage
Clamp Diode Current
DC Output Current, per Pin
−0.5 to V + 0.5
V
OUT
CC
I
, I
20
35
mA
mA
mA
°C
IK OK
I
OUT
I
DC V or GND Current, per Pin
70
CC
CC
T
STG
Storage Temperature Range
−65 to +150
P
Power Dissipation
S. O. Package Only
mW
D
500
260
T
Lead Temperature (Soldering 10 seconds)
°C
L
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Unless otherwise specified all voltages are referenced to ground.
RECOMMENDED OPERATING CONDITIONS (Note 1)
Symbol
Parameter
Min
4.5
0
Max
Unit
V
V
CC
Supply Voltage
5.5
V
IN
, V
OUT
DC Input or Output Voltage
Operating Temperature Range
Input Rise or Fall Times
V
CC
V
T
A
−55
−
+125
500
°C
ns
t , t
r
f
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
DC ELECTRICAL CHARACTERISTICS (V = 5 V 10% unless otherwise specified)
CC
T
A
= 25°C
T
A
= −40°C to 85°C
T = −55°C to 125°C
A
Typ
Guaranteed Limits
Symbol
Parameter
Conditions
Unit
V
Minimum HIGH
−
2.0
0.8
2.0
2.0
0.8
V
IH
Level Input Voltage
V
Maximum LOW
Level Input Voltage
−
0.8
V
V
IL
V
OH
Minimum HIGH
Level Output Voltage |I
V
= V or V
IN−EE IH IL
| = 20 mA
V
CC
V
−0.1
V
−0.1
V
−0.1
OUT
OUT
OUT
CC
CC
CC
4.2
5.2
3.98
4.98
3.84
4.84
3.7
|I
|I
| = 6.0 mA, V = 4.5 V
| = 7.2 mA, V = 5.5 V
CC
CC
4.7
V
OL
Maximum LOW
V
= V or V
IL
V
IN
IH
Level Output Voltage |I
| = 20 mA
0
0.2
0.2
0.1
0.26
0.26
0.1
0.33
0.33
0.1
0.4
0.4
OUT
OUT
OUT
|I
|I
| = 6.0 mA, V = 4.5 V
| = 7.2 mA, V = 5.5 V
CC
CC
I
Maximum Input
Current
V
= V or GND, V or V
IL
−
0.05
0.5
1.0
mA
mA
IN
IN
CC
IH
I
Maximum 3−STATE
Output Leakage
Current
V
OUT
= V or GND
−
0.25
2.5
10
OZ
CC
G = V
G = V
IH
IL
V
OUT
= V or GND
−
4.0
1.0
40
160
1.5
mA
I
Maximum Quiescent
Supply Current
IN
CC
CC
I
= 0 mA
V
IN
= 2.4 V or 0.5 V (Note 2)
0.6
1.3
mA
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
2. Measured per input. All other inputs at V or GND.
CC
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3
MM74HCT240, MM74HCT244
AC ELECTRICAL CHARACTERISTICS
(MM74HCT240, MM74HCT244 V = 5.0 V, t = t = 6 ns, T = 25°C, unless otherwise specified)
CC
r
f
A
Guaranteed
Limit
Symbol
, t
Parameter
Conditions
C = 45 pF
Typ
14
Unit
ns
t
t
t
Maximum Output Propagation Delay
Maximum Output Enable Time
Maximum Output Disable Time
18
30
25
PHL PLH
L
, t
C = 45 pF, R = 1 kW
20
ns
PZL PZH
L
L
, t
C = 5 pF, R = 1 kW
16
ns
PLZ PHZ
L
L
AC ELECTRICAL CHARACTERISTICS
(MM74HCT240, MM74HCT244 V = 5.0 V 10%, t = t = 6 ns, unless otherwise specified)
CC
r
f
T
A
= 25°C
T
A
= −40°C to 85°C
T = −55°C to 125°C
A
Typ
14
20
21
26
16
Guaranteed Limits
Symbol
Parameter
Conditions
Unit
t
,
Maximum Output
Propagation Delay
C = 50 pF
20
25
35
38
53
32
30
42
45
63
38
ns
PHL
L
t
PLH
C = 150 pF
28
30
42
25
L
R = 1 kW, C = 50 pF
L L
ns
ns
ns
t
,
Maximum Output
Enable Time
PZH
t
PZL
R = 1 kW, C = 150 pF
L
L
t
,
Maximum Output
Disable Time
R = 1 kW
C = 50 pF
PHZ
L
L
t
PLZ
t
,
Maximum Output
Rise and Fall Time
C = 50 pF
6
12
15
20
15
15
20
18
15
20
ns
pF
pF
pF
THL
L
t
TLH
C
Maximum Input
Capacitance
10
15
IN
C
Maximum Output
Capacitance
OUT
C
Power Dissipation
Capacitance
(Note 3)
(per buffer)
PD
G = V , G = GND
5
90
−
−
−
−
−
−
CC
G = GND, G = V
CC
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
2
3. C determines the no load dynamic power consumption, P = C ⋅ V
⋅ f + I ⋅ V , and the no load dynamic current consumption,
PD
D
PD
CC
CC CC
I
= C ⋅ V ⋅ f + I
.
S
PD
CC
CC
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4
MM74HCT240, MM74HCT244
ORDERING INFORMATION
Device
†
Package
Shipping
MM74HCT240MTCX
MM74HCT244MTC
MM74HCT244MTCX
MM74HCT244WM
MM74HCT244WMX
2500 Units / Tape & Reel
75 Units / Tube
TSSOP−20, case 948AQ
(Pb−Free)
TSSOP−20 WB, case 948E
(Pb−Free)
2500 Units / Tape & Reel
38 Units / Tube
TSSOP−20, case 948AQ
(Pb−Free)
SOIC−20 WB, case 751D−05
(Pb−Free)
1000 Units / Tape & Reel
SOIC−20 WB, case 751D−05
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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5
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SOIC−20 WB
CASE 751D−05
ISSUE H
DATE 22 APR 2015
SCALE 1:1
D
A
q
NOTES:
1. DIMENSIONS ARE IN MILLIMETERS.
2. INTERPRET DIMENSIONS AND TOLERANCES
PER ASME Y14.5M, 1994.
20
11
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD
PROTRUSION.
E
B
4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE.
5. DIMENSION B DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE PROTRUSION
SHALL BE 0.13 TOTAL IN EXCESS OF B
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
1
10
MILLIMETERS
DIM MIN
MAX
2.65
0.25
0.49
0.32
12.95
7.60
20X b
A
A1
b
2.35
0.10
0.35
0.23
12.65
7.40
M
S
S
B
T
0.25
A
c
D
E
e
A
1.27 BSC
H
h
10.05
0.25
0.50
0
10.55
0.75
0.90
7
SEATING
PLANE
L
18X e
q
_
_
A1
c
T
GENERIC
MARKING DIAGRAM*
RECOMMENDED
20
SOLDERING FOOTPRINT*
20X
20X
0.52
1.30
XXXXXXXXXXX
XXXXXXXXXXX
AWLYYWWG
20
11
10
1
XXXXX = Specific Device Code
11.00
A
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
1
WL
YY
WW
G
1.27
PITCH
DIMENSIONS: MILLIMETERS
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42343B
SOIC−20 WB
PAGE 1 OF 1
onsemi and
are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves
the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation
special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
TSSOP−20 WB
CASE 948E
ISSUE D
DATE 17 FEB 2016
SCALE 2:1
NOTES:
20X K REF
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
K
K1
M
S
S
0.10 (0.004)
T U
V
S
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH OR GATE BURRS SHALL NOT
EXCEED 0.15 (0.006) PER SIDE.
0.15 (0.006) T U
J J1
20
11
2X L/2
4. DIMENSION B DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION
SHALL NOT EXCEED 0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08
(0.003) TOTAL IN EXCESS OF THE K
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
B
SECTION N−N
L
−U−
PIN 1
IDENT
0.25 (0.010)
N
1
10
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE −W−.
M
S
0.15 (0.006) T U
A
−V−
N
MILLIMETERS
INCHES
MIN
DIM MIN
MAX
6.60
4.50
1.20
0.15
0.75
MAX
0.260
0.177
0.047
0.006
0.030
F
A
B
6.40
4.30
---
0.252
0.169
---
DETAIL E
C
D
0.05
0.50
0.002
0.020
F
G
H
0.65 BSC
0.026 BSC
−W−
0.27
0.09
0.09
0.19
0.19
0.37
0.20
0.16
0.30
0.25
0.011
0.004
0.004
0.007
0.007
0.015
0.008
0.006
0.012
0.010
C
J
J1
K
G
D
H
K1
L
DETAIL E
6.40 BSC
0.252 BSC
0
0.100 (0.004)
−T− SEATING
M
0
8
8
_
_
_
_
PLANE
GENERIC
MARKING DIAGRAM*
SOLDERING FOOTPRINT
7.06
XXXX
XXXX
ALYWG
G
1
A
L
= Assembly Location
= Wafer Lot
Y
W
G
= Year
= Work Week
= Pb−Free Package
0.65
PITCH
(Note: Microdot may be in either location)
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
01.36X6
16X
1.26
DIMENSIONS: MILLIMETERS
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98ASH70169A
TSSOP−20 WB
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
TSSOP20, 4.4x6.5
CASE 948AQ−01
ISSUE A
DATE 19 MAR 2009
b
SYMBOL
MIN
NOM
MAX
A
A1
A2
b
1.20
0.15
1.05
0.30
0.20
6.60
6.50
4.50
0.05
0.80
0.19
0.09
6.40
6.30
4.30
E1
E
c
D
6.50
6.40
E
E1
e
4.40
0.65 BSC
0.60
L
0.45
0.75
L1
1.00 REF
0º
8º
θ
e
TOP VIEW
D
c
A2
A
θ1
L
A1
L1
SIDE VIEW
END VIEW
Notes:
(1) All dimensions are in millimeters. Angles in degrees.
(2) Complies with JEDEC MO-153.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON34453E
TSSOP20, 4.4X6.5
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
onsemi,
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.
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