MM74HCT32MX [ONSEMI]

四通道2输入OR门;
MM74HCT32MX
型号: MM74HCT32MX
厂家: ONSEMI    ONSEMI
描述:

四通道2输入OR门

栅 光电二极管 逻辑集成电路 触发器
文件: 总7页 (文件大小:224K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
DATA SHEET  
www.onsemi.com  
Quad 2-Input OR Gate  
MM74HCT32  
14  
1
SOIC−14 NB  
CASE 751A−03  
General Description  
The MM74HCT32 is a logic function fabricated by using advanced  
silicon−gate CMOS technology, which provides the inherent benefits  
of CMOS — low quiescent power and wide power supply range. This  
device is input and output characteristic and pin−out compatible with  
standard 74LS logic families. All inputs are protected from static  
14  
1
TSSOP−14 WB  
CASE 948G  
discharge damage by internal diodes to V and ground.  
CC  
MM74HCT devices are intended to interface between TTL and  
NMOS components and standard CMOS devices. These parts are also  
plug−in replacements for LS−TTL devices and can be used to reduce  
power consumption in existing designs.  
MARKING DIAGRAM  
14  
HCT32A  
AWLYWW  
Features  
TTL, LS Pin−out and Threshold Compatible  
1
Fast Switching: t , t = 10 ns (Typ.)  
SOIC−14 NB  
PLH PHL  
Low Power: 10 mW at DC  
14  
High Fan−out, 10 LS−TTL Loads  
HCT  
32A  
ALYW  
These Devices are Pb−Free, Halide Free and are RoHS Compliant  
Connection Diagram  
1
TSSOP−14  
HCT32A = Specific Device Code  
A
WL, L  
Y
= Assembly Location  
= Wafer Lot  
= Year  
WW, W = Work Week  
ORDERING INFORMATION  
See detailed ordering and shipping information on page 3 of  
this data sheet.  
Figure 1. Pin Assignments for SOIC and TSSOP  
Logic Diagram  
Figure 2. Logic Diagram  
© Semiconductor Components Industries, LLC, 1987  
1
Publication Order Number:  
November, 2022 − Rev. 2  
MM74HCT32/D  
MM74HCT32  
ABSOLUTE MAXIMUM RATINGS (Note 1)  
Symbol  
Parameter  
Rating  
V
CC  
Supply Voltage  
–0.5 to +7.0 V  
V
IN  
DC Input Voltage  
–0.5 to V + 0.5 V  
CC  
V
DC Output Voltage  
Clamp Diode Current  
DC Output Current, per Pin  
–0.5 to V + 0.5 V  
OUT  
CC  
I , I  
IK OK  
20 mA  
25 mA  
I
OUT  
I
DC V or GND Current, per Pin  
50 mA  
CC  
CC  
T
Storage Temperature Range  
Power Dissipation  
–65°C to +150°C  
500 mW  
STG  
P
S.O. Package Only  
D
T
L
Lead Temperature (Soldering 10 Seconds)  
260°C  
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality  
should not be assumed, damage may occur and reliability may be affected.  
1. Unless otherwise specified all voltages are referenced to ground.  
RECOMMENDED OPERATING CONDITIONS  
Symbol  
Parameter  
Min  
4.5  
0
Max  
Unit  
V
V
CC  
Supply Voltage  
5.5  
V , V  
IN OUT  
DC Input or Output Voltage  
Operating Temperature Range  
Input Rise or Fall Times  
V
CC  
V
T
A
–40  
+85  
500  
°C  
ns  
t , t  
r
f
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond  
the Recommended Operating Ranges limits may affect device reliability.  
DC CHARACTERISTICS (V = 5 V 10% (unless otherwise specified))  
CC  
T
A
= 25°C  
T = −40°C to 85°C  
A
Typ  
Guaranteed Limits  
Symbol  
Parameter  
Conditions  
Unit  
V
V
IH  
Minimum HIGH Level Input Voltage  
Maximum LOW Level Input Voltage  
Minimum HIGH Level Output Voltage  
2.0  
0.8  
− 0.1  
2.0  
0.8  
V
IL  
V
V
OH  
V
CC  
V
CC  
V − 0.1  
CC  
V
V
IN  
= V or V , |I | = 20 mA  
IL OUT  
IH  
V
V
= V or V , |I  
CC  
| = 4.0 mA,  
4.2  
3.98  
3.84  
IN  
IH  
= 4.5 V  
IL OUT  
V
V
= V or V , |I  
CC  
| = 4.8 mA,  
5.2  
4.98  
4.84  
IN  
IH  
= 5.5 V  
IL OUT  
V
OL  
Maximum LOW Level Voltage  
0
0.1  
0.1  
V
V
IN  
= V , |I  
| = 20 mA  
IH OUT  
V
V
= V , |I  
CC  
| = 4.0 mA,  
| = 4.8 mA,  
IH OUT  
0.2  
0.26  
0.33  
IN  
IH OUT  
= 4.5 V  
V
V
= V , |I  
= 5.5 V  
0.2  
0.26  
0.33  
IN  
CC  
I
Maximum Input Current  
V
IN  
V
IN  
V
IN  
= V or GND, V or V  
0.1  
2.0  
1.2  
1.0  
20  
mA  
mA  
IN  
CC  
IH  
IL  
I
Maximum Quiescent Supply Current  
= V or GND, I  
= 0 mA  
CC  
CC  
OUT  
= 2.4 V or 0.5 V (Note 2)  
1.4  
mA  
2. This is measured per input with all other inputs held at V or ground.  
CC  
www.onsemi.com  
2
 
MM74HCT32  
AC CHARACTERISTICS (V = 5.0 V, t = t = 6 ns, C = 15 pF, T = 25°C (unless otherwise noted))  
CC  
r
f
L
A
Symbol  
, t  
Parameter  
Conditions  
Typ  
Guaranteed Limit  
Unit  
t
Maximum Propagation Delay  
10  
ns  
PLH PHL  
AC CHARACTERISTICS (V = 5.0 V 10%, t = t = 6 ns, C = 15 pF (unless otherwise noted))  
CC  
r
f
L
T
A
= 25°C  
T = −40°C to 85°C  
A
Typ  
12  
8
Guaranteed Limits  
Symbol  
, t  
Parameter  
Conditions  
Unit  
ns  
t
Maximum Propagation Delay  
Maximum Output Rise & Fall Time  
Power Dissipation Capacitance  
Maximum Input Capacitance  
20  
25  
19  
PLH PHL  
t
, t  
15  
ns  
THL TLH  
C
PD  
(Note 3)  
48  
5
pF  
pF  
C
IN  
10  
10  
3. C determines the no load dynamic power consumption, P = C  
V
2 f + I V , and the no load dynamic current consumption,  
CC CC  
PD  
D
PD CC  
I
S
= C  
V
f + I  
.
PD CC  
CC  
ORDERING INFORMATION  
Part Number  
Package  
Shipping  
MM74HCT32M  
SOIC−14, Case 751A−03  
(Pb−Free, Halide−Free)  
55 Units / Tube  
MM74HCT32MX  
SOIC−14, Case 751A−03  
(Pb−Free, Halide−Free)  
2500 Units / Tape & Reel  
2500 Units / Tape & Reel  
MM74HCT32MTCX  
TSSOP−14, Case 948G−01  
(Pb−Free, Halide Free)  
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging  
Specifications Brochure, BRD8011/D.  
www.onsemi.com  
3
 
MECHANICAL CASE OUTLINE  
PACKAGE DIMENSIONS  
SOIC14 NB  
CASE 751A03  
ISSUE L  
14  
1
DATE 03 FEB 2016  
SCALE 1:1  
NOTES:  
D
A
B
1. DIMENSIONING AND TOLERANCING PER  
ASME Y14.5M, 1994.  
2. CONTROLLING DIMENSION: MILLIMETERS.  
3. DIMENSION b DOES NOT INCLUDE DAMBAR  
PROTRUSION. ALLOWABLE PROTRUSION  
SHALL BE 0.13 TOTAL IN EXCESS OF AT  
MAXIMUM MATERIAL CONDITION.  
4. DIMENSIONS D AND E DO NOT INCLUDE  
MOLD PROTRUSIONS.  
14  
8
7
A3  
E
H
5. MAXIMUM MOLD PROTRUSION 0.15 PER  
SIDE.  
L
DETAIL A  
1
MILLIMETERS  
DIM MIN MAX  
INCHES  
MIN MAX  
13X b  
M
M
B
0.25  
A
A1  
A3  
b
D
E
1.35  
0.10  
0.19  
0.35  
8.55  
3.80  
1.75 0.054 0.068  
0.25 0.004 0.010  
0.25 0.008 0.010  
0.49 0.014 0.019  
8.75 0.337 0.344  
4.00 0.150 0.157  
M
S
S
B
0.25  
C A  
DETAIL A  
h
A
X 45  
_
e
H
h
L
1.27 BSC  
0.050 BSC  
6.20 0.228 0.244  
0.50 0.010 0.019  
1.25 0.016 0.049  
5.80  
0.25  
0.40  
0
0.10  
M
A1  
e
M
7
0
7
_
_
_
_
SEATING  
PLANE  
C
GENERIC  
MARKING DIAGRAM*  
SOLDERING FOOTPRINT*  
6.50  
14  
14X  
1.18  
XXXXXXXXXG  
AWLYWW  
1
1
XXXXX = Specific Device Code  
A
WL  
Y
= Assembly Location  
= Wafer Lot  
= Year  
1.27  
PITCH  
WW  
G
= Work Week  
= PbFree Package  
14X  
0.58  
*This information is generic. Please refer to  
device data sheet for actual part marking.  
PbFree indicator, “G” or microdot “G”, may  
or may not be present. Some products may  
not follow the Generic Marking.  
DIMENSIONS: MILLIMETERS  
*For additional information on our PbFree strategy and soldering  
details, please download the ON Semiconductor Soldering and  
Mounting Techniques Reference Manual, SOLDERRM/D.  
STYLES ON PAGE 2  
Electronic versions are uncontrolled except when accessed directly from the Document Repository.  
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.  
DOCUMENT NUMBER:  
DESCRIPTION:  
98ASB42565B  
SOIC14 NB  
PAGE 1 OF 2  
onsemi and  
are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves  
the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular  
purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation  
special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others.  
© Semiconductor Components Industries, LLC, 2019  
www.onsemi.com  
SOIC14  
CASE 751A03  
ISSUE L  
DATE 03 FEB 2016  
STYLE 1:  
STYLE 2:  
CANCELLED  
STYLE 3:  
STYLE 4:  
PIN 1. NO CONNECTION  
2. CATHODE  
PIN 1. COMMON CATHODE  
2. ANODE/CATHODE  
3. ANODE/CATHODE  
4. NO CONNECTION  
5. ANODE/CATHODE  
6. NO CONNECTION  
7. ANODE/CATHODE  
8. ANODE/CATHODE  
9. ANODE/CATHODE  
10. NO CONNECTION  
11. ANODE/CATHODE  
12. ANODE/CATHODE  
13. NO CONNECTION  
14. COMMON ANODE  
PIN 1. NO CONNECTION  
2. ANODE  
3. ANODE  
4. NO CONNECTION  
5. ANODE  
6. NO CONNECTION  
7. ANODE  
8. ANODE  
9. ANODE  
10. NO CONNECTION  
11. ANODE  
12. ANODE  
13. NO CONNECTION  
14. COMMON CATHODE  
3. CATHODE  
4. NO CONNECTION  
5. CATHODE  
6. NO CONNECTION  
7. CATHODE  
8. CATHODE  
9. CATHODE  
10. NO CONNECTION  
11. CATHODE  
12. CATHODE  
13. NO CONNECTION  
14. COMMON ANODE  
STYLE 5:  
STYLE 6:  
STYLE 7:  
STYLE 8:  
PIN 1. COMMON CATHODE  
2. ANODE/CATHODE  
3. ANODE/CATHODE  
4. ANODE/CATHODE  
5. ANODE/CATHODE  
6. NO CONNECTION  
7. COMMON ANODE  
8. COMMON CATHODE  
9. ANODE/CATHODE  
10. ANODE/CATHODE  
11. ANODE/CATHODE  
12. ANODE/CATHODE  
13. NO CONNECTION  
14. COMMON ANODE  
PIN 1. CATHODE  
2. CATHODE  
3. CATHODE  
4. CATHODE  
5. CATHODE  
6. CATHODE  
7. CATHODE  
8. ANODE  
PIN 1. ANODE/CATHODE  
2. COMMON ANODE  
3. COMMON CATHODE  
4. ANODE/CATHODE  
5. ANODE/CATHODE  
6. ANODE/CATHODE  
7. ANODE/CATHODE  
8. ANODE/CATHODE  
9. ANODE/CATHODE  
10. ANODE/CATHODE  
11. COMMON CATHODE  
12. COMMON ANODE  
13. ANODE/CATHODE  
14. ANODE/CATHODE  
PIN 1. COMMON CATHODE  
2. ANODE/CATHODE  
3. ANODE/CATHODE  
4. NO CONNECTION  
5. ANODE/CATHODE  
6. ANODE/CATHODE  
7. COMMON ANODE  
8. COMMON ANODE  
9. ANODE/CATHODE  
10. ANODE/CATHODE  
11. NO CONNECTION  
12. ANODE/CATHODE  
13. ANODE/CATHODE  
14. COMMON CATHODE  
9. ANODE  
10. ANODE  
11. ANODE  
12. ANODE  
13. ANODE  
14. ANODE  
Electronic versions are uncontrolled except when accessed directly from the Document Repository.  
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.  
DOCUMENT NUMBER:  
DESCRIPTION:  
98ASB42565B  
SOIC14 NB  
PAGE 2 OF 2  
onsemi and  
are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves  
the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular  
purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation  
special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others.  
© Semiconductor Components Industries, LLC, 2019  
www.onsemi.com  
MECHANICAL CASE OUTLINE  
PACKAGE DIMENSIONS  
TSSOP14 WB  
CASE 948G  
ISSUE C  
14  
DATE 17 FEB 2016  
1
SCALE 2:1  
NOTES:  
14X K REF  
1. DIMENSIONING AND TOLERANCING PER  
ANSI Y14.5M, 1982.  
M
S
S
V
0.10 (0.004)  
T U  
2. CONTROLLING DIMENSION: MILLIMETER.  
3. DIMENSION A DOES NOT INCLUDE MOLD  
FLASH, PROTRUSIONS OR GATE BURRS.  
MOLD FLASH OR GATE BURRS SHALL NOT  
EXCEED 0.15 (0.006) PER SIDE.  
4. DIMENSION B DOES NOT INCLUDE  
INTERLEAD FLASH OR PROTRUSION.  
INTERLEAD FLASH OR PROTRUSION SHALL  
NOT EXCEED 0.25 (0.010) PER SIDE.  
5. DIMENSION K DOES NOT INCLUDE DAMBAR  
PROTRUSION. ALLOWABLE DAMBAR  
PROTRUSION SHALL BE 0.08 (0.003) TOTAL  
IN EXCESS OF THE K DIMENSION AT  
MAXIMUM MATERIAL CONDITION.  
S
0.15 (0.006) T U  
N
0.25 (0.010)  
14  
8
2X L/2  
M
B
L
N
U−  
PIN 1  
IDENT.  
F
7
1
6. TERMINAL NUMBERS ARE SHOWN FOR  
REFERENCE ONLY.  
DETAIL E  
7. DIMENSION A AND B ARE TO BE  
DETERMINED AT DATUM PLANE W.  
S
K
0.15 (0.006) T U  
A
V−  
MILLIMETERS  
DIM MIN MAX  
INCHES  
MIN MAX  
K1  
A
B
C
D
F
G
H
J
4.90  
4.30  
−−−  
0.05  
0.50  
5.10 0.193 0.200  
4.50 0.169 0.177  
J J1  
1.20  
−−− 0.047  
0.15 0.002 0.006  
0.75 0.020 0.030  
SECTION NN  
0.65 BSC  
0.026 BSC  
0.60 0.020 0.024  
0.20 0.004 0.008  
0.16 0.004 0.006  
0.30 0.007 0.012  
0.25 0.007 0.010  
0.50  
0.09  
0.09  
0.19  
J1  
K
W−  
C
K1 0.19  
L
M
6.40 BSC  
0.252 BSC  
0.10 (0.004)  
0
8
0
8
_
_
_
_
SEATING  
PLANE  
T−  
H
G
DETAIL E  
D
GENERIC  
MARKING DIAGRAM*  
14  
SOLDERING FOOTPRINT  
XXXX  
XXXX  
ALYWG  
G
7.06  
1
1
A
L
= Assembly Location  
= Wafer Lot  
Y
W
G
= Year  
= Work Week  
= PbFree Package  
0.65  
PITCH  
(Note: Microdot may be in either location)  
*This information is generic. Please refer to  
device data sheet for actual part marking.  
PbFree indicator, “G” or microdot “G”, may  
or may not be present. Some products may  
not follow the Generic Marking.  
01.34X6  
14X  
1.26  
DIMENSIONS: MILLIMETERS  
Electronic versions are uncontrolled except when accessed directly from the Document Repository.  
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.  
DOCUMENT NUMBER:  
DESCRIPTION:  
98ASH70246A  
TSSOP14 WB  
PAGE 1 OF 1  
onsemi and  
are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves  
the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular  
purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation  
special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others.  
© Semiconductor Components Industries, LLC, 2019  
www.onsemi.com  
onsemi,  
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates  
and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.  
A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/PatentMarking.pdf. onsemi reserves the right to make changes at any time to any  
products or information herein, without notice. The information herein is provided “asis” and onsemi makes no warranty, representation or guarantee regarding the accuracy of the  
information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use  
of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products  
and applications using onsemi products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information  
provided by onsemi. “Typical” parameters which may be provided in onsemi data sheets and/or specifications can and do vary in different applications and actual performance may  
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