MMBT5551LT1 [ONSEMI]
High Voltage Transistors(NPN Silicon); 高压晶体管（ NPN硅）
| 型号： | MMBT5551LT1 |
| 厂家： | 
ONSEMI |
| 描述： | High Voltage Transistors(NPN Silicon) |
| 文件： | 总6页 (文件大小：202K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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by MMBT5550LT1/D
SEMICONDUCTOR TECHNICAL DATA
COLLECTOR
3
NPN Silicon
*Motorola Preferred Device
1
BASE
2
3
EMITTER
MAXIMUM RATINGS
1
Rating
Collector–Emitter Voltage
Collector–Base Voltage
Symbol
Value
Unit
Vdc
2
V
CEO
V
CBO
V
EBO
140
160
6.0
Vdc
CASE 318–08, STYLE 6
SOT–23 (TO–236AB)
Emitter–Base Voltage
Vdc
Collector Current — Continuous
THERMAL CHARACTERISTICS
Characteristic
I
600
mAdc
C
Symbol
Max
Unit
(1)
Total Device Dissipation FR–5 Board
P
225
mW
D
T
= 25°C
A
Derate above 25°C
1.8
556
300
mW/°C
°C/W
mW
Thermal Resistance, Junction to Ambient
Total Device Dissipation
R
JA
D
P
(2)
Alumina Substrate,
T
A
= 25°C
Derate above 25°C
2.4
417
mW/°C
°C/W
°C
Thermal Resistance, Junction to Ambient
Junction and Storage Temperature
DEVICE MARKING
R
JA
T , T
J stg
–55 to +150
MMBT5550LT1 = M1F; MMBT5551LT1 = G1
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
A
Characteristic
Symbol
Min
Max
Unit
OFF CHARACTERISTICS
(3)
Collector–Emitter Breakdown Voltage
V
Vdc
(BR)CEO
(I = 1.0 mAdc, I = 0)
MMBT5550
MMBT5551
140
160
—
—
C
B
Collector–Base Breakdown Voltage
(I = 100 Adc, I = 0)
V
Vdc
Vdc
(BR)CBO
MMBT5550
MMBT5551
160
180
—
—
C
E
Emitter–Base Breakdown Voltage
(I = 10 Adc, I = 0)
V
(BR)EBO
6.0
—
E
C
Collector Cutoff Current
I
CBO
(V
CB
(V
CB
(V
CB
(V
CB
= 100 Vdc, I = 0)
MMBT5550
MMBT5551
MMBT5550
MMBT5551
—
—
—
—
100
50
100
50
nAdc
E
= 120 Vdc, I = 0)
E
= 100 Vdc, I = 0, T = 100°C)
µAdc
E
A
A
= 120 Vdc, I = 0, T = 100°C)
E
Emitter Cutoff Current
(V = 4.0 Vdc, I = 0)
I
nAdc
EBO
—
50
EB
1. FR–5 = 1.0
C
0.75 0.062 in.
2. Alumina = 0.4 0.3 0.024 in. 99.5% alumina.
3. Pulse Test: Pulse Width = 300 s, Duty Cycle = 2.0%.
Thermal Clad is a trademark of the Bergquist Company
Preferred devices are Motorola recommended choices for future use and best overall value.
Motorola, Inc. 1996
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted) (Continued)
A
Characteristic
ON CHARACTERISTICS
Symbol
Min
Max
Unit
DC Current Gain
(I = 1.0 mAdc, V
C
h
FE
—
= 5.0 Vdc)
= 5.0 Vdc)
= 5.0 Vdc)
MMBT5550
MMBT5551
60
80
—
—
CE
CE
CE
(I = 10 mAdc, V
C
MMBT5550
MMBT5551
60
80
250
250
(I = 50 mAdc, V
C
MMBT5550
MMBT5551
20
30
—
—
Collector–Emitter Saturation Voltage
(I = 10 mAdc, I = 1.0 mAdc)
V
V
Vdc
Vdc
CE(sat)
Both Types
—
0.15
C
B
(I = 50 mAdc, I = 5.0 mAdc)
MMBT5550
MMBT5551
—
—
0.25
0.20
C
B
Base–Emitter Saturation Voltage
(I = 10 mAdc, I = 1.0 mAdc)
BE(sat)
Both Types
—
1.0
C
B
(I = 50 mAdc, I = 5.0 mAdc)
MMBT5550
MMBT5551
—
—
1.2
1.0
C
B
2
Motorola Small–Signal Transistors, FETs and Diodes Device Data
500
300
200
V
V
= 1.0 V
= 5.0 V
CE
CE
T
= 125°C
J
25°C
100
–55°C
50
30
20
10
7.0
5.0
0.1
0.2
0.3
0.5
0.7
1.0
3.0
, COLLECTOR CURRENT (mA)
2.0
5.0
7.0
10
20
30
50
70
100
I
C
Figure 1. DC Current Gain
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
I
= 1.0 mA
10 mA
100 mA
C
30 mA
0.005
0.01
0.02
0.05
0.1
0.2
0.5
1.0
2.0
5.0
10
20
50
I
, BASE CURRENT (mA)
B
Figure 2. Collector Saturation Region
1
10
1.0
T
= 25°C
J
V
= 30 V
CE
0
10
0.8
0.6
0.4
T
J
= 125°C
V
@ I /I = 10
C B
–1
BE(sat)
10
I
= I
CES
C
–2
–3
10
75
REVERSE
25
°C
FORWARD
10
°
C
0.2
0
–4
–5
10
V
@ I /I = 10
C B
CE(sat)
10
0.4
0.3
0.2
V
0.1
0
0.1
0.2
0.3
0.4
0.5
0.6
0.1
0.2 0.3 0.5
1.0
2.0 3.0 5.0
10
20 30 50
100
, BASE–EMITTER VOLTAGE (VOLTS)
I
, COLLECTOR CURRENT (mA)
BE
C
Figure 3. Collector Cut–Off Region
Figure 4. “On” Voltages
Motorola Small–Signal Transistors, FETs and Diodes Device Data
3
2.5
2.0
T
= –55°C to +135°C
J
1.5
1.0
0.5
0
V
F
V
BB
–8.8 V
CC
30 V
10.2 V
for V
CE(sat)
VC
V
in
100
R
3.0 k
R
C
V
0.25
µ
–0.5
–1.0
–1.5
–2.0
–2.5
10
µs
B
INPUT PULSE
out
5.1 k
100
for V
BE(sat)
VB
t , t
≤
10 ns
1N914
r
f
V
in
DUTY CYCLE = 1.0%
0.1
0.2 0.3 0.5
1.0
2.0 3.0 5.0
10
20 30 50
100
Values Shown are for I @ 10 mA
C
I
, COLLECTOR CURRENT (mA)
C
Figure 5. Temperature Coefficients
Figure 6. Switching Time Test Circuit
100
1000
500
I
T
/I = 10
C B
70
50
T
= 25°C
J
= 25°C
J
t @ V
CC
= 120 V
r
30
20
300
200
t @ V
r
= 30 V
CC
10
100
50
C
ibo
7.0
5.0
t
@ V = 1.0 V
EB(off)
d
C
obo
3.0
2.0
30
20
V
= 120 V
CC
1.0
0.2 0.3
10
0.5 0.7 1.0
2.0 3.0
5.0 7.0 10
20
0.2 0.3 0.5
1.0
2.0 3.0 5.0
10
20 30 50
100 200
V
, REVERSE VOLTAGE (VOLTS)
I
, COLLECTOR CURRENT (mA)
R
C
Figure 7. Capacitances
Figure 8. Turn–On Time
5000
I
T
/I = 10
t @ V
CC
= 120 V
C B
f
3000
2000
= 25°C
J
t @ V
CC
= 30 V
f
1000
500
300
t
@ V = 120 V
CC
s
200
100
50
0.2 0.3 0.5
1.0
2.0 3.0 5.0
10
20 30 50
100 200
I
, COLLECTOR CURRENT (mA)
C
Figure 9. Turn–Off Time
4
Motorola Small–Signal Transistors, FETs and Diodes Device Data
INFORMATION FOR USING THE SOT–23 SURFACE MOUNT PACKAGE
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS
Surface mount board layout is a critical portion of the total
design. The footprint for the semiconductor packages must
be the correct size to insure proper solder connection
interface between the board and the package. With the
correct pad geometry, the packages will self align when
subjected to a solder reflow process.
0.037
0.95
0.037
0.95
0.079
2.0
0.035
0.9
0.031
0.8
inches
mm
SOT–23
SOT–23 POWER DISSIPATION
The power dissipation of the SOT–23 is a function of the
SOLDERING PRECAUTIONS
pad size. This can vary from the minimum pad size for
soldering to a pad size given for maximum power dissipation.
Power dissipation for a surface mount device is determined
The melting temperature of solder is higher than the rated
temperature of the device. When the entire device is heated
to a high temperature, failure to complete soldering within a
short time could result in device failure. Therefore, the
following items should always be observed in order to
minimize the thermal stress to which the devices are
subjected.
by T
, the maximum rated junction temperature of the
, the thermal resistance from the device junction to
J(max)
die, R
θJA
ambient, and the operating temperature, T . Using the
A
values provided on the data sheet for the SOT–23 package,
P
can be calculated as follows:
D
•
•
Always preheat the device.
The delta temperature between the preheat and
soldering should be 100°C or less.*
T
– T
A
J(max)
P
=
D
R
θJA
•
When preheating and soldering, the temperature of the
leads and the case must not exceed the maximum
temperature ratings as shown on the data sheet. When
using infrared heating with the reflow soldering method,
the difference shall be a maximum of 10°C.
The values for the equation are found in the maximum
ratings table on the data sheet. Substituting these values into
the equation for an ambient temperature T of 25°C, one can
A
calculate the power dissipation of the device which in this
case is 225 milliwatts.
•
•
•
The soldering temperature and time shall not exceed
260°C for more than 10 seconds.
When shifting from preheating to soldering, the
maximum temperature gradient shall be 5°C or less.
After soldering has been completed, the device should
be allowed to cool naturally for at least three minutes.
Gradual cooling should be used as the use of forced
cooling will increase the temperature gradient and result
in latent failure due to mechanical stress.
150°C – 25°C
556°C/W
P
=
= 225 milliwatts
D
The 556°C/W for the SOT–23 package assumes the use
of the recommended footprint on a glass epoxy printed circuit
board to achieve a power dissipation of 225 milliwatts. There
are other alternatives to achieving higher power dissipation
from the SOT–23 package. Another alternative would be to
use a ceramic substrate or an aluminum core board such as
Thermal Clad . Using a board material such as Thermal
Clad, an aluminum core board, the power dissipation can be
doubled using the same footprint.
•
Mechanical stress or shock should not be applied during
cooling.
* Soldering a device without preheating can cause excessive
thermal shock and stress which can result in damage to the
device.
Motorola Small–Signal Transistors, FETs and Diodes Device Data
5
PACKAGE DIMENSIONS
NOTES:
A
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
L
2. CONTROLLING DIMENSION: INCH.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH THICKNESS. MINIMUM LEAD THICKNESS
IS THE MINIMUM THICKNESS OF BASE
MATERIAL.
3
S
B
1
2
INCHES
MIN MAX
MILLIMETERS
DIM
A
B
C
D
G
H
J
MIN
2.80
1.20
0.89
0.37
1.78
0.013
0.085
0.45
0.89
2.10
0.45
MAX
3.04
1.40
1.11
0.50
2.04
0.100
0.177
0.60
1.02
2.50
0.60
V
G
0.1102 0.1197
0.0472 0.0551
0.0350 0.0440
0.0150 0.0200
0.0701 0.0807
0.0005 0.0040
0.0034 0.0070
0.0180 0.0236
0.0350 0.0401
0.0830 0.0984
0.0177 0.0236
C
K
L
S
H
J
D
V
K
STYLE 6:
PIN 1. BASE
2. EMITTER
3. COLLECTOR
CASE 318–08
SOT–23 (TO–236AB)
ISSUE AE
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the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit,
andspecifically disclaims any and all liability, includingwithoutlimitationconsequentialorincidentaldamages. “Typical” parameters can and do vary in different
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associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part.
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MMBT5550LT1/D
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