MMDJ3N03BJTR2 [ONSEMI]
Plastic Power Transistors;
| 型号： | MMDJ3N03BJTR2 |
| 厂家： | 
ONSEMI |
| 描述： | Plastic Power Transistors |
| 文件： | 总7页 (文件大小：247K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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onsemi andꢀꢀꢀꢀꢀꢀꢀand other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or
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or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application
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Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. Other names and brands may be claimed as the property of others.
MMDJ3N03BJT
Plastic Power Transistors
SO−8 for Surface Mount Applications
• Collector −Emitter Sustaining Voltage — V
CEO(sus)
= 30 Vdc (Min) @ I = 10 mAdc
C
http://onsemi.com
• High DC Current Gain —
= 85 (Min) @ I = 0.8 Adc
h
FE
C
= 60 (Min) @ I = 3.0 Adc
C
DUAL BIPOLAR
POWER TRANSISTOR
NPN SILICON
• Low Collector −Emitter Saturation Voltage —
= 0.18 Vdc (Max) @ I = 1.2 Adc
V
CE(sat)
C
= 0.45 Vdc (Max) @ I = 3.0 Adc
C
30 VOLTS, 3 AMPERES
• Miniature SO−8 Surface Mount Package − Saves Board Space
(SO−8)
CASE 751−07
Style 16
1
2
3
4
8
7
6
5
Collector−1
Collector−1
Collector−2
Collector−2
Emitter−1
Base−1
Emitter−2
Base−2
Top View
Pinout
C
C
E
B
E
B
Schematic
© Semiconductor Components Industries, LLC, 2006
1
Publication Order Number:
August, 2006 − Rev. 5
MMDJ3N03BJT/D
MMDJ3N03BJT
MAXIMUM RATINGS (TC = 25°C unless otherwise noted)
Rating
Symbol
Value
45
Unit
Vdc
Vdc
Vdc
Adc
Collector−Base Voltage
Collector−Emitter Voltage
Emitter−Base Voltage
V
CB
V
CEO
30
V
EB
±6.0
Collector Current — Continuous
Collector Current — Peak
I
C
3.0
5.0
Base Current — Continuous
I
B
1.0
Adc
Operating and Storage Junction Temperature Range
THERMAL CHARACTERISTICS
Characteristic
T , T
–55 to +150
_C
J
stg
Symbol
Max
Unit
Thermal Resistance − Junction to Ambient on 1″ sq. (645 sq. mm)
Collector pad on FR−4 board material with one die operating.
Thermal Resistance − Junction to Ambient on 0.012″ sq. (7.6 sq. mm)
Collector pad on FR−4 board material with one die operating.
R
_C/W
θ
JA
100
185
Total Power Dissipation @ T = 25_C mounted on 1″ sq. (645 sq. mm)
P
D
A
Collector pad on FR−4 board material with one die operating.
Derate above 25_C
1.25
10
W
mW/_C
Maximum Temperature for Soldering
T
L
260
_C
ELECTRICAL CHARACTERISTICS (T = 25_C unless otherwise noted)
C
Characteristic
Symbol
Min
Typ
Max
Unit
OFF CHARACTERISTICS
Collector−Emitter Sustaining Voltage (I = 10 mAdc, I = 0 Adc)
V
CEO(sus)
30
—
—
—
—
Vdc
Vdc
C
B
Emitter−Base Voltage (I = 50 mAdc, I = 0 Adc)
V
6.0
E
C
EBO
CER
Collector Cutoff Current
(V = 25 Vdc, R = 200 W)
I
μAdc
—
—
—
—
20
200
CE
BE
(V = 25 Vdc, R = 200 W, T = 125°C)
CE
BE
J
Emitter Cutoff Current (V = 5.0 Vdc)
I
—
—
10
mAdc
BE
EBO
(1)
ON CHARACTERISTICS
Collector−Emitter Saturation Voltage
V
V
Vdc
CE(sat)
(I = 0.8 Adc, I = 20 mAdc)
—
—
—
0.105
—
—
0.15
0.18
0.45
C
B
(I = 1.2 Adc, I = 20 mAdc)
C
B
(I = 3.0 Adc, I = 0.3 Adc)
C
B
Base−Emitter Saturation Voltage (I = 3.0 Adc, I = 0.3 Adc)
—
—
—
—
1.25
1.10
Vdc
Vdc
—
C
B
BE(sat)
Base−Emitter On Voltage (I = 1.2 Adc, V = 4.0 Vdc)
V
BE(on)
C
CE
DC Current Gain
(I = 0.8 Adc, V = 1.0 Vdc)
h
FE
85
80
60
195
—
—
—
—
—
C
CE
(I = 1.2 Adc, V = 1.0 Vdc)
C
CE
(I = 3.0 Adc, V = 1.0 Vdc)
C
CE
DYNAMIC CHARACTERISTICS
Output Capacitance (V = 10 Vdc, I = 0 Adc, f = 1.0 MHz)
C
ob
—
—
85
135
—
pF
pF
CB
E
Input Capacitance (V = 8.0 Vdc)
C
200
EB
ib
(2)
Current−Gain — Bandwidth Product
f
T
MHz
(I = 500 mAdc, V = 10 Vdc, F
= 1.0 MHz)
—
72
—
C
CE
test
(1) Pulse Test: Pulse Width ≤ 300 μs, Duty Cycle ≤ 2%.
(2) f = |h | S f
T
FE
test
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2
MMDJ3N03BJT
0.25
1.00
0.75
0.20
0.15
0.10
I
C
= 3.0 A
I
C
= 1.2 A
0.50
1.2 A
0.8 A
0.8 A
0.5 A
0.25
0
0.25 A
0.05
0
0.5 A
0.25 A
1.0
0.1
0.1
10
100
1000
1.0
10
100
1000
I , BASE CURRENT (mA)
B
I , BASE CURRENT (mA)
B
Figure 1. Collector Saturation Region
Figure 2. Collector Saturation Region
1000
1000
150°C
150°C
25°C
25°C
100
100
−ꢀ55°C
−ꢀ55°C
V
= 4.0 V
V
= 1.0 V
CE
CE
10
10
1.0
10
0.1
1.0
10
I , COLLECTOR CURRENT (A)
C
I , COLLECTOR CURRENT (A)
C
Figure 3. DC Current Gain
Figure 4. DC Current Gain
10
1.0
I /I = 10
C B
V
BE(sat)
1.0
V
BE(sat)
0.1
V
0.1
CE(sat)
V
CE(sat)
I /I = 50
C B
0.01
0.01
1.0
10
0.1
1.0
10
I , COLLECTOR CURRENT (A)
C
I , COLLECTOR CURRENT (A)
C
Figure 5. “On” Voltages
Figure 6. “On” Voltages
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3
MMDJ3N03BJT
1000
1.2
0.8
−ꢀ55°C
100
10
25°C
C
ob
150°C
0.4
V
CE
= 4.0 V
0
0
0.1
1.0
10
0.1
1.0
10
100
I , COLLECTOR CURRENT (A)
C
V , REVERSE VOLTAGE (V)
R
Figure 7. VBE(on) Voltage
Figure 8. Capacitance
100
10
0.5 ms
1.0
5.0 ms
100 ms
0.1
V
f
= 10 V
CE
0.01
= 1.0 MHz
BONDING WIRE LIMIT
test
T = 25°C
A
THERMAL LIMIT (SINGLE PULSE)
SECONDARY BREAKDOWN LIMIT
0.001
10
0.1
1.0
I , COLLECTOR CURRENT (A)
10
0.1
1.0
, COLLECTOR−EMITTER VOLTAGE (V)
CE
10
100
V
C
Figure 9. Current−Gain Bandwidth Product
Figure 10. Active Region Safe Operating Area
There are two limitations on the power handling ability of
a transistor: average junction temperature and secondary
2.0
1.5
1.0
breakdown. Safe operating area curves indicate I − V
C
CE
limits of the transistor that must be observed for reliable
operation; i.e., the transistor must not be subjected to greater
dissipation than the curves indicate.
The data of Figure 10 is based on T
variable depending on conditions. Secondary breakdown
= 150_C; T is
J(pk)
C
pulse limits are valid for duty cycles to 10% provided T
J(pk)
T
A
v 150_C. T
may be calculated from the data in
J(pk)
Figure 12. At high case temperatures, thermal limitations
will reduce the power that can be handled to values less than
the limitations imposed by secondary breakdown.
0.5
0
25
50
75
100
125
15
T, TEMPERATURE (°C)
Figure 11. Power Derating
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4
MMDJ3N03BJT
1.0
0.1
D = 0.5
0.2
0.1
0.05
0.02
0.01
P
(pk)
0.01
R
θ
(t) = r(t) θ
JA
JA
θ
= 185°C/W
JA
SINGLE PULSE
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
t
1
0.001
READ TIME AT t
1
t
2
T
− T = P θ (t)
A (pk) JA
J(pk)
DUTY CYCLE, D = t /t
1 2
0.0001
0.0001
0.001
0.01
0.1
t, TIME (seconds)
1.0
10
100
1000
Figure 12. Thermal Response
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5
MMDJ3N03BJT
PACKAGE DIMENSIONS
SOIC−8 NB
CASE 751−07
ISSUE W
−X−
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
A
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE MOLD
PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER
SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN
EXCESS OF THE D DIMENSION AT MAXIMUM
MATERIAL CONDITION.
8
5
4
S
M
M
B
0.25 (0.010)
Y
1
K
−Y−
G
MILLIMETERS
INCHES
DIM MIN
MAX
5.00
4.00
1.75
0.51
MIN
MAX
0.197
0.157
0.069
0.020
A
B
C
D
G
H
J
4.80
3.80
1.35
0.33
0.189
0.150
0.053
0.013
C
N X 45
_
SEATING
PLANE
−Z−
1.27 BSC
0.050 BSC
0.10 (0.004)
0.10
0.19
0.40
0
0.25
0.25
1.27
8
0.004
0.010
0.010
0.050
8
0.007
0.016
0
M
J
H
D
K
M
N
S
_
_
_
_
0.25
5.80
0.50
6.20
0.010
0.228
0.020
0.244
M
S
S
X
0.25 (0.010)
Z
Y
STYLE 16:
PIN 1. EMITTER, DIE #1
2. BASE, DIE #1
3. EMITTER, DIE #2
4. BASE, DIE #2
5. COLLECTOR, DIE #2
6. COLLECTOR, DIE #2
7. COLLECTOR, DIE #1
8. COLLECTOR, DIE #1
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
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MMDJ3N03BJT/D
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