MMUN2113LT1 [ONSEMI]
PNP SILICON BIAS RESISTOR TRANSISTOR; PNP硅偏置电阻晶体管
| 型号： | MMUN2113LT1 |
| 厂家： | 
ONSEMI |
| 描述： | PNP SILICON BIAS RESISTOR TRANSISTOR |
| 文件： | 总12页 (文件大小：122K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MMUN2111LT1 Series
Preferred Devices
Bias Resistor Transistors
PNP Silicon Surface Mount Transistors
with Monolithic Bias Resistor Network
This new series of digital transistors is designed to replace a single
device and its external resistor bias network. The BRT (Bias Resistor
Transistor) contains a single transistor with a monolithic bias network
consisting of two resistors; a series base resistor and a base-emitter
resistor. The BRT eliminates these individual components by
integrating them into a single device. The use of a BRT can reduce
both system cost and board space. The device is housed in the SOT-23
package which is designed for low power surface mount applications.
http://onsemi.com
PIN 3
COLLECTOR
(OUTPUT)
PIN 1
BASE
(INPUT)
R1
R2
PIN 2
EMITTER
(GROUND)
• Simplifies Circuit Design
• Reduces Board Space
• Reduces Component Count
• The SOT-23 package can be soldered using wave or reflow. The
modified gull-winged leads absorb thermal stress during soldering
eliminating the possibility of damage to the die.
3
1
• Available in 8 mm embossed tape and reel. Use the Device Number
to order the 7 inch/3000 unit reel. Replace “T1” with “T3” in the
Device Number to order the 13 inch/10,000 unit reel.
2
SOT–23
CASE 318
STYLE 6
MAXIMUM RATINGS (T = 25°C unless otherwise noted)
A
Rating
Collector-Base Voltage
Collector-Emitter Voltage
Collector Current
Symbol
Value
50
Unit
Vdc
MARKING DIAGRAM
V
CBO
CEO
V
50
Vdc
I
C
100
mAdc
A6x
M
THERMAL CHARACTERISTICS
Characteristic
Symbol
Max
Unit
A6x
x
Page 2)
M
= Device Marking
= A – L (See
Total Device Dissipation
P
D
246 (Note 1.)
400 (Note 2.)
1.5 (Note 1.)
2.0 (Note 2.)
mW
T
= 25°C
A
Derate above 25°C
°C/W
°C/W
°C/W
°C
= Date Code
Thermal Resistance –
Junction-to-Ambient
R
508 (Note 1.)
311 (Note 2.)
θJA
DEVICE MARKING INFORMATION
See specific marking information in the device marking table
on page 2 of this data sheet.
Thermal Resistance –
Junction-to-Lead
R
174 (Note 1.)
208 (Note 2.)
θJL
Junction and Storage
Temperature Range
T , T
J stg
–55 to +150
Preferred devices are recommended choices for future use
and best overall value.
1. FR–4 @ Minimum Pad
2. FR–4 @ 1.0 x 1.0 inch Pad
Semiconductor Components Industries, LLC, 2001
1
Publication Order Number:
November, 2001 – Rev. 2
MMUN2111LT1/D
MMUN2111LT1 Series
DEVICE MARKING AND RESISTOR VALUES
Device
Package
Marking
R1 (K)
R2 (K)
Shipping
MMUN2111LT1
MMUN2111LT3
SOT–23
A6A
10
10
3000/Tape & Reel
10,000/Tape & Reel
MMUN2112LT1
MMUN2112LT3
SOT–23
SOT–23
SOT–23
SOT–23
SOT–23
SOT–23
SOT–23
SOT–23
SOT–23
SOT–23
A6B
A6C
A6D
A6E
A6F
A6G
A6H
A6J
A6K
A6L
22
47
22
47
47
∞
3000/Tape & Reel
10,000/Tape & Reel
MMUN2113LT1
MMUN2113LT3
3000/Tape & Reel
10,000/Tape & Reel
MMUN2114LT1
MMUN2114LT3
10
3000/Tape & Reel
10,000/Tape & Reel
MMUN2115LT1 (Note 3.)
MMUN2115LT3
10
3000/Tape & Reel
10,000/Tape & Reel
MMUN2116LT1 (Note 3.)
MMUN2116LT3
4.7
1.0
2.2
4.7
4.7
22
∞
3000/Tape & Reel
10,000/Tape & Reel
MMUN2130LT1 (Note 3.)
MMUN2130LT3
1.0
2.2
4.7
47
47
3000/Tape & Reel
10,000/Tape & Reel
MMUN2131LT1 (Note 3.)
MMUN2131LT3
3000/Tape & Reel
10,000/Tape & Reel
MMUN2132LT1 (Note 3.)
MMUN2132LT3
3000/Tape & Reel
10,000/Tape & Reel
MMUN2133LT1 (Note 3.)
MMUN2133LT3
3000/Tape & Reel
10,000/Tape & Reel
MMUN2134LT1 (Note 3.)
MMUN2134LT3
3000/Tape & Reel
10,000/Tape & Reel
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
A
Characteristic
Symbol
Min
Typ
Max
Unit
OFF CHARACTERISTICS
Collector-Base Cutoff Current (V
= 50 V, I = 0)
I
I
–
–
–
–
100
500
nAdc
nAdc
mAdc
CB
E
CBO
Collector-Emitter Cutoff Current (V
= 50 V, I = 0)
B
CE
CEO
Emitter-Base Cutoff Current
MMUN2111LT1
I
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
0.5
0.2
0.1
0.2
0.9
1.9
4.3
2.3
1.5
0.18
0.13
EBO
(V
EB
= 6.0 V, I = 0)
MMUN2112LT1
MMUN2113LT1
MMUN2114LT1
MMUN2115LT1
MMUN2116LT1
MMUN2130LT1
MMUN2131LT1
MMUN2132LT1
MMUN2133LT1
MMUN2134LT1
C
Collector-Base Breakdown Voltage (I = 10 µA, I = 0)
V
V
50
50
–
–
–
–
Vdc
Vdc
C
E
(BR)CBO
Collector-Emitter Breakdown Voltage (Note 4.)
(BR)CEO
(I = 2.0 mA, I = 0)
C
B
3. New devices. Updated curves to follow in subsequent data sheets.
4. Pulse Test: Pulse Width < 300 µs, Duty Cycle < 2.0%
http://onsemi.com
2
MMUN2111LT1 Series
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted) (Continued)
A
Characteristic
ON CHARACTERISTICS (Note 5.)
DC Current Gain
Symbol
Min
Typ
Max
Unit
MMUN2111LT1
MMUN2112LT1
MMUN2113LT1
MMUN2114LT1
MMUN2115LT1
MMUN2116LT1
MMUN2130LT1
MMUN2131LT1
MMUN2132LT1
MMUN2133LT1
MMUN2134LT1
h
FE
35
60
80
60
100
140
140
250
250
5.0
15
–
–
–
–
–
–
–
–
–
–
–
(V
CE
= 10 V, I = 5.0 mA)
C
80
160
160
3.0
8.0
15
27
140
130
80
80
Collector-Emitter Saturation Voltage
(I = 10 mA, I = 0.3 mA)
V
–
–
0.25
Vdc
Vdc
CE(sat)
C
E
(I = 10 mA, I = 5 mA) MMUN2130LT1/MMUN2131LT1
C
B
(I = 10 mA, I = 1 mA) MMUN2115LT1/MMUN2116LT1/
C
B
MMUN2132LT1/MMUN2133LT1/MMUN2134LT1
Output Voltage (on)
(V = 5.0 V, V = 2.5 V, R = 1.0 kΩ)
V
OL
MMUN2111LT1
MMUN2112LT1
MMUN2114LT1
MMUN2115LT1
MMUN2116LT1
MMUN2130LT1
MMUN2131LT1
MMUN2132LT1
MMUN2133LT1
MMUN2134LT1
MMUN2113LT1
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
CC
B
L
(V
CC
= 5.0 V, V = 3.5 V, R = 1.0 kΩ)
B L
Output Voltage (off)
V
OH
4.9
–
–
Vdc
(V
CC
(V
CC
= 5.0 V, V = 0.5 V, R = 1.0 kΩ)
B L
= 5.0 V, V = 0.25 V, R = 1.0 kΩ)
MMUN2115LT1
MMUN2116LT1
MMUN2131LT1
MMUN2132LT1
B
L
(V
CC
= 5.0 V, V = 0.050 V, R = 1.0 kΩ) MMUN2130LT1
B L
Input Resistor
MMUN2111LT1
MMUN2112LT1
MMUN2113LT1
MMUN2114LT1
MMUN2115LT1
MMUN2116LT1
MMUN2130LT1
MMUN2131LT1
MMUN2132LT1
MMUN2133LT1
MMUN2134LT1
R1
7.0
15.4
32.9
7.0
7.0
3.3
0.7
1.5
3.3
3.3
10
22
47
10
10
4.7
1.0
2.2
4.7
4.7
22
13
28.6
61.1
13
k Ω
13
6.1
1.3
2.9
6.1
6.1
28.6
15.4
Resistor Ratio MMUN2111LT1/MMUN2112LT1/MMUN2113LT1
MMUN2114LT1
R /R
0.8
0.17
–
1.0
0.21
–
1.2
0.25
–
1
2
MMUN2115LT1/MMUN2116LT1
MMUN2130LT1/MMUN2131LT1/MMUN2132LT1
MMUN2133LT1
0.8
0.055
1.0
0.1
1.2
0.185
5. Pulse Test: Pulse Width < 300 µs, Duty Cycle < 2.0%
http://onsemi.com
3
MMUN2111LT1 Series
TYPICAL ELECTRICAL CHARACTERISTICS
MMUN2111LT1
250
200
1
I /I Ă=Ă10
C B
T Ă=Ă-25°C
A
25°C
150
100
50
75°C
ā0.1
R
θJA
= 625°C/W
ā0.01
0
-50
0
50
100
150
20
0
ā40
ā60
ā80
50
ā50
T , AMBIENT TEMPERATURE (°C)
A
I , COLLECTOR CURRENT (mA)
C
Figure 1. Derating Curve
Figure 2. V
versus I
CE(sat) C
1000
4
3
V
CE
= 10 V
f = 1 MHz
= 0 V
l
E
T = 25°C
A
T Ă=Ă75°C
A
25°C
100
2
1
0
-25°C
10
1
10
100
0
10
20
30
40
I , COLLECTOR CURRENT (mA)
C
V , REVERSE BIAS VOLTAGE (VOLTS)
R
Figure 3. DC Current Gain
Figure 4. Output Capacitance
100
10
1
100
10
25°C
75°C
V
= 0.2 V
O
T Ă=Ă-25°C
A
T Ă=Ă-25°C
A
25°C
75°C
ā0.1
1
ā0.01
V
O
= 5 V
ā0.1
ā0.001
0
1
ā2
ā3
ā4
ā5
ā6
ā7
ā8
ā9
10
0
10
ā20
ā30
ā40
V , INPUT VOLTAGE (VOLTS)
in
I , COLLECTOR CURRENT (mA)
C
Figure 5. Output Current versus Input Voltage
Figure 6. Input Voltage versus Output Current
http://onsemi.com
4
MMUN2111LT1 Series
TYPICAL ELECTRICAL CHARACTERISTICS
MMUN2112LT1
1000
10
I /I Ă=Ă10
C B
V
CE
= 10 V
T Ă=Ă-25°C
A
25°C
75°C
T Ă=Ă75°C
A
1
25°C
-25°C
100
ā0.1
10
ā0.01
1
10
0
ā20
ā40
ā60
ā80
100
I , COLLECTOR CURRENT (mA)
C
I , COLLECTOR CURRENT (mA)
C
Figure 7. V
versus I
Figure 8. DC Current Gain
CE(sat)
C
4
3
2
100
10
1
25°C
75°C
f = 1 MHz
= 0 V
T Ă=Ă-25°C
A
l
E
T = 25°C
A
ā0.1
1
0
V
= 5 V
O
ā0.01
ā0.001
0
1
ā2
ā3
ā4
ā5
ā6
ā7
ā8
ā9
10
0
10
20
30
40
50
V , REVERSE BIAS VOLTAGE (VOLTS)
R
V , INPUT VOLTAGE (VOLTS)
in
Figure 9. Output Capacitance
Figure 10. Output Current versus Input Voltage
100
V
O
= 0.2 V
T Ă=Ă-25°C
A
25°C
10
75°C
1
ā0.1
0
10
ā20
ā30
ā40
ā50
I , COLLECTOR CURRENT (mA)
C
Figure 11. Input Voltage versus Output Current
http://onsemi.com
5
MMUN2111LT1 Series
TYPICAL ELECTRICAL CHARACTERISTICS
MMUN2113LT1
1
1000
I /I Ă=Ă10
C B
T Ă=Ă75°C
A
T Ă=Ă-25°C
A
25°C
25°C
-25°C
75°C
100
ā0.1
ā0.01
10
0
10
20
30
40
1
10
I , COLLECTOR CURRENT (mA)
100
I , COLLECTOR CURRENT (mA)
C
C
Figure 12. V
versus I
Figure 13. DC Current Gain
CE(sat)
C
1
100
T Ă=Ă75°C
25°C
A
f = 1 MHz
= 0 V
l
E
0.8
-25°C
10
1
T = 25°C
A
0.6
0.4
ā0.1
ā0.01
0.2
0
V
= 5 V
ā5
O
ā0.001
0
1
ā2
ā3
ā4
ā6
ā7
ā8
Ă9
10
0
10
20
30
40
50
V , REVERSE BIAS VOLTAGE (VOLTS)
R
V , INPUT VOLTAGE (VOLTS)
in
Figure 14. Output Capacitance
Figure 15. Output Current versus Input Voltage
100
V
O
= 2 V
T Ă=Ă-25°C
A
25°C
75°C
10
1
Ă0.1
0
10
ā20
30
ā40
ā50
I , COLLECTOR CURRENT (mA)
C
Figure 16. Input Voltage versus Output Current
http://onsemi.com
6
MMUN2111LT1 Series
TYPICAL ELECTRICAL CHARACTERISTICS
MMUN2114LT1
1
180
T Ă=Ă75°C
A
I /I Ă=Ă10
C B
V
CE
= 10 V
160
140
120
100
80
T Ă=Ă-25°C
A
25°C
-25°C
25°C
0.1
75°C
0.01
60
40
20
0.001
0
0
20
40
60
80
1
2
4
6
8
10 15 20 40 50 60 70 80 90 100
I , COLLECTOR CURRENT (mA)
C
I , COLLECTOR CURRENT (mA)
C
Figure 17. V
versus I
Figure 18. DC Current Gain
CE(sat)
C
4.5
4
100
10
1
T Ă=Ă75°C
A
f = 1 MHz
= 0 V
25°C
l
E
3.5
3
T = 25°C
A
-25°C
2.5
2
1.5
1
V
= 5 V
O
0.5
0
0
2
4
6
8
10 15 20 25 30 35 40 45 50
0
2
4
6
8
10
V , REVERSE BIAS VOLTAGE (VOLTS)
R
V , INPUT VOLTAGE (VOLTS)
in
Figure 19. Output Capacitance
Figure 20. Output Current versus Input Voltage
+12 V
10
T Ă=Ă-25°C
A
V
O
= 0.2 V
25°C
75°C
Typical Application
for PNP BRTs
1
LOAD
0.1
0
10
20
30
40
50
I , COLLECTOR CURRENT (mA)
C
Figure 21. Input Voltage versus Output Current
Figure 22. Inexpensive, Unregulated Current Source
http://onsemi.com
7
MMUN2111LT1 Series
INFORMATION FOR USING THE SOT–23 SURFACE MOUNT PACKAGE
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS
Surface mount board layout is a critical portion of the
total design. The footprint for the semiconductor packages
must be the correct size to insure proper solder connection
interface between the board and the package. With the
correct pad geometry, the packages will self align when
subjected to a solder reflow process.
0.037
0.95
0.037
0.95
0.079
2.0
0.035
0.9
0.031
0.8
inches
mm
SOT–23
SOT–23 POWER DISSIPATION
SOLDERING PRECAUTIONS
The power dissipation of the SOT–23 is a function of the
pad size. This can vary from the minimum pad size for
soldering to a pad size given for maximum power dissipa-
tion. Power dissipation for a surface mount device is deter-
The melting temperature of solder is higher than the
rated temperature of the device. When the entire device is
heated to a high temperature, failure to complete soldering
within a short time could result in device failure. There-
fore, the following items should always be observed in
order to minimize the thermal stress to which the devices
are subjected.
mined byT
of the die, R
, the maximum rated junction temperature
, the thermal resistance from the device
J(max)
θJA
junction to ambient, and the operating temperature, T .
A
Using the values provided on the data sheet for the SOT–23
package, P can be calculated as follows:
• Always preheat the device.
D
• The delta temperature between the preheat and
soldering should be 100°C or less.*
T
– T
A
J(max)
P
=
D
R
θJA
• When preheating and soldering, the temperature of the
leads and the case must not exceed the maximum
temperature ratings as shown on the data sheet. When
using infrared heating with the reflow soldering
method, the difference shall be a maximum of 10°C.
The values for the equation are found in the maximum
ratings table on the data sheet. Substituting these values
into the equation for an ambient temperature T of 25°C,
A
one can calculate the power dissipation of the device which
in this case is 225 milliwatts.
• The soldering temperature and time shall not exceed
260°C for more than 10 seconds.
150°C – 25°C
556°C/W
P
=
= 225 milliwatts
D
• When shifting from preheating to soldering, the
maximum temperature gradient shall be 5°C or less.
The 556°C/W for the SOT–23 package assumes the use
of the recommended footprint on a glass epoxy printed
circuit board to achieve a power dissipation of 225 milli-
watts. There are other alternatives to achieving higher
power dissipation from the SOT–23 package. Another
alternative would be to use a ceramic substrate or an
aluminum core board such as Thermal Clad . Using a
board material such as Thermal Clad, an aluminum core
board, the power dissipation can be doubled using the same
footprint.
• After soldering has been completed, the device should
be allowed to cool naturally for at least three minutes.
Gradual cooling should be used as the use of forced
cooling will increase the temperature gradient and
result in latent failure due to mechanical stress.
• Mechanical stress or shock should not be applied
during cooling.
* Soldering a device without preheating can cause exces-
sive thermal shock and stress which can result in damage
to the device.
http://onsemi.com
8
MMUN2111LT1 Series
SOLDER STENCIL GUIDELINES
Prior to placing surface mount components onto a printed
The stencil opening size for the surface mounted package
should be the same as the pad size on the printed circuit
board, i.e., a 1:1 registration.
circuit board, solder paste must be applied to the pads. A
solder stencil is required to screen the optimum amount of
solder paste onto the footprint. The stencil is made of brass
or stainless steel with a typical thickness of 0.008 inches.
TYPICAL SOLDER HEATING PROFILE
For any given circuit board, there will be a group of
control settings that will give the desired heat pattern. The
operator must set temperatures for several heating zones,
and a figure for belt speed. Taken together, these control
settings make up a heating “profile” for that particular
circuit board. On machines controlled by a computer, the
computer remembers these profiles from one operating
session to the next. Figure 7 shows a typical heating profile
for use when soldering a surface mount device to a printed
circuit board. This profile will vary among soldering
systems but it is a good starting point. Factors that can
affect the profile include the type of soldering system in
use, density and types of components on the board, type of
solder used, and the type of board or substrate material
being used. This profile shows temperature versus time.
The line on the graph shows the actual temperature that
might be experienced on the surface of a test board at or
near a central solder joint. The two profiles are based on a
high density and a low density board. The Vitronics
SMD310 convection/infrared reflow soldering system was
used to generate this profile. The type of solder used was
62/36/2 Tin Lead Silver with a melting point between
177–189°C. When this type of furnace is used for solder
reflow work, the circuit boards and solder joints tend to
heat first. The components on the board are then heated by
conduction. The circuit board, because it has a large surface
area, absorbs the thermal energy more efficiently, then
distributes this energy to the components. Because of this
effect, the main body of a component may be up to 30
degrees cooler than the adjacent solder joints.
STEP 5
HEATING
ZONES 4 & 7
SPIKE"
STEP 6 STEP 7
VENT COOLING
STEP 1
PREHEAT
ZONE 1
RAMP"
STEP 2
VENT
STEP 3
HEATING
STEP 4
HEATING
ZONES 3 & 6
SOAK"
SOAK" ZONES 2 & 5
RAMP"
205° TO 219°C
PEAK AT
SOLDER JOINT
200°C
150°C
170°C
DESIRED CURVE FOR HIGH
MASS ASSEMBLIES
160°C
150°C
SOLDER IS LIQUID FOR
40 TO 80 SECONDS
(DEPENDING ON
140°C
100°C
MASS OF ASSEMBLY)
100°C
50°C
DESIRED CURVE FOR LOW
MASS ASSEMBLIES
TIME (3 TO 7 MINUTES TOTAL)
T
MAX
Figure 23. Typical Solder Heating Profile
http://onsemi.com
9
MMUN2111LT1 Series
PACKAGE DIMENSIONS
SOT–23
TO–236AB
CASE 318–08
ISSUE AF
NOTES:
ąă1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
ąă2. CONTROLLING DIMENSION: INCH.
ąă3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH THICKNESS. MINIMUM LEAD THICKNESS
IS THE MINIMUM THICKNESS OF BASE
MATERIAL.
A
L
3
INCHES
DIM MIN MAX
MILLIMETERS
S
C
B
MIN
2.80
1.20
0.89
0.37
1.78
MAX
3.04
1.40
1.11
0.50
2.04
0.100
0.177
0.69
1.02
2.64
0.60
1
2
A
B
C
D
G
H
J
0.1102 0.1197
0.0472 0.0551
0.0350 0.0440
0.0150 0.0200
0.0701 0.0807
V
G
0.0005 0.0040 0.013
0.0034 0.0070 0.085
K
L
0.0140 0.0285
0.0350 0.0401
0.0830 0.1039
0.0177 0.0236
0.35
0.89
2.10
0.45
S
V
H
J
D
K
STYLE 6:
PIN 1. BASE
2. EMITTER
3. COLLECTOR
http://onsemi.com
10
MMUN2111LT1 Series
Notes
http://onsemi.com
11
MMUN2111LT1 Series
Thermal Clad is a trademark of the Bergquist Company.
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes
without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability,
including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be
validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others.
SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or
death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold
SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable
attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim
alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.
PUBLICATION ORDERING INFORMATION
Literature Fulfillment:
JAPAN: ON Semiconductor, Japan Customer Focus Center
4–32–1 Nishi–Gotanda, Shinagawa–ku, Tokyo, Japan 141–0031
Phone: 81–3–5740–2700
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303–675–2175 or 800–344–3860 Toll Free USA/Canada
Fax: 303–675–2176 or 800–344–3867 Toll Free USA/Canada
Email: ONlit@hibbertco.com
Email: r14525@onsemi.com
ON Semiconductor Website: http://onsemi.com
For additional information, please contact your local
Sales Representative.
N. American Technical Support: 800–282–9855 Toll Free USA/Canada
MMUN2111LT1/D
相关型号：
MMUN2113T3
Small Signal Bipolar Transistor, 0.1A I(C), 50V V(BR)CEO, 1-Element, PNP, Silicon, TO-236AB,
MOTOROLA
©2020 ICPDF网 联系我们和版权申明