NC7SP74L8X [ONSEMI]
TinyLogic ULP D 型触发器,带预置和清除;型号: | NC7SP74L8X |
厂家: | ONSEMI |
描述: | TinyLogic ULP D 型触发器,带预置和清除 逻辑集成电路 触发器 |
文件: | 总14页 (文件大小:351K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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January 2003
Revised January 2005
NC7SP74
TinyLogic ULP D-Type Flip-Flop with Preset and Clear
General Description
Features
■ Space saving US8 surface mount package
■ MicroPak Pb-Free leadless package
■ 0.9V to 3.6V VCC supply operation
The NC7SP74 is a single D-type CMOS Flip-Flop with pre-
set and clear from Fairchild’s Ultra Low Power (ULP)
Series of TinyLogic . Ideal for applications where battery
life is critical, this product is designed for ultra low power
consumption within the VCC operating range of 0.9V to
■ 3.6V overvoltage tolerant I/Os at VCC from 0.9V to 3.6V
■ tPD
3.6V.
The internal circuit is composed of a minimum of inverter
stages including the output buffer, to enable ultra low static
and dynamic power.
3.0 ns typ for 3.0V to 3.6V VCC
4.0 ns typ for 2.3V to 2.7V VCC
5.0 ns typ for 1.65V to 1.95V VCC
6.0 ns typ for 1.40V to 1.60V VCC
9.0 ns typ for 1.10V to 1.30V VCC
24.0 ns typ for 0.90V VCC
The NC7SP74, for lower drive requirements, is uniquely
designed for optimized power and speed, and is fabricated
with an advanced CMOS technology to achieve best in
class speed operation while maintaining extremely low
CMOS power dissipation.
The signal level applied to the D input is transferred to the
Q output during the positive going transition of the CLK
pulse.
■ Power-Off high impedance inputs and outputs
■ Static Drive (IOH/IOL
)
±2.6 mA @ 3.00V VCC
±2.1 mA @ 2.30V VCC
±1.5 mA @ 1.65V VCC
±1.0 mA @ 1.40V VCC
±0.5 mA @ 1.10V VCC
±20 µA
@ 0.9V VCC
■ Uses patented Quiet Series noise/EMI reduction
circuitry
■ Ultra low dynamic power
Ordering Code:
Product
Order
Package
Number
Code
Top Mark
P74
Package Description
Supplied As
Number
NC7SP74K8X MAB08A
NC7SP74L8X MAC08A
8-Lead US8, JEDEC MO-187, Variation CA 3.1mm Wide 3k Units on Tape and Reel
X9
Pb-Free 8-Lead MicroPak, 1.6 mm Wide
5k Units on Tape and Reel
Pb-Free package per JEDEC J-STD-020B.
Battery Life vs. V Supply Voltage
CC
TinyLogic ULP and ULP-A with up to 50% less power consumption can
extend your battery life significantly.
Battery Life = (Vbattery *Ibattery*.9)/(Pdevice)/24hrs/day
Where, Pdevice = (ICC * VCC) + (CPD + CL) * VCC2 * f
Assumes ideal 3.6V Lithium Ion battery with current rating of 900mAH and
derated 90% and device frequency at 10MHz, with CL = 15 pF load
TinyLogic is a registered trademark of Fairchild Semiconductor Corporation.
MicroPak and Quiet Series are trademarks of Fairchild Semiconductor Corporation.
© 2005 Fairchild Semiconductor Corporation
DS500820
www.fairchildsemi.com
Pin Descriptions
Logic Symbol
Pin Names
Description
Data Input
IEEE/IEC
D
CK
Clock Pulse Input
CLR
Q, Q
PR
Direct Clear Input
Flip-Flop Output
Direct Preset Input
Connection Diagrams
Truth Table
Pin Assignments for US8
Inputs
Outputs
Function
CLR
L
PR
H
L
D
X
X
X
L
CK
X
Q
L
Q
H
L
Clear
Preset
—
H
X
H
H
L
L
L
X
H
H
L
H
H
H
↑
—
H
H
↑
H
—
H
H
X
↓
Qn
Qn
No Change
H = HIGH Logic Level
L = LOW Logic Level
(Top View)
Q
n = No change in data
X = Immaterial
Z = High Impedance
↑ = Rising Edge
↓ = Falling edge
Pin One Orientation Diagram
AAA represents Product Code Top Mark - see ordering code
Note: Orientation of Top Mark determines Pin One location. Read the top
product code mark left to right, Pin One is the lower left pin (see diagram).
Pad Assignments for MicroPak
(Top Thru View)
www.fairchildsemi.com
2
Absolute Maximum Ratings(Note 1)
Recommended Operating
Conditions (Note 3)
−0.5V to +4.6V
Supply Voltage (VCC
DC Input Voltage (VIN
DC Output Voltage (VOUT
HIGH or LOW State (Note 2)
CC = 0V
DC Input Diode Current (IIK) VIN < 0V
DC Output Diode Current (IOK
)
)
−0.5V to +4.6V Power Supply
0.9V to 3.6V
0V to 3.6V
)
−0.5V to +7.0V Input Voltage (VIN
)
−0.5V to VCC +0.5V
−0.5V to 4.6V
±50 mA
Output Voltage (VOUT
)
V
HIGH or LOW State
CC = 0V
Output Current in (IOH/IOL
0V to VCC
0V to 3.6V
V
)
)
V
V
OUT < 0V
−50 mA
+50 mA
± 50 mA
V
V
V
V
V
V
CC = 3.0V to 3.6V
CC = 2.3V to 2.7V
CC = 1.65V to 1.95V
CC = 1.40V to 1.60V
CC = 1.10V to 1.30V
CC = 0.9V
±2.6 mA
±2.1 mA
OUT > VCC
DC Output Source/Sink Current (IOH/IOL
DC VCC or Ground Current per
Supply Pin (ICC or Ground)
)
±1.5 mA
±1.0 mA
±50 mA
±0.5 mA
Storage Temperature Range (TSTG
)
−65°C to +150°C
±20 µA
Free Air Operating Temperature (TA)
−40°C to +85°C
Minimum Input Edge Rate (∆t/∆V)
V
IN = 0.8V to 2.0V, VCC = 3.0V
10 ns/V
Note 1: Absolute Maximum Ratings: are those values beyond which the
safety of the device cannot be guaranteed. The device should not be oper-
ated at these limits. The parametric values defined in the Electrical Charac-
teristics tables are not guaranteed at the absolute maximum ratings. The
“Recommended Operating Conditions” table will define the conditions for
actual device operation.
Note 2: IO Absolute Maximum rating must be observed.
Note 3: Unused inputs must be held HIGH or LOW. They may not float.
DC Electrical Characteristics
VCC
T
A = +25°C
TA = −40°C to +85°C
Symbol
VIH
Parameter
Units
Conditions
(V)
Min
Max
Min
Max
HIGH Level
0.90
0.65 x VCC
0.65 x VCC
0.65 x VCC
0.65 x VCC
0.65 x VCC
1.6
Input Voltage
1.10 ≤ VCC ≤ 1.30 0.65 x VCC
1.40 ≤ VCC ≤ 1.60 0.65 x VCC
1.65 ≤ VCC ≤ 1.95 0.65 x VCC
V
2.30 ≤ VCC ≤ 2.70
3.00 ≤ VCC ≤ 3.60
0.90
1.6
2.1
2.1
VIL
LOW Level
0.35 x VCC
0.35 x VCC
0.35 x VCC
0.35 x VCC
0.7
0.35 x VCC
0.35 x VCC
0.35 x VCC
0.35 x VCC
0.7
Input Voltage
1.10 ≤ VCC ≤ 1.30
1.40 ≤ VCC ≤ 1.60
1.65 ≤ VCC ≤ 1.95
2.30 ≤ VCC ≤ 2.70
3.00 ≤ VCC ≤ 3.60
0.90
V
0.9
0.9
VOH
HIGH Level
VCC - 0.1
VCC - 0.1
VCC - 0.1
VCC - 0.1
VCC - 0.1
VCC - 0.1
VCC - 0.1
0.70 x VCC
0.99
Output Voltage
1.10 ≤ VCC ≤ 1.30 VCC - 0.1
1.40 ≤ VCC ≤ 1.60 VCC - 0.1
1.65 ≤ VCC ≤ 1.95 VCC - 0.1
2.30 ≤ VCC ≤ 2.70 VCC - 0.1
3.00 ≤ VCC ≤ 3.60 VCC - 0.1
1.10 ≤ VCC ≤ 1.30 0.75 x VCC
I
OH = −20 µA
V
I
OH = −0.5 mA
OH = −1.0 mA
OH = −1.5 mA
OH = −2.1 mA
OH = −2.6 mA
1.40 ≤ VCC ≤ 1.60
1.65 ≤ VCC ≤ 1.95
2.30 ≤ VCC ≤ 2.70
3.00 ≤ VCC ≤ 3.60
1.07
1.24
1.95
2.61
I
1.22
I
1.87
I
2.55
I
3
www.fairchildsemi.com
DC Electrical Characteristics (Continued)
VCC
T
A = +25°C
Max
TA = −40°C to +85°C
Symbol
VOL
Parameter
LOW Level
Units
Conditions
(V)
Min
Min
Max
0.1
0.90
0.1
0.1
Output Voltage
1.10 ≤ VCC ≤ 1.30
1.40 ≤ VCC ≤ 1.60
1.65 ≤ VCC ≤ 1.95
2.30 ≤ VCC ≤ 2.70
3.00 ≤ VCC ≤ 3.60
1.10 ≤ VCC ≤ 1.30
1.40 ≤ VCC ≤ 1.60
1.65 ≤ VCC ≤ 1.95
2.30 ≤ VCC ≤ 2.70
3.00 ≤ VCC ≤ 3.60
0.90 to 3.60
0.1
0.1
0.1
I
OL = 20 µA
0.1
0.1
0.1
0.1
0.1
0.1
V
0.30 x VCC
0.31
0.31
0.31
0.31
±0.1
0.5
0.30 x VCC
0.37
0.35
0.33
0.33
±0.5
0.5
IOL
IOL
=
=
0.5 mA
1.0 mA
I
I
I
OL = 1.5 mA
OL = 2.1 mA
OL = 2.6 mA
IIN
Input Leakage Current
µA
µA
µA
0 ≤ VI ≤ 3.6V
IOFF
ICC
Power Off Leakage Current
Quiescent Supply Current
0
0 ≤ (VI, VO) ≤ 3.6V
VI = VCC or GND
0.90 to 3.60
0.9
0.9
www.fairchildsemi.com
4
AC Electrical Characteristics (10pF, 1MΩ)
VCC
T
A = +25°C
TA = −40°C to +85°C
Figure
Number
Symbol
Parameter
Units
Conditions
(V)
Min
Typ
Max
Min
Max
fMAX
Maximum Clock
Frequency
0.90
40.0
1.10 ≤ VCC ≤ 1.30
1.40 ≤ VCC ≤ 1.60
1.65 ≤ VCC ≤ 1.95
2.30 ≤ VCC ≤ 2.70
3.00 ≤ VCC ≤ 3.60
0.90
50
75
50
75
C
R
L = 10 pF
D = 1 MΩ
Figures
1, 5
MHz
100
125
150
100
125
150
tPLH
tPHL
Propagation Delay
CK to Q, Q
24.0
15.0
9.0
1.10 ≤ VCC ≤ 1.30
1.40 ≤ VCC ≤ 1.60
1.65 ≤ VCC ≤ 1.95
2.30 ≤ VCC ≤ 2.70
3.00 ≤ VCC ≤ 3.60
0.90
4.0
2.0
1.5
1.0
1.0
22.0
13.0
11.0
8.0
3.5
1.5
1.0
0.8
0.5
31.0
14.0
13.0
9.0
C
L = 10 pF
D = 1 MΩ
Figures
1, 3
ns
ns
ns
ns
ns
ns
7.0
R
5.0
4.0
7.0
8.0
tPLH
tPHL
Propagation Delay
CLR, PR, to Q, Q
6.5
1.10 ≤ VCC ≤ 1.30
1.40 ≤ VCC ≤ 1.60
1.65 ≤ VCC ≤ 1.95
2.30 ≤ VCC ≤ 2.70
3.00 ≤ VCC ≤ 3.60
0.90
4.0
2.0
1.5
1.0
1.0
12.0
9.0
23.0
12.0
11.0
9.0
4.0
2.0
1.5
1.0
1.0
34.0
14.0
13.0
9.0
C
L = 10 pF
D = 1 MΩ
Figures
1, 3
7.0
R
5.0
4.0
7.0
8.0
tS
Setup Time,
CK to D
10.0
1.10 ≤ VCC ≤ 1.30
1.40 ≤ VCC ≤ 1.60
1.65 ≤ VCC ≤ 1.95
2.30 ≤ VCC ≤ 2.70
3.00 ≤ VCC ≤ 3.60
0.90
7.0
3.0
2.0
1.5
1.0
7.0
3.0
2.0
1.5
1.0
C
L = 10 pF
D = 1 MΩ
Figures
1, 4
R
tH
Hold Time,
CK to D
1.0
1.10 ≤ VCC ≤ 1.30
1.40 ≤ VCC ≤ 1.60
1.65 ≤ VCC ≤ 1.95
2.30 ≤ VCC ≤ 2.70
3.00 ≤ VCC ≤ 3.60
0.90
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
C
L = 10 pF
D = 1 MΩ
Figures
1, 4
R
tW
Pulse Width,
CK, PR, CLR
5.0
1.10 ≤ VCC ≤ 1.30
1.40 ≤ VCC ≤ 1.60
1.65 ≤ VCC ≤ 1.95
2.30 ≤ VCC ≤ 2.70
3.00 ≤ VCC ≤ 3.60
0.90
5.0
3.0
2.5
2.5
2.0
5.0
3.0
2.5
2.5
2.0
C
L = 10 pF
D = 1 MΩ
Figures
1, 5
R
tREC
Recover Time
CLR, PR to CK
12.0
1.10 ≤ VCC ≤ 1.30
1.40 ≤ VCC ≤ 1.60
1.65 ≤ VCC ≤ 1.95
2.30 ≤ VCC ≤ 2.70
3.00 ≤ VCC ≤ 3.60
8.5
3.5
3.0
2.5
2.0
8.5
3.5
3.0
2.5
2.0
C
L = 10 pF
D = 1 MΩ
Figures
1, 4
R
5
www.fairchildsemi.com
AC Electrical Characteristics (15pF, 1MΩ)
VCC
T
A = +25°C
TA = −40°C to +85°C
Figure
Number
Symbol
Parameter
Units
Conditions
(V)
Min
Typ
Max
Min
Max
fMAX
Maximum Clock
Frequency
0.90
40.0
1.10 ≤ VCC ≤ 1.30
1.40 ≤ VCC ≤ 1.60
1.65 ≤ VCC ≤ 1.95
2.30 ≤ VCC ≤ 2.70
3.00 ≤ VCC ≤ 3.60
0.90
50
75
150
200
250
175
200
C
L = 15 pF
D = 1 MΩ
Figures
1, 5
MHz
100
125
150
R
tPLH
tPHL
Propagation Delay
CK to Q, Q
27.0
16.0
10.0
7.0
1.10 ≤ VCC ≤ 1.30
1.40 ≤ VCC ≤ 1.60
1.65 ≤ VCC ≤ 1.95
2.30 ≤ VCC ≤ 2.70
3.00 ≤ VCC ≤ 3.60
0.90
5.0
3.0
2.0
1.5
1.0
23.0
14.0
11.0
8.0
4.5
2.5
2.0
1.0
0.5
34.0
16.0
13.0
9.0
C
L = 15 pF
D = 1 MΩ
Figures
1, 3
ns
ns
ns
ns
ns
ns
R
5.0
4.0
7.0
8.0
tPLH
tPHL
Propagation Delay
CLR, PR, to Q, Q
27.0
15.0
10.0
7.0
1.10 ≤ VCC ≤ 1.30
1.40 ≤ VCC ≤ 1.60
1.65 ≤ VCC ≤ 1.95
2.30 ≤ VCC ≤ 2.70
3.00 ≤ VCC ≤ 3.60
0.90
5.0
3.0
2.0
1.5
1.0
24.0
13.0
11.0
9.0
5.0
3.0
2.0
1.5
1.0
37.0
16.0
13.0
9.0
C
L = 15 pF
D = 1 MΩ
Figures
1, 3
R
5.0
4.0
7.0
8.0
tS
Setup Time,
CK to D
10.0
1.10 ≤ VCC ≤ 1.30
1.40 ≤ VCC ≤ 1.60
1.65 ≤ VCC ≤ 1.95
2.30 ≤ VCC ≤ 2.70
3.00 ≤ VCC ≤ 3.60
0.90
7.0
3.0
2.0
1.5
1.0
7.0
3.0
2.0
1.5
1.0
C
R
L = 15 pF
D = 1 MΩ
Figures
1, 4
tH
Hold Time,
CK to D
1.0
1.10 ≤ VCC ≤ 1.30
1.40 ≤ VCC ≤ 1.60
1.65 ≤ VCC ≤ 1.95
2.30 ≤ VCC ≤ 2.70
3.00 ≤ VCC ≤ 3.60
0.90
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
C
R
L = 15 pF
D = 1 MΩ
Figures
1, 4
tW
Pulse Width,
CK, PR, CLR
5.0
1.10 ≤ VCC ≤ 1.30
1.40 ≤ VCC ≤ 1.60
1.65 ≤ VCC ≤ 1.95
2.30 ≤ VCC ≤ 2.70
3.00 ≤ VCC ≤ 3.60
0.90
5.0
3.0
2.5
2.5
2.0
5.0
3.0
2.5
2.5
2.0
C
R
L = 15 pF
D = 1 MΩ
Figures
1, 5
tREC
Recover Time
CLR, PR to CK
12.0
1.10 ≤ VCC ≤ 1.30
1.40 ≤ VCC ≤ 1.60
1.65 ≤ VCC ≤ 1.95
2.30 ≤ VCC ≤ 2.70
3.00 ≤ VCC ≤ 3.60
8.5
3.5
3.0
2.5
2.0
8.5
3.5
3.0
2.5
2.0
C
R
L = 15 pF
D = 1 MΩ
Figures
1, 4
www.fairchildsemi.com
6
AC Electrical Characteristics (30pF, 1MΩ)
VCC
T
A = +25°C
TA = −40°C to +85°C
Figure
Number
Symbol
Parameter
Units
Conditions
(V)
Min
Typ
Max
Min
Max
fMAX
Maximum Clock
Frequency
0.90
40.0
1.10 ≤ VCC ≤ 1.30
1.40 ≤ VCC ≤ 1.60
1.65 ≤ VCC ≤ 1.95
2.30 ≤ VCC ≤ 2.70
3.00 ≤ VCC ≤ 3.60
0.90
50
75
150
200
250
175
200
C
L = 30 pF
D = 1 MΩ
Figures
1, 5
MHz
100
125
150
R
tPLH
tPHL
Propagation Delay
CK to Q, Q
34.0
18.0
11.0
8.0
1.10 ≤ VCC ≤ 1.30
1.40 ≤ VCC ≤ 1.60
1.65 ≤ VCC ≤ 1.95
2.30 ≤ VCC ≤ 2.70
3.00 ≤ VCC ≤ 3.60
0.90
6.0
4.0
2.0
1.0
0.8
27.0
17.0
13.0
10.0
8.0
5.0
3.0
2.0
1.0
0.5
43.0
18.0
15.0
11.0
10.0
C
L = 30 pF
D = 1 MΩ
Figures
1, 3
ns
ns
ns
ns
ns
ns
R
6.0
5.0
tPLH
tPHL
Propagation Delay
CLR, PR, to Q, Q
34.0
17.0
11.0
8.0
1.10 ≤ VCC ≤ 1.30
1.40 ≤ VCC ≤ 1.60
1.65 ≤ VCC ≤ 1.95
2.30 ≤ VCC ≤ 2.70
3.00 ≤ VCC ≤ 3.60
0.90
6.0
4.0
2.0
1.0
0.8
28.0
16.0
13.0
9.0
5.5
3.5
2.5
1.5
1.0
46.0
18.0
15.0
11.0
10.0
C
L = 30 pF
D = 1 MΩ
Figures
1, 3
R
6.0
5.0
8.0
tS
Setup Time,
CK to D
10.0
1.10 ≤ VCC ≤ 1.30
1.40 ≤ VCC ≤ 1.60
1.65 ≤ VCC ≤ 1.95
2.30 ≤ VCC ≤ 2.70
3.00 ≤ VCC ≤ 3.60
0.90
7.0
3.0
2.0
1.5
1.0
7.0
3.0
2.0
1.5
1.0
C
L = 30 pF
D = 1 MΩ
Figures
1, 4
R
tH
Hold Time,
CK to D
1.0
1.10 ≤ VCC ≤ 1.30
1.40 ≤ VCC ≤ 1.60
1.65 ≤ VCC ≤ 1.95
2.30 ≤ VCC ≤ 2.70
3.00 ≤ VCC ≤ 3.60
0.90
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
C
L = 30 pF
D = 1 MΩ
Figures
1, 4
R
tW
Pulse Width,
CK, PR, CLR
5.0
1.10 ≤ VCC ≤ 1.30
1.40 ≤ VCC ≤ 1.60
1.65 ≤ VCC ≤ 1.95
2.30 ≤ VCC ≤ 2.70
3.00 ≤ VCC ≤ 3.60
0.90
5.0
3.0
2.5
2.5
2.0
4.0
3.0
2.0
3.0
2.0
C
L = 30 pF
D = 1 MΩ
Figures
1, 5
R
tREC
Recover Time
CLR, PR to CK
12.0
1.10 ≤ VCC ≤ 1.30
1.40 ≤ VCC ≤ 1.60
1.65 ≤ VCC ≤ 1.95
2.30 ≤ VCC ≤ 2.70
3.00 ≤ VCC ≤ 3.60
8.5
3.5
3.0
2.5
2.0
8.5
3.5
3.0
2.5
2.0
C
L = 30 pF
D = 1 MΩ
Figures
1, 4
R
Capacitance
Figure
Number
Symbol
Parameter
Typ
Max
Units
Conditions
CIN
Input Capacitance
Output Capacitance
Power Dissipation Capacitance
2.0
4.0
pF
pF
V
CC = 0V
CC = 0V
COUT
CPD
V
VI = 0V or VCC
f = 10 MHz
8.0
pF
Figure 2
7
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AC Loading and Waveforms
CP Input = AC Waveform; tr = tf = 2.5 ns;
CL includes load and stray capacitance
CP Input PRR = 10 MHz; Duty Cycle = 50%
D Input PRR = 5MHz; Duty Cycle = 50%
Input PRR = 1.0 MHz; tw = 500 ns
FIGURE 1. AC Test Circuit
FIGURE 2. ICCD Test Circuit
FIGURE 3. AC Waveforms
FIGURE 4. AC Waveforms
FIGURE 5. AC Waveforms
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8
Tape and Reel Specification
TAPE FORMAT for US8
Package
Tape
Number
Cavities
125 (typ)
3000
Cavity
Status
Empty
Filled
Cover Tape
Status
Designator
Section
Leader (Start End)
Sealed
K8X
Carrier
Sealed
Trailer (Hub End)
75 (typ)
Empty
Sealed
TAPE DIMENSIONS inches (millimeters)
TAPE FORMAT for MicroPak
Package
Tape
Number
Cavities
125 (typ)
3000
Cavity
Status
Empty
Filled
Cover Tape
Status
Designator
Section
Leader (Start End)
Sealed
L8X
Carrier
Sealed
Trailer (Hub End)
75 (typ)
Empty
Sealed
TAPE DIMENSIONS inches (millimeters)
9
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Tape and Reel Specification (Continued)
REEL DIMENSIONS inches (millimeters)
Tape
Size
A
B
C
D
N
W1
W2
W3
7.0
0.059
0.512
0.795
2.165 0.331 + 0.059/−0.000
0.567
W1 + 0.078/−0.039
(W1 + 2.00/−1.00)
8 mm
(177.8) (1.50) (13.00) (20.20) (55.00) (8.40 + 1.50/−0.00)
(14.40)
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10
Physical Dimensions inches (millimeters) unless otherwise noted
8-Lead US8, JEDEC MO-187, Variation CA 3.1mm Wide
Package Number MAB08A
11
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
Pb-Free 8-Lead MicroPak, 1.6 mm Wide
Package Number MAC08A
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
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user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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