NC7SV74L8X [ONSEMI]
带预设和清零功能的 TinyLogic ULP-A D 型触发器;
| 型号： | NC7SV74L8X |
| 厂家： | 
ONSEMI |
| 描述： | 带预设和清零功能的 TinyLogic ULP-A D 型触发器 逻辑集成电路 触发器 |
| 文件： | 总13页 (文件大小：539K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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September 2013
NC7SV74
TinyLogic® ULP-A D-Type Flip-Flop
with Preset and Clear
Features
General Description
•
•
•
Space-saving US8 surface-mount package
MicroPak™ Pb-free leadless package
The NC7SV74 is a single D-type CMOS flip-flop with preset
and clear from Fairchild's Ultra Low Power-A (ULP-A) series
of TinyLogic products‚ in space-saving US8 and MicroPak™
packages. ULP-A is ideal for applications that require
extreme high speed, high drive, and low power.
0.9V to 3.6V V supply operation
CC
•
•
3.6V over-voltage tolerant I/Os at V from 0.9V to 3.6V
CC
Extremely High Speed t
PD
1.0 ns typ for 2.7V to 3.6V V
CC
This product is designed for a wide low-voltage operating
range (0.9V to 3.6V V ) and applications that require more
CC
1.2 ns typ for 2.3V to 2.7V V
CC
drive and speed than the TinyLogic ULP series, but still
require low power consumption.
1.9 ns typ for 1.65V to 1.95V V
CC
3.2 ns typ for 1.4V to 1.6V V
6.0 ns typ for 1.1V to 1.3V V
CC
CC
The NC7SV74 is uniquely designed for optimized power and
speed, and is fabricated with an advanced CMOS technol-
ogy to achieve high-speed operation while maintaining low
CMOS power dissipation.
13.0 ns typ for 0.9V V
CC
•
•
Power-off high-impedance inputs and outputs
The signal level applied to the D input is transferred to the Q
output during the positive-going transition of the CLK pulse.
High static drive (I /I
)
OH OL
±24.0 mA @ 3.00V V
±18.0 mA @ 2.30V V
CC
CC
CC
Battery Life vs. VCC Supply Voltage
±6.0 mA
±4.0 mA
±2.0 mA
±0.1 mA
@ 1.65V V
@ 1.4V V
@ 1.1V V
@ 0.9V V
CC
CC
CC
•
Ultra low dynamic power
TinyLogic® is a registered trademark of Fairchild Semiconductor
Corporation.
MicroPak™ and Quiet Series™ are trademarks of Fairchild Semicon-
ductor Corporation.
TinyLogic ULP and ULP-A with up to 50% less power
consumption can extend your battery life significantly.
Battery Life = (V
*I
*.9)/(P
)/24hrs/day
2
battery battery
device
where: P
= (I * V ) + (C + C ) * V
* f
device
CC
CC
PD
L
CC
Assumes ideal 3.6V Lithium Ion battery with current rating of
900mAH and derated 90% and device frequency at 10MHz, with C
L
= 15 pF load.
Ordering Information
Product
Order
Number
Package
Code
Package Description
Supplied As
Number Top Mark
NC7SV74K8X
NC7SV74L8X
MAB08A
MAC08A
V74
Z4
8-Lead US8, JEDEC MO-187, Variation CA 3.1mm Wide 3k Units on Tape and Reel
Pb-Free 8-Lead MicroPak, 1.6 mm Wide
5k Units on Tape and Reel
Pb-Free package per JEDEC J-STD-020B.
© 2003 Fairchild Semiconductor Corporation
NC7SV74 • Rev. 3.0.0
www.fairchildsemi.com
1
Pin Descriptions
Logic Symbol/s
IEEE/IEC
Pin Names
Description
Data Input
D
CK
Clock Pulse Input
Direct Clear Input
Flip-Flop Output
Direct Preset Input
CLR
Q, Q
PR
Connection Diagram/s
Truth Table/s
Pin Assignments for US8
Inputs
Outputs
Function
CLR
L
PR
H
L
D
X
X
X
L
CK
X
X
X
-
Q
L
Q
H
L
Clear
Preset
—
H
H
H
L
L
L
H
H
L
H
H
H
H
—
H
H
X
-
H
—
H
¯
Q
Q
No Change
n
n
H = HIGH Logic Level
L = LOW Logic Level
Q
= No change in data
n
X = Immaterial
Z = High Impedance
- = Rising Edge
¯ = Falling edge
(Top View)
Pin One Orientation Diagram
AAA represents Product Code Top Mark - see ordering info
Note: Orientation of Top Mark determines Pin One loca-
tion. Read the top product code mark left to right, Pin One
is the lower left pin (see diagram).
Pad Assignments for MicroPak
(Top Through View)
© 2003 Fairchild Semiconductor Corporation
NC7SV74 • Rev. 3.0.0
www.fairchildsemi.com
2
Absolute Maximum Ratings
Absolute Maximum Ratings: are those values beyond which the safety of the device cannot be guaranteed. The device
should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guar-
anteed at the absolute maximum ratings. The “Recommended Operating Conditions” table will define the conditions for
actual device operation. I Absolute Maximum Rating must be observed.
O
Supply Voltage (V
)
-0.5V to +4.6V
-0.5V to +4.6V
CC
DC Input Voltage (V
)
IN
DC Output Voltage (V
)
OUT
HIGH or LOW State
= 0V
-0.5V to V +0.5V
CC
V
-0.5V to +4.6V
±50 mA
CC
DC Input Diode Current (I ) V < 0V
IK
IN
DC Output Diode Current (I
)
OK
V
V
< 0V
-50 mA
+50 mA
± 50 mA
OUT
OUT
> V
CC
DC Output Source/Sink Current (I /I
)
OH OL
DC V or Ground Current per
CC
Supply Pin (I or Ground)
CC
± 50 mA
Storage Temperature Range (T
)
-65°C to +150°C
STG
Recommended Operating Conditions
Unused inputs must be held HIGH or LOW. They may not float.
Power Supply
0.9V to 3.6V
0V to 3.6V
Input Voltage (V
)
IN
Output Voltage (V
)
OUT
V
= 0.0V
0V to 3.6V
CC
HIGH or LOW State
Output Current in I /I
0V to V
CC
OH OL
V
V
V
V
V
V
= 3.0V to 3.6V
±24.0 mA
±18.0 mA
±6.0 mA
CC
CC
CC
CC
CC
CC
= 2.3V to 2.7V
= 1.65V to 1.95V
= 1.4V to 1.6V
= 1.1V to 1.3V
= 0.9V
±4.0 mA
±2.0 mA
±0.1 mA
Free Air Operating Temperature (T )
A
-40°C to +85°C
Minimum Input Edge Rate (dt/dv)
V
= 0.8V to 2.0V, V = 3.0V
10 ns/V
IN
CC
© 2003 Fairchild Semiconductor Corporation
NC7SV74 • Rev. 3.0.0
www.fairchildsemi.com
3
DC Electrical Characteristics
V
T
= +25°C
T = -40°C to +85°C
A
CC
A
Symbol
Parameter
HIGH Level
Units
Conditions
(V)
Min.
Max.
Min.
Max.
V
0.90
0.65 x V
0.65 x V
0.65 x V
0.65 x V
0.65 x V
1.6
IH
CC
CC
CC
CC
CC
Input Voltage
1.10 VCC 1.30 0.65 x V
1.40 VCC 1.60 0.65 x V
1.65 VCC 1.95 0.65 x V
2.30 VCC 2.70
2.70 VCC 3.60
0.90
CC
CC
CC
V
1.6
2.0
2.0
V
V
LOW Level
0.35 x V
0.35 x V
0.35 x V
0.35 x V
0.7
0.35 x V
0.35 x V
0.35 x V
0.35 x V
0.7
IL
CC
CC
CC
CC
CC
CC
CC
CC
Input Voltage
1.10 VCC 1.30
1.40 VCC 1.60
1.65 VCC 1.95
2.30 VCC 2.70
2.70 VCC 3.60
0.90
V
0.8
0.8
HIGH Level
V
V
V
V
V
V
- 0.1
V
V
V
V
V
V
- 0.1
OH
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
Output Voltage
1.10 VCC 1.30
1.40 VCC 1.60
1.65 VCC 1.95
2.30 VCC 2.70
2.70 VCC 3.60
- 0.1
- 0.2
- 0.2
- 0.2
- 0.2
- 0.1
- 0.2
- 0.2
- 0.2
- 0.2
I
OH = -100 mA
1.10 VCC 1.30 0.75 x V
1.40 VCC 1.60 0.75 x V
0.75 x V
0.75 x V
1.25
2.0
I
I
OH = -2.0 mA
OH = -4.0 mA
CC
CC
CC
CC
V
1.65 VCC 1.95
2.30 VCC 2.70
2.30 VCC 2.70
2.70 VCC 3.60
2.30 VCC 2.70
2.70 VCC 3.60
2.70 VCC 3.60
0.90
1.25
2.0
1.8
2.2
1.7
2.4
2.2
I
I
OH = -6.0 mA
OH = -12.0 mA
1.8
2.2
1.7
I
I
OH = -18.0 mA
OH = -24.0 mA
2.4
2.2
V
LOW Level
0.1
0.1
0.1
0.1
OL
Output Voltage
1.10 VCC 1.30
1.40 VCC 1.60
1.65 VCC 1.95
2.30 VCC 2.70
2.70 VCC 3.60
1.10 VCC 1.30
1.40 VCC 1.60
1.65 VCC 1.95
2.30 VCC 2.70
2.70 VCC 3.60
2.30 VCC 2.70
2.70 VCC 3.60
2.70 VCC 3.60
0.90 to 3.60
0.2
0.2
I
OL = 100 mA
0.2
0.2
0.2
0.2
0.2
0.2
0.25 x V
0.25 x V
0.3
0.25 x V
0.25 x V
0.3
I
I
I
OL = 2.0 mA
OL = 4.0 mA
OL = 6.0 mA
CC
CC
CC
CC
V
0.4
0.4
I
OL = 12.0 mA
0.4
0.4
0.6
0.6
I
I
OL = 18.0 mA
OL = 24.0 mA
0.4
0.4
0.55
±0.1
0.5
0.55
±0.5
0.5
I
Input Leakage Current
mA
mA
0 V 3.6V
0 (V , V ) 3.6V
IN
I
I
I
Power Off Leakage Current
Quiescent Supply Current
0
OFF
CC
I
O
0.90 to 3.60
0.9
0.9
V = V or GND
I CC
mA
0.90 to 3.60
±0.9
VCC V 3.6V
I
© 2003 Fairchild Semiconductor Corporation
NC7SV74 • Rev. 3.0.0
www.fairchildsemi.com
4
AC Electrical Characteristics
V
T
A = +25°C
TA = -40°C to +85°C
Figure
CC
Symbol
Parameter
Units
Conditions
(V)
Min.
Typ.
Max.
Min.
Max.
Number
C
L = 15 pF,
f
Maximum Clock
Frequency
0.90
50
MAX
RL = 1 M
1.10 VCC 1.30
1.40 VCC 1.60
1.65 VCC 1.95
2.30 VCC 2.70
2.70 VCC 3.60
150
200
200
200
200
150
200
200
200
200
C
L = 15 pF,
Figure 1
Figure 5
RL = 2 k
MHz
CL = 30 pF
RL = 500
C
L = 15 pF,
t
t
Propagation Delay
CK to Q, Q
0.90
13.0
PLH
RL = 1 M
1.10 VCC 1.30
1.40 VCC 1.60
1.65 VCC 1.95
2.30 VCC 2.70
2.70 VCC 3.60
3.0
1.0
1.0
0.8
0.7
6.0
3.2
1.9
1.2
1.0
9.9
6.0
4.5
3.0
2.8
1.0
1.0
1.0
0.7
0.6
14.6
7.2
5.3
3.7
3.2
PHL
C
L = 15 pF,
Figure 1
Figure 3
RL = 2 k
ns
ns
ns
ns
ns
ns
CL = 30 pF
RL = 500
C
L = 15 pF,
t
t
Propagation Delay
0.90
14.0
PLH
RL = 1 M
CLR, PR, to Q, Q 1.10 VCC 1.30
1.40 VCC 1.60
3.0
1.0
1.0
0.8
0.7
6.5
3.2
1.9
1.2
1.0
10.5
6.0
4.5
3.0
2.8
1.0
1.0
1.0
0.7
0.6
15.1
7.2
5.3
3.7
3.2
PHL
C
L = 15 pF,
Figure 1
Figure 3
RL = 2 k
1.65 VCC 1.95
2.30 VCC 2.70
2.70 VCC 3.60
CL = 30 pF
RL = 500
C
L = 15 pF,
t
t
t
t
Setup Time,
CK to D
0.90
6.5
0.5
7.0
8.0
6.5
S
RL = 1 M
1.10 VCC 1.30
1.40 VCC 1.60
1.65 VCC 1.95
2.30 VCC 2.70
2.70 VCC 3.60
3.5
2.0
1.5
2.0
1.5
3.5
2.0
1.5
2.0
1.5
C
L = 15 pF,
Figure 1
Figure 4
RL = 2 k
CL = 30 pF
RL = 500
C
L = 15 pF,
Hold Time,
CK to D
0.90
0.5
H
RL = 1 M
1.10 VCC 1.30
1.40 VCC 1.60
1.65 VCC 1.95
2.30 VCC 2.70
2.70 VCC 3.60
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
C
L = 15 pF,
Figure 1
Figure 4
RL = 2 k
CL = 30 pF
RL = 500
C
L = 15 pF,
Pulse Width,
CK, PR, CLR
0.90
7.0
W
RL = 1 M
1.10 VCC 1.30
1.40 VCC 1.60
1.65 VCC 1.95
2.30 VCC 2.70
2.70 VCC 3.60
4.0
3.0
3.0
3.0
3.0
4.0
3.0
3.0
3.0
3.0
C
L = 15 pF,
Figure 1
Figure 5
RL = 2 k
CL = 30 pF
RL = 500
C
L = 15 pF,
Recover Time
CLR, PR to CK
0.90
8.0
REC
RL = 1 M
1.10 VCC 1.30
1.40 VCC 1.60
1.65 VCC 1.95
2.30 VCC 2.70
2.70 VCC 3.60
4.5
3.0
3.0
3.0
3.0
4.5
3.0
3.0
3.0
3.0
C
L = 15 pF,
Figure 1
Figure 4
RL = 2 k
CL = 30 pF
RL = 500
Capacitance
Symbol
Parameter
Typ.
Max.
Units
pF
Conditions
C
C
C
Input Capacitance
Output Capacitance
Power Dissipation Capacitance
2.0
4.5
V
V
CC = 0V
CC = 0V
IN
pF
OUT
PD
20.0
pF
V = V or 0V, f = 10 MHz
I CC
© 2003 Fairchild Semiconductor Corporation
NC7SV74 • Rev. 3.0.0
www.fairchildsemi.com
5
AC Loading and Waveforms
C
includes load and stray capacitance
L
Input PRR = 1.0 MHz; t = 500 ns
w
AC Test Circuit
Test
, t
Switch
AC Waveforms
AC Waveforms
AC Waveforms
t
Open
PLH PHL
t
, t
6V at VCC = 3.3V ± 0.3V
PZL PLZ
V
x 2 at VCC = < 3.0V
GND
CC
t
, t
PZH PHZ
CP Input = AC Waveform; t = t = 2.5 ns;
r
f
CP Input PRR = 10 MHz; Duty Cycle = 50%
D Input PRR = 5MHz; Duty Cycle = 50%
I
Test Circuit
CCD
© 2003 Fairchild Semiconductor Corporation
NC7SV74 • Rev. 3.0.0
www.fairchildsemi.com
6
Tape and Reel Specification
TAPE FORMAT for US8
Package
Tape
Number
Cavities
125 (typ)
3000
Cavity
Status
Empty
Filled
Cover Tape
Status
Designator
Section
Leader (Start End)
Sealed
K8X
Carrier
Sealed
Trailer (Hub End)
75 (typ)
Empty
Sealed
TAPE DIMENSIONS inches (millimeters)
TAPE FORMAT for MicroPak
Package
Tape
Number
Cavities
125 (typ)
3000
Cavity
Status
Empty
Filled
Cover Tape
Status
Designator
Section
Leader (Start End)
Sealed
L8X
Carrier
Sealed
Trailer (Hub End)
75 (typ)
Empty
Sealed
TAPE DIMENSIONS inches (millimeters)
© 2003 Fairchild Semiconductor Corporation
NC7SV74 • Rev. 3.0.0
www.fairchildsemi.com
7
REEL DIMENSIONS inches (millimeters)
Tape
Size
A
B
C
D
N
W1
W2
W3
7.0
0.059
0.512
0.795
2.165 0.331 + 0.059/-0.000
0.567
W1 + 0.078/-0.039
(W1 + 2.00/-1.00)
8 mm
(177.8) (1.50) (13.00) (20.20) (55.00) (8.40 + 1.50/-0.00)
(14.40)
© 2003 Fairchild Semiconductor Corporation
NC7SV74 • Rev. 3.0.0
www.fairchildsemi.com
8
Physical Dimensions
2.10
1.90
A
1.80
0.15
B
8
5
(8X) 0.70
3.20
3.00
2.40
2.20
3.40
2.70
1.00
1.55
1
0.2
C B A
4
PIN 1 IDENT
ALL LEAD TIPS
0.50
0.30 (8X)
TOP VIEW
RECOMMENDED LAND PATTERN
0.80
0.60
0.90 MAX
ALL LEAD TIPS
0.10
0.00
0.1 C
A. CONFORMS TO JEDEC REGISTRATION MO-187
B. DIMENSIONS ARE IN MILLIMETERS.
SEATING
PLANE
C
C. DIMENSIONS ARE EXCLUSIVE OF BURRS,
MOLD FLASH, AND TIE BAR EXTRUSIONS.
(8X)
A
0.17-0.27
0.13
0.50
B
C
D. DIMENSIONS AND TOLERANCES PER
ANSI Y14.5M, 1994.
E. FILE DRAWING NAME : MKT-MAB08Arev4
SIDE VIEW
DETAIL A
0.4 TYP
GAGE PLANE
0.10-0.18
0.12
0°-8°
0.20-0.35
SEATING PLANE
DETAIL A
8-Lead US8, JEDEC MO-187, Variation CA 3.1mm Wide
Package Number MAB08A
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in
any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor
representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s
worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/dwg/MA/MAB08A.pdf.
© 2003 Fairchild Semiconductor Corporation
NC7SV74 • Rev. 3.0.0
www.fairchildsemi.com
9
Physical Dimensions
2X
C
0.10
A
1.6
B
1.6
INDEX AREA
C
0.10
2X
TOP VIEW
0.55 MAX
0.05 C
Recommended Landpattern
(0.20)
C
0.05
0.05
0.00
C
DETAIL A
8X(0.09)
1.0
0.35
0.25
0.5
1
2
3
(0.1)
4
8
4
(0.15)
0.35
0.25
7
6
5
0.35
0.15
0.25
8X
8X
DETAIL A
PIN #1 TERMINAL
SCALE: 2X
0.25
(0.2)
0.10 C A B
0.05
3X
C
BOTTOM VIEW
Notes:
1. PACKAGE CONFORMS TO JEDEC MO-255 VARIATION UAAD
2. DIMENSIONS ARE IN MILLIMETERS
3. DRAWING CONFORMS TO ASME Y.14M-1994
4. PIN 1 FLAG, END OF PACKAGE OFFSET
5. DRAWING FILE NAME: MKT-MAC08AREV4
MAC08AREV4
Pb-Free 8-Lead MicroPak, 1.6 mm Wide
Package Number MAC08A
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in
any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor
representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s
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