NC7SZ386P6X-L22347 [ONSEMI]
TinyLogic UHS 3 输入互斥 OR 门极;
| 型号： | NC7SZ386P6X-L22347 |
| 厂家： | 
ONSEMI |
| 描述： | TinyLogic UHS 3 输入互斥 OR 门极 |
| 文件： | 总9页 (文件大小：284K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATA SHEET
www.onsemi.com
TinyLogic UHS Three-Input
Exclusive-ORGate
MARKING
DIAGRAMS
NC7SZ386
F4KK
XYZ
SIP6 1.45x1.0
CASE 127EB
Description
Pin 1
The NC7SZ386 is a single three−input Exclusive−OR Gate from
onsemi’s Ultra−High Speed Series of TinyLogic. The device is
fabricated with advanced CMOS technology to achieve ultra−high
speed with high output drive while maintaining low static power
6
1
SC−88
386MG
dissipation over a broad V operating range. The device is specified
CC
CASE 419B−02
G
to operate over the 1.65 V to 5.5 V V operating range. The inputs
CC
and output are high impedance when V
is 0 V. Inputs tolerate
CC
voltages up to 5.5 V independent of V operating voltage.
CC
F4, 386
= Specific Device Code
Features
KK
XY
Z
M
G
= 2−Digit Lot Run Traceability Code
= 2−Digit Date Code Format
= Assembly Plant Code
= Date Code*
• Ultra−High Speed: t = 4.8 ns (Typical) into 50 pF at 5 V V
PD
CC
• High Output Drive: 24 mA at 3 V V
CC
• Broad V Operating Range: 1.65 V to 5.5 V
= Pb−Free Package
CC
• Power Down High Impedance Inputs / Outputs
(Note: Microdot may be in either location)
• Over−Voltage Tolerance Inputs Facilitate 5 V to 3 V Translation
• Proprietary Noise / EMI Reduction Circuitry
• Ultra−Small MicroPak™ Packages
*Date Code orientation and/or position may
vary depending upon manufacturing location.
• Space−Saving SC70 Package
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
ORDERING INFORMATION
See detailed ordering, marking and shipping information in the
package dimensions section on page 5 of this data sheet.
IEEC / IEC
A
B
= 1
Y
C
Figure 1. Logic Symbol
© Semiconductor Components Industries, LLC, 2001
1
Publication Order Number:
March, 2022 − Rev. 2
NC7SZ386/D
NC7SZ386
Pin Configurations
A 1
GND 2
B 3
6 C
5 V
4 Y
A
GND
B
1
2
3
6
5
4
C
CC
V
Y
CC
Figure 2. SC−88 (Top View)
Figure 4. MicroPak (Top Through View)
(Top View)
AAA
Pin One
AAA represents Product Code Top Mark − see ordering code.
NOTE: Orientation of Top Mark determines Pin One location.
Read the Top Product Code Mark left to right, Pin One
is the lower left pin (see diagram).
Figure 3. Pin 1 Orientation
PIN DEFINITIONS
FUNCTION TABLE
Pin # SC−88 Pin # MicroPak
Name
A
Description
Input
Inputs
Output
1
2
3
4
5
6
1
2
3
4
5
6
A
L
B
L
C
L
Y
L
GND
B
Ground
Input
L
L
H
L
H
H
L
Y
Output
L
H
H
L
V
CC
Supply Voltage
Input
L
H
L
C
H
H
H
H
H
L
L
H
L
H
H
L
H
H
H = HIGH Logic Level
L = LOW Logic Level
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2
NC7SZ386
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Min
−0.5
−0.5
−0.5
−
Max
6.5
Unit
V
V
CC
Supply Voltage
V
IN
DC Input Voltage
6.5
V
V
DC Output Voltage
DC Input Diode Current
DC Output Diode Current
DC Output Current
6.5
V
OUT
I
V
< 0 V
−50
−50
50
mA
mA
mA
mA
°C
IK
IN
I
V
< 0 V
−
OK
OUT
I
−
OUT
I
or I
DC V or Ground Current
−
50
CC
GND
CC
T
STG
Storage Temperature Range
−65
−
+150
+150
+260
332
812
4000
2000
T
J
Junction Temperature Under Bias
°C
T
L
Junction Lead Temperature (Soldering, 10 Seconds)
−
°C
P
D
Power Dissipation in Still Air
SC−88
−
mW
MicroPak−6
−
ESD
Human Body Model, JESD22−A114
−
V
Charge Device Model, JESD22−C101
−
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Supply Voltage Operating
Supply Voltage Data Retention
Input Voltage
Conditions
Min
1.65
1.50
0
Max
5.50
5.50
5.5
Unit
V
CC
V
V
IN
V
V
V
OUT
Output Voltage
0
V
CC
T
Operating Temperature
Input Rise and Fall Times
−40
0
+85
20
°C
A
t , t
r
V
CC
V
CC
V
CC
at 1.8 V, 2.5 V 0.2 V
at 3.3 V 0.3 V
ns/V
f
0
10
at 5.0 V 0.5 V
0
5
q
Thermal Resistance
SC−88
−
377
154
°C/W
JA
MicroPak−6
−
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
1. Unused inputs must be held HIGH or LOW. They may not float.
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3
NC7SZ386
DC ELECTRICAL CHARACTERISTICS
T
A
= 25°C
Typ
−
T = −40 to +85°C
A
Min
Max
−
Min
Max
−
Symbol
Parameter
V
CC
(V)
Conditions
Unit
V
HIGH Level Input Voltage
1.65 to 1.95
2.30 to 5.50
1.65 to 1.95
2.30 to 5.50
1.65
0.65 V
0.65 V
V
IH
CC
CC
CC
CC
0.70 V
−
−
0.70 V
−
V
LOW Level Input Voltage
HIGH Level Output Voltage
−
−
−
0.35 V
−
−
0.35 V
V
V
IL
CC
CC
−
0.30 V
0.30 V
CC
CC
V
OH
V
OH
= V or V ,
1.55
2.20
2.90
4.40
1.29
1.90
2.50
2.40
3.90
−
1.65
2.30
3.00
4.50
1.52
2.15
2.80
2.68
4.20
0.00
0.00
0.00
0.00
0.80
0.10
0.15
0.22
0.22
−
−
−
−
−
−
−
−
−
−
1.55
2.20
2.90
4.40
1.29
1.90
2.40
2.30
3.80
−
−
−
−
−
−
−
−
−
−
IN
IH
IL
I
= −100 mA
2.30
3.00
4.50
1.65
I
I
I
I
I
= −4 mA
= −8 mA
= −16 mA
= −24 mA
= −32 mA
OH
OH
OH
OH
OH
2.30
3.00
3.00
4.50
V
OL
LOW Level Output Voltage
1.65
V
OL
= V or V ,
0.10
0.10
0.10
0.10
0.24
0.30
0.40
0.55
0.55
1
0.10
0.10
0.10
0.10
0.24
0.30
0.40
0.55
0.55
10
V
IN
IH
IL
I
= 100 mA
2.30
−
−
3.00
−
−
4.50
−
−
1.65
I
OL
I
OL
I
OL
I
OL
I
OL
= 4 mA
−
−
2.30
= 8 mA
−
−
3.00
= 16 mA
= 24 mA
= 32 mA
−
−
3.00
−
−
4.50
−
−
I
IN
Input Leakage Current
1.65 to 5.5
0
V
IN
V
IN
V
IN
= 5.5 V, GND
−
−
mA
mA
mA
I
Power Off Leakage Current
Quiescent Supply Current
or V
= 5.5 V
−
−
1
−
10
OFF
OUT
I
1.65 to 5.50
= 5.5 V, GND
−
−
2
−
20
CC
AC ELECTRICAL CHARACTERISTICS
T
A
= 25°C
Typ
14.0
8.0
T = −40 to +85°C
A
Symbol
, t
Parameter
V
(V)
Conditions
Min
−
Max
Min
Max
23.0
13.0
9.5
6.1
9.8
6.9
−
Unit
CC
t
Propagation Delay
(Figure 5, 6)
1.80 0.15
2.50 0.20
3.30 0.30
5.00 0.50
3.30 0.30
5.00 0.50
0.00
C = 15 pF,
22.5
12.5
9.2
5.7
9.5
6.5
−
−
−
−
−
−
−
−
−
−
ns
PLH PHL
L
R = 1 MW
L
−
−
6.0
−
4.3
C = 50 pF,
−
6.1
L
R = 500 W
L
−
4.8
C
Input Capacitance
−
4
pF
pF
IN
C
Power Dissipation Capacitance
(Note 2) (Figure 7)
3.30
−
25
31
−
−
PD
5.00
−
−
−
2. C is defined as the value of the internal equivalent capacitance which is derived from dynamic operating current consumption (I
) at
PD
CCD
no output loading and operating at 50% duty cycle.(See Figure 7) C is related to I
dynamic operating current by the expression:
PD
CCD
I
= (C ) (V ) (f ) + (I static).
CCD
PD CC IN CC
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4
NC7SZ386
AC Loading and Waveforms
V
CC
t = 3 ns
r
t = 3 ns
f
V
CC
90%
50%
90%
50%
INPUT
OUTPUT
INPUT
R
10%
10%
C
L
L
t
W
GND
t
t
PHL
PLH
V
OH
NOTES:
3. C includes load and stray capacitance
L
50%
50%
OUTPUT
4. Input PRR = 1.0 MHz, t = 500 ns.
W
V
OL
Figure 5. AC Test Circuit
Figure 6. AC Waveforms
V
CC
A
INPUT
NOTE:
5. Input = AC Waveform; t = t = 1.8 ns; PRR = 10 MHz;
r
f
Duty Cycle = 50%.
Figure 7. ICCD Test Circuit
DEVICE ORDERING INFORMATION
†
Device
NC7SZ386P6X
Top Mark
386
Packages
Shipping
6−Lead SC70, EIAJ SC−88, 1.25 mm Wide
6−Lead SC70, EIAJ SC−88, 1.25 mm Wide
6−Lead MicroPak, 1.00 mm Wide
3000 / Tape & Reel
3000 / Tape & Reel
5000 / Tape & Reel
NC7SZ386P6X−L22347
386
NC7SZ386L6X
F4
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
MicroPak is a trademark of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries in the United States and/or other
countries.
www.onsemi.com
5
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SIP6 1.45X1.0
CASE 127EB
ISSUE O
DATE 31 AUG 2016
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13590G
SIP6 1.45X1.0
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SC−88/SC70−6/SOT−363
CASE 419B−02
ISSUE Y
1
DATE 11 DEC 2012
SCALE 2:1
2X
aaa H
D
NOTES:
D
H
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
A
3. DIMENSIONS D AND E1 DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRU-
SIONS, OR GATE BURRS SHALL NOT EXCEED 0.20 PER END.
4. DIMENSIONS D AND E1 AT THE OUTERMOST EXTREMES OF
THE PLASTIC BODY AND DATUM H.
5. DATUMS A AND B ARE DETERMINED AT DATUM H.
6. DIMENSIONS b AND c APPLY TO THE FLAT SECTION OF THE
LEAD BETWEEN 0.08 AND 0.15 FROM THE TIP.
7. DIMENSION b DOES NOT INCLUDE DAMBAR PROTRUSION.
ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 TOTAL IN
EXCESS OF DIMENSION b AT MAXIMUM MATERIAL CONDI-
TION. THE DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OF THE FOOT.
D
GAGE
PLANE
6
1
5
2
4
3
L
L2
E1
E
DETAIL A
aaa
C
2X
2X 3 TIPS
bbb H
D
e
MILLIMETERS
DIM MIN NOM MAX
−−−
INCHES
MIN
−−−
NOM MAX
−−− 0.043
−−− 0.004
6X b
B
TOP VIEW
A
−−−
−−−
1.10
A1 0.00
A2 0.70
0.10 0.000
M
ddd
C A-B D
0.90
0.20
0.15
2.00
2.10
1.25
0.65 BSC
0.36
1.00 0.027 0.035 0.039
0.25 0.006 0.008 0.010
0.22 0.003 0.006 0.009
2.20 0.070 0.078 0.086
2.20 0.078 0.082 0.086
1.35 0.045 0.049 0.053
0.026 BSC
b
C
D
E
0.15
0.08
1.80
2.00
A2
DETAIL A
A
E1 1.15
e
L
0.26
0.46 0.010 0.014 0.018
0.006 BSC
L2
0.15 BSC
0.15
aaa
bbb
ccc
ddd
0.006
0.012
0.004
0.004
0.30
0.10
0.10
6X
ccc C
A1
SEATING
PLANE
c
C
SIDE VIEW
END VIEW
GENERIC
MARKING DIAGRAM*
RECOMMENDED
SOLDERING FOOTPRINT*
6
6X
0.30
XXXMG
6X
0.66
G
1
2.50
XXX = Specific Device Code
M
= Date Code*
G
= Pb−Free Package
0.65
(Note: Microdot may be in either location)
PITCH
*Date Code orientation and/or position may
vary depending upon manufacturing location.
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
STYLES ON PAGE 2
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42985B
SC−88/SC70−6/SOT−363
PAGE 1 OF 2
onsemi and
are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves
the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation
special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
SC−88/SC70−6/SOT−363
CASE 419B−02
ISSUE Y
DATE 11 DEC 2012
STYLE 1:
PIN 1. EMITTER 2
2. BASE 2
STYLE 2:
CANCELLED
STYLE 3:
CANCELLED
STYLE 4:
STYLE 5:
STYLE 6:
PIN 1. ANODE 2
2. N/C
PIN 1. CATHODE
2. CATHODE
3. COLLECTOR
4. EMITTER
5. BASE
PIN 1. ANODE
2. ANODE
3. COLLECTOR 1
4. EMITTER 1
5. BASE 1
3. COLLECTOR
3. CATHODE 1
4. ANODE 1
5. N/C
4. EMITTER
5. BASE
6. COLLECTOR 2
6. ANODE
6. CATHODE
6. CATHODE 2
STYLE 7:
STYLE 8:
CANCELLED
STYLE 9:
STYLE 10:
STYLE 11:
STYLE 12:
PIN 1. SOURCE 2
2. DRAIN 2
3. GATE 1
PIN 1. EMITTER 2
2. EMITTER 1
3. COLLECTOR 1
4. BASE 1
PIN 1. SOURCE 2
2. SOURCE 1
3. GATE 1
PIN 1. CATHODE 2
2. CATHODE 2
3. ANODE 1
PIN 1. ANODE 2
2. ANODE 2
3. CATHODE 1
4. ANODE 1
5. ANODE 1
6. CATHODE 2
4. SOURCE 1
5. DRAIN 1
6. GATE 2
4. DRAIN 1
5. DRAIN 2
6. GATE 2
4. CATHODE 1
5. CATHODE 1
6. ANODE 2
5. BASE 2
6. COLLECTOR 2
STYLE 13:
PIN 1. ANODE
2. N/C
STYLE 14:
PIN 1. VREF
2. GND
STYLE 15:
STYLE 16:
STYLE 17:
STYLE 18:
PIN 1. VIN1
2. VCC
PIN 1. ANODE 1
2. ANODE 2
PIN 1. BASE 1
2. EMITTER 2
3. COLLECTOR 2
4. BASE 2
PIN 1. BASE 1
2. EMITTER 1
3. COLLECTOR 2
4. BASE 2
3. COLLECTOR
4. EMITTER
5. BASE
3. GND
3. ANODE 3
3. VOUT2
4. VIN2
5. GND
6. VOUT1
4. IOUT
5. VEN
6. VCC
4. CATHODE 3
5. CATHODE 2
6. CATHODE 1
5. EMITTER 1
6. COLLECTOR 1
5. EMITTER 2
6. COLLECTOR 1
6. CATHODE
STYLE 19:
PIN 1. I OUT
2. GND
STYLE 20:
STYLE 21:
PIN 1. ANODE 1
2. N/C
STYLE 22:
PIN 1. D1 (i)
2. GND
STYLE 23:
PIN 1. Vn
2. CH1
3. Vp
STYLE 24:
PIN 1. CATHODE
2. ANODE
PIN 1. COLLECTOR
2. COLLECTOR
3. BASE
3. GND
3. ANODE 2
4. CATHODE 2
5. N/C
3. D2 (i)
3. CATHODE
4. CATHODE
5. CATHODE
6. CATHODE
4. V CC
4. EMITTER
5. COLLECTOR
6. COLLECTOR
4. D2 (c)
5. VBUS
6. D1 (c)
4. N/C
5. V EN
5. CH2
6. N/C
6. V REF
6. CATHODE 1
STYLE 30:
STYLE 25:
STYLE 26:
PIN 1. SOURCE 1
2. GATE 1
STYLE 27:
PIN 1. BASE 2
2. BASE 1
STYLE 28:
PIN 1. DRAIN
2. DRAIN
3. GATE
STYLE 29:
PIN 1. ANODE
2. ANODE
PIN 1. SOURCE 1
2. DRAIN 2
3. DRAIN 2
4. SOURCE 2
5. GATE 1
PIN 1. BASE 1
2. CATHODE
3. COLLECTOR 2
4. BASE 2
3. DRAIN 2
4. SOURCE 2
5. GATE 2
3. COLLECTOR 1
4. EMITTER 1
5. EMITTER 2
6. COLLECTOR 2
3. COLLECTOR
4. EMITTER
5. BASE/ANODE
6. CATHODE
4. SOURCE
5. DRAIN
6. DRAIN
5. EMITTER
6. COLLECTOR 1
6. DRAIN 1
6. DRAIN 1
Note: Please refer to datasheet for
style callout. If style type is not called
out in the datasheet refer to the device
datasheet pinout or pin assignment.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42985B
SC−88/SC70−6/SOT−363
PAGE 2 OF 2
onsemi and
are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves
the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation
special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
onsemi,
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.
A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any
products or information herein, without notice. The information herein is provided “as−is” and onsemi makes no warranty, representation or guarantee regarding the accuracy of the
information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use
of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products
and applications using onsemi products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information
provided by onsemi. “Typical” parameters which may be provided in onsemi data sheets and/or specifications can and do vary in different applications and actual performance may
vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. onsemi does not convey any license
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TECHNICAL PUBLICATIONS:
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相关型号：
NC7SZ38M5
NAND Gate, LVC/LCX/Z Series, 1-Func, 2-Input, CMOS, PDSO5, 1.60 MM, MO-178, SOT-23, 5 PIN
FAIRCHILD
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