NC7WZ07L6X-L22175 [ONSEMI]
TinyLogic UHS 双缓冲器(开路漏极输出);型号: | NC7WZ07L6X-L22175 |
厂家: | ONSEMI |
描述: | TinyLogic UHS 双缓冲器(开路漏极输出) |
文件: | 总11页 (文件大小:491K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
DATA SHEET
www.onsemi.com
TinyLogic UHS Dual Buffer
(Open-Drain Outputs)
MARKING
DIAGRAMS
D3KK
XYZ
SIP6
CASE 127EB
NC7WZ07
Pin 1
Description
The NC7WZ07 is a dual buffer with open−drain outputs from
onsemi’s Ultra−High Speed (UHS) series of TinyLogic. The device is
fabricated with advanced CMOS technology to achieve ultra−high
speed with high output drive, while maintaining low static power
UDFN6
CASE 517DP
D3KK
XYZ
Pin 1
dissipation over a broad V operating range. The device is specified
CC
6
to operate over a very broad V
operating range. The device is
CC
specified to operate over the 1.65 V to 5.5 V V range. The inputs
CC
SC−88
CASE 419B−02
Z07MG
and outputs are high impedance when V is 0 V. Inputs tolerate
CC
G
voltages up to 5.5 V independent of V operating voltage.
CC
1
Features
• Ultra−High Speed: t
= 2.3 ns (Typical)
PZL
D3, Z07
= Specific Device Code
KK
XY
Z
M
G
= 2−Digit Lot Run Traceability Code
= 2−Digit Date Code Format
= Assembly Plant Code
= Date Code*
• High I Output Drive: 24 mA at 3 V V
OL
CC
• Broad V Operating Range: 1.65 V to 5.50 V
CC
• Power Down High−Impedance Inputs / Outputs
• Over−Voltage Tolerance Inputs Facilitate 5 V to 3 V Translation
• Proprietary Noise / EMI Reduction Circuitry
• Ultra−Small MicroPak™ Packages
= Pb−Free Package
(Note: Microdot may be in either location)
*Date Code orientation and/or position may
vary depending upon manufacturing location.
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
ORDERING INFORMATION
See detailed ordering, marking and shipping information in the
package dimensions section on page 5 of this data sheet.
IEEC / IEC
1
A
A
Y
Y
1
1
1
2
2
Figure 1. Logic Symbol
© Semiconductor Components Industries, LLC, 2000
1
Publication Order Number:
January, 2023 − Rev. 6
NC7WZ07/D
NC7WZ07
A
1
6 Y
5 V
4 Y
1
1
A
1
2
3
6
5
4
Y
V
Y
1
1
GND 2
CC
2
GND
CC
2
A
2
A
2
3
Figure 2. SC−88 (Top View)
Figure 3. MicroPak (Top Through View)
AAA
(Top View)
Pin One
NOTES:
1. AAA represents product code top mark (see Ordering Information).
2. Orientation of top mark determines pin one location.
3. Read the top mark left to right, pin one is the lower left pin.
Figure 4. Pin 1 Orientation
PIN DEFINITIONS
FUNCTION TABLE (Y = A)
Inputs
Pin # SC−88 Pin # MicroPak
Name
Description
Input
Output
Y
1
2
3
4
5
6
1
2
3
4
5
6
A
1
A
GND
Ground
Input
LOW Logic Level
HIGH Logic Level
LOW Logic Level
A
HIGH Impedance Output
State, Open Drain
2
2
Y
Output
V
CC
Supply Voltage
Output
Y
1
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2
NC7WZ07
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Min
−0.5
−0.5
−0.5
−
Max
6.5
Unit
V
V
CC
Supply Voltage
V
IN
DC Input Voltage
6.5
V
V
DC Output Voltage
DC Input Diode Current
DC Output Diode Current
DC Output Current
6.5
V
OUT
I
V
V
< 0 V
−50
−50
50
mA
mA
mA
mA
°C
IK
IN
I
< 0 V
−
OK
OUT
I
−
OUT
I
or I
DC V or Ground Current
−
100
+150
+150
+260
332
812
812
4000
2000
CC
GND
CC
T
STG
Storage Temperature Range
−65
−
T
J
Junction Temperature Under Bias
°C
T
L
Junction Lead Temperature (Soldering, 10 Seconds)
−
°C
P
D
Power Dissipation in Still Air
SC−88
−
mW
MicroPak−6
MicroPak2ꢀ−6
−
−
ESD
Human Body Model, JEDEC: JESD22−A114
Charge Device Model, JEDEC: JESD22−C101
−
V
−
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Supply Voltage Operating
Supply Voltage Data Retention
Input Voltage
Conditions
Min
1.65
1.5
0
Max
5.5
5.5
5.5
5.5
20
Unit
V
CC
V
V
IN
V
V
V
OUT
Output Voltage
0
t , t
Input Rise and Fall Times
V
CC
V
CC
V
CC
at 1.8 V 0.15 V, 2.5 V 0.2 V
at 3.3 V 0.3 V
0
ns/V
r
f
0
10
at 5.0 V 0.5 V
0
5
T
Operating Temperature
Thermal Resistance
−40
−
+85
377
154
154
°C
A
q
SC−88−6
°C/W
JA
MicroPak−6
MicroPak2−6
−
−
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
4. Unused inputs must be held HIGH or LOW. They may not float.
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3
NC7WZ07
DC ELECTICAL CHARACTERISTICS
T
A
= +25°C
T = −40 to +85°C
A
Min
Typ
−
Max
−
Min
Max
Symbol
Parameter
V
(V)
Conditions
Unit
CC
V
IH
HIGH Level Input Voltage
1.65 to 1.95
2.30 to 5.50
1.65 to 1.95
2.30 to 5.50
0.65 V
0.65 V
−
−
V
CC
CC
CC
0.70 V
−
−
0.70 V
CC
V
IL
LOW Level Input Voltage
−
−
−
−
−
−
0.35 V
0.30 V
5
−
−
−
0.35 V
CC
V
CC
0.30 V
10
CC
CC
I
HIGH Level Output Leakage 1.65 to 5.50
Current
V
IN
V
= V or V ,
mA
LKG
IH
IL
= V or GND
OUT
CC
V
LOW Level Output Voltage
1.65
1.80
2.30
3.00
4.50
1.65
2.30
3.00
3.00
4.50
V
OL
= V or V ,
−
−
−
−
−
−
−
−
−
−
−
−
−
0.00
0.00
0.00
0.00
0.00
0.80
0.10
0.16
0.24
0.25
−
0.10
0.10
0.10
0.10
0.10
0.24
0.30
0.40
0.55
0.55
0.1
−
−
−
−
−
−
−
−
−
−
−
−
−
0.00
0.10
0.10
0.10
0.10
0.24
0.30
0.40
0.55
0.55
1.0
V
OL
IN
IH
IL
I
= 100 mA
I
OL
I
OL
I
OL
I
OL
I
OL
= 4 mA
= 8 mA
= 16 mA
= 24 mA
= 32 mA
I
IN
Input Leakage Current
1.65 to 5.5 0 ≤ V ≤ 5.5 V
mA
mA
mA
IN
I
Power Off Leakage Current
Quiescent Supply Current
0
V
or V = 5.5 V
OUT
−
1
10
OFF
IN
IN
I
1.65 to 5.50
V
= 5.5 V, GND
−
1
10
CC
AC ELECTRICAL CHARACTERISTICS
T
A
= +25°C
Typ
T = −40 to +85°C
A
Symbol
Parameter
V
CC
(V)
Conditions
Min
Max
Min
Max
12.6
10.5
6.4
4.8
3.9
12.6
10.5
6.4
4.8
3.9
−
Unit
t
Propagation Delay
(Figure 5, 6)
1.65
1.80
C = 50 pF,
−
−
−
−
−
−
−
−
−
−
−
−
−
−
6.6
11.5
9.5
5.8
4.4
3.5
11.5
9.5
5.8
4.4
3.5
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
ns
PZL
L
RU = 500 W,
RD = 500 W,
5.5
3.7
2.9
2.3
5.5
4.3
2.8
2.1
1.4
2.5
4.0
3
V = 2 x V
I
CC
2.50 0.20
3.30 0.30
5.00 0.50
1.65
t
C = 50 pF,
PLZ
L
RU = 500 W,
RD = 500 W,
1.80
V = 2 x V
I
CC
2.50 0.20
3.30 0.30
5.00 0.50
0
C
Input Capacitance
Output Capacitance
pF
pF
pF
IN
C
0
−
−
OUT
C
Power Dissipation Capacitance
(Note 5) (Figure 7)
3.30
−
−
PD
5.00
4
−
−
5. C is defined as the value of the internal equivalent capacitance which is derived from dynamic operating current consumption (I
) at
PD
CCD
no output loading and operating at 50% duty cycle. C is related to I
dynamic operating current by the expression:
PD
CCD
I
= (C ) (V ) (f ) + (I static).
CCD
PD CC IN CC
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4
NC7WZ07
V
I
V
CC
R
R
U
D
INPUT
NOTE:
OUTPUT
C
L
6. C includes load and stray capacitance.
L
7. Input PRR = 1.0 MHz, t = 500 ns.
W
Figure 5. AC Test Circuit
Figure 6. AC Waveforms
V
CC
A
INPUT
NOTE:
8. Input = AC Waveform; t = t = 1.8 ns;
r
f
PRR = Variable; Duty Cycle = 50%.
Figure 7. ICCD Test Circuit
ORDERING INFORMATION
†
Part Number
Top Mark
Z07
Z07
D3
Package
Shipping
NC7WZ07P6X
SC−88
SC−88
3000 / Tape & Reel
3000 / Tape & Reel
5000 / Tape & Reel
5000 / Tape & Reel
5000 / Tape & Reel
5000 / Tape & Reel
NC7WZ07P6X−L22347
NC7WZ07L6X
MicroPak
MicroPak
MicroPak2
MicroPak2
NC7WZ07L6X−L22175
NC7WZ07FHX
D3
D3
NC7WZ07FHX−L22175
D3
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
MicroPak and MicroPak2 are trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries in the United
States and/or other countries.
www.onsemi.com
5
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SIP6 1.45X1.0
CASE 127EB
ISSUE O
DATE 31 AUG 2016
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13590G
SIP6 1.45X1.0
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SC−88 (SC−70 6 Lead), 1.25x2
CASE 419AD
ISSUE A
DATE 07 JUL 2010
1
SYMBOL
MIN
NOM
MAX
D
0.80
A
1.10
e
e
A1
A2
0.00
0.80
0.10
1.00
b
c
0.15
0.10
1.80
1.80
1.15
0.30
0.18
2.20
2.40
1.35
D
2.00
2.10
E1
E
E
E1
e
1.25
0.65 BSC
0.36
L
0.26
0.46
L1
L2
0.42 REF
0.15 BSC
TOP VIEW
0º
4º
8º
θ
10º
θ1
q1
A2
A1
A
q
L
b
L1
q1
c
L2
SIDE VIEW
END VIEW
Notes:
(1) All dimensions are in millimeters. Angles in degrees.
(2) Complies with JEDEC MO-203.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON34266E
SC−88 (SC−70 6 LEAD), 1.25X2
PAGE 1 OF 1
onsemi and
are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves
the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation
special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SC−88/SC70−6/SOT−363
CASE 419B−02
ISSUE Y
1
DATE 11 DEC 2012
SCALE 2:1
2X
aaa H
D
NOTES:
D
H
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
A
3. DIMENSIONS D AND E1 DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRU-
SIONS, OR GATE BURRS SHALL NOT EXCEED 0.20 PER END.
4. DIMENSIONS D AND E1 AT THE OUTERMOST EXTREMES OF
THE PLASTIC BODY AND DATUM H.
5. DATUMS A AND B ARE DETERMINED AT DATUM H.
6. DIMENSIONS b AND c APPLY TO THE FLAT SECTION OF THE
LEAD BETWEEN 0.08 AND 0.15 FROM THE TIP.
7. DIMENSION b DOES NOT INCLUDE DAMBAR PROTRUSION.
ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 TOTAL IN
EXCESS OF DIMENSION b AT MAXIMUM MATERIAL CONDI-
TION. THE DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OF THE FOOT.
D
GAGE
PLANE
6
1
5
2
4
3
L
L2
E1
E
DETAIL A
aaa
C
2X
2X 3 TIPS
bbb H
D
e
MILLIMETERS
DIM MIN NOM MAX
−−−
INCHES
MIN
−−−
NOM MAX
−−− 0.043
−−− 0.004
6X b
B
TOP VIEW
A
−−−
−−−
1.10
A1 0.00
A2 0.70
0.10 0.000
M
ddd
C A-B D
0.90
0.20
0.15
2.00
2.10
1.25
0.65 BSC
0.36
1.00 0.027 0.035 0.039
0.25 0.006 0.008 0.010
0.22 0.003 0.006 0.009
2.20 0.070 0.078 0.086
2.20 0.078 0.082 0.086
1.35 0.045 0.049 0.053
0.026 BSC
b
C
D
E
0.15
0.08
1.80
2.00
A2
DETAIL A
A
E1 1.15
e
L
0.26
0.46 0.010 0.014 0.018
0.006 BSC
L2
0.15 BSC
0.15
aaa
bbb
ccc
ddd
0.006
0.012
0.004
0.004
0.30
0.10
0.10
6X
ccc C
A1
SEATING
PLANE
c
C
SIDE VIEW
END VIEW
GENERIC
MARKING DIAGRAM*
RECOMMENDED
SOLDERING FOOTPRINT*
6
6X
0.30
XXXMG
6X
0.66
G
1
2.50
XXX = Specific Device Code
M
= Date Code*
G
= Pb−Free Package
0.65
(Note: Microdot may be in either location)
PITCH
*Date Code orientation and/or position may
vary depending upon manufacturing location.
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
STYLES ON PAGE 2
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42985B
SC−88/SC70−6/SOT−363
PAGE 1 OF 2
onsemi and
are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves
the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation
special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
SC−88/SC70−6/SOT−363
CASE 419B−02
ISSUE Y
DATE 11 DEC 2012
STYLE 1:
PIN 1. EMITTER 2
2. BASE 2
STYLE 2:
CANCELLED
STYLE 3:
CANCELLED
STYLE 4:
STYLE 5:
STYLE 6:
PIN 1. ANODE 2
2. N/C
PIN 1. CATHODE
2. CATHODE
3. COLLECTOR
4. EMITTER
5. BASE
PIN 1. ANODE
2. ANODE
3. COLLECTOR 1
4. EMITTER 1
5. BASE 1
3. COLLECTOR
3. CATHODE 1
4. ANODE 1
5. N/C
4. EMITTER
5. BASE
6. COLLECTOR 2
6. ANODE
6. CATHODE
6. CATHODE 2
STYLE 7:
STYLE 8:
CANCELLED
STYLE 9:
STYLE 10:
STYLE 11:
STYLE 12:
PIN 1. SOURCE 2
2. DRAIN 2
3. GATE 1
PIN 1. EMITTER 2
2. EMITTER 1
3. COLLECTOR 1
4. BASE 1
PIN 1. SOURCE 2
2. SOURCE 1
3. GATE 1
PIN 1. CATHODE 2
2. CATHODE 2
3. ANODE 1
PIN 1. ANODE 2
2. ANODE 2
3. CATHODE 1
4. ANODE 1
5. ANODE 1
6. CATHODE 2
4. SOURCE 1
5. DRAIN 1
6. GATE 2
4. DRAIN 1
5. DRAIN 2
6. GATE 2
4. CATHODE 1
5. CATHODE 1
6. ANODE 2
5. BASE 2
6. COLLECTOR 2
STYLE 13:
PIN 1. ANODE
2. N/C
STYLE 14:
PIN 1. VREF
2. GND
STYLE 15:
STYLE 16:
STYLE 17:
STYLE 18:
PIN 1. VIN1
2. VCC
PIN 1. ANODE 1
2. ANODE 2
PIN 1. BASE 1
2. EMITTER 2
3. COLLECTOR 2
4. BASE 2
PIN 1. BASE 1
2. EMITTER 1
3. COLLECTOR 2
4. BASE 2
3. COLLECTOR
4. EMITTER
5. BASE
3. GND
3. ANODE 3
3. VOUT2
4. VIN2
5. GND
6. VOUT1
4. IOUT
5. VEN
6. VCC
4. CATHODE 3
5. CATHODE 2
6. CATHODE 1
5. EMITTER 1
6. COLLECTOR 1
5. EMITTER 2
6. COLLECTOR 1
6. CATHODE
STYLE 19:
PIN 1. I OUT
2. GND
STYLE 20:
STYLE 21:
PIN 1. ANODE 1
2. N/C
STYLE 22:
PIN 1. D1 (i)
2. GND
STYLE 23:
PIN 1. Vn
2. CH1
3. Vp
STYLE 24:
PIN 1. CATHODE
2. ANODE
PIN 1. COLLECTOR
2. COLLECTOR
3. BASE
3. GND
3. ANODE 2
4. CATHODE 2
5. N/C
3. D2 (i)
3. CATHODE
4. CATHODE
5. CATHODE
6. CATHODE
4. V CC
4. EMITTER
5. COLLECTOR
6. COLLECTOR
4. D2 (c)
5. VBUS
6. D1 (c)
4. N/C
5. V EN
5. CH2
6. N/C
6. V REF
6. CATHODE 1
STYLE 30:
STYLE 25:
STYLE 26:
PIN 1. SOURCE 1
2. GATE 1
STYLE 27:
PIN 1. BASE 2
2. BASE 1
STYLE 28:
PIN 1. DRAIN
2. DRAIN
3. GATE
STYLE 29:
PIN 1. ANODE
2. ANODE
PIN 1. SOURCE 1
2. DRAIN 2
3. DRAIN 2
4. SOURCE 2
5. GATE 1
PIN 1. BASE 1
2. CATHODE
3. COLLECTOR 2
4. BASE 2
3. DRAIN 2
4. SOURCE 2
5. GATE 2
3. COLLECTOR 1
4. EMITTER 1
5. EMITTER 2
6. COLLECTOR 2
3. COLLECTOR
4. EMITTER
5. BASE/ANODE
6. CATHODE
4. SOURCE
5. DRAIN
6. DRAIN
5. EMITTER
6. COLLECTOR 1
6. DRAIN 1
6. DRAIN 1
Note: Please refer to datasheet for
style callout. If style type is not called
out in the datasheet refer to the device
datasheet pinout or pin assignment.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42985B
SC−88/SC70−6/SOT−363
PAGE 2 OF 2
onsemi and
are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves
the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation
special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
UDFN6 1.0X1.0, 0.35P
CASE 517DP
ISSUE O
DATE 31 AUG 2016
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98AON13593G
UDFN6 1.0X1.0, 0.35P
PAGE 1 OF 1
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相关型号:
NC7WZ07P6_NL
Buffer, LVC/LCX/Z Series, 2-Func, 1-Input, CMOS, PDSO6, 1.25 MM, LEAD FREE, EIAJ, SC-88, SC-70, 6 PIN
FAIRCHILD
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