NC7WZU04L6X [ONSEMI]
TinyLogic UHS 双通道无缓冲反相器;
| 型号： | NC7WZU04L6X |
| 厂家： | 
ONSEMI |
| 描述： | TinyLogic UHS 双通道无缓冲反相器 栅 光电二极管 逻辑集成电路 触发器 |
| 文件： | 总12页 (文件大小：354K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATA SHEET
www.onsemi.com
MARKING
DIAGRAMS
TinyLogic UHS Dual
Unbuffered Inverter
B5KK
XYZ
SIP6 1.45x1.0
CASE 127EB
NC7WZU04
Pin 1
Description
6
1
The NC7WZU04 is a dual unbuffered inverter from onsemi’s Ultra
High Speed Series of TinyLogic in the space saving SC−88 6−lead
package. The special purpose unbuffered circuit design is intended for
crystal oscillator or analog applications. The internal circuit consists
of only one−stage, the output, to allow for this part to be used in these
oscillator or analog applications. The device is fabricated with
advanced CMOS technology to achieve ultra high speed with high
output drive while maintaining low static power dissipation over a
SC−88
CASE 419B−02
ZU4MG
G
B5, ZU4
= Specific Device Code
KK
XY
Z
M
G
= 2−Digit Lot Run Traceability Code
= 2−Digit Date Code Format
= Assembly Plant Code
= Data Code*
very broad V operating range. The device is specified to operate
over the 1.65 V to 5.5 V V range. The inputs are high impedance
CC
CC
when V is 0 V. Inputs tolerate voltages up to 5.5 V independent of
= Pb−Free Package
CC
V
CC
operating voltage.
(Note: Microdot may be in either location)
Features
*Date Code orientation and/or position may
vary depending upon manufacturing location.
• Space−Saving SC−88 6−Lead Package
• Ultra−Small MicroPak™ Leadless Packages
• Unbuffered for Crystal Oscillator and Analog Applications
ORDERING INFORMATION
See detailed ordering, marking and shipping information in the
package dimensions section on page 7 of this data sheet.
• Balanced Output Drive: 32 mA at 4.5 V V
CC
• Balanced Output Drive: 8 mA at 4.5 V V
CC
(NC7WZU04P6X−L22347)
• Broad V Operating Range: 1.65 V to 5.5 V
CC
• Low Quiescent Power: I < 1 mA at 5 V V , T = 25°C
CC
CC
A
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
IEEE / IEC
1
A
A
Y
Y
1
1
1
2
2
Figure 1. Logic Symbol
© Semiconductor Components Industries, LLC, 2006
1
Publication Order Number:
April, 2022 − Rev. 4
NC7WZU04/D
NC7WZU04
Pin Configurations
A
1
6 Y
5 V
4 Y
A
1
2
3
6
5
4
Y
V
Y
1
1
1
1
GND
CC
2
GND 2
CC
2
A
2
A
2
3
Figure 2. SC−88 (Top View)
Figure 3. MicroPak (Top Through View)
(Top View)
AAA
Pin One
AAA represents Product Code Top Mark − see ordering code
NOTE: Orientation of Top Mark determines Pin One location.
Reading the top product code mark left to right, Pin
One is the lower left pin (see diagram).
Figure 4. SC−88 Pin 1 Orientation
PIN DEFINITIONS
FUNCTION TABLE (Y = A)
Input
Pin Name
Description
Data Inputs
Outputs
Output
A , A
A
L
Y
H
L
1
2
2
Y , Y
1
H
H = HIGH Logic Level
L = LOW Logic Level
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2
NC7WZU04
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Min
−0.5
−0.5
−0.5
−
Max
6.5
Unit
V
V
CC
Supply Voltage
V
IN
DC Input Voltage
6.5
V
V
DC Output Voltage
DC Input Diode Current
DC Output Diode Current
V
+ 0.5
V
OUT
CC
I
V
V
V
< 0 V
−50
−50
+50
50
mA
mA
mA
mA
mA
°C
IK
IN
I
< 0 V
−
OK
OUT
OUT
> V
−
CC
I
DC Output Current
−
OUT
I
or I
DC V / GND Current
−
50
CC
GND
STG
CC
T
Storage Temperature
−65
−
+150
150
260
332
812
T
Junction Temperature Under Bias
Junction Lead Temperature (Soldering, 10 Seconds)
°C
J
L
T
−
°C
P
D
Power Dissipation in Still Air
SC−88
−
mW
MicroPak−6
−
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Supply Voltage Operating
Supply Voltage Data Retention
Input Voltage
Conditions
Min
1.65
1.5
0
Max
5.5
5.5
5.5
Unit
V
CC
V
V
IN
V
V
V
OUT
Output Voltage
0
V
CC
T
Operating Temperature
Thermal Resistance
−40
−
+85
377
154
°C
A
q
SC−88
°C/W
JA
MicroPak−6
−
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
1. Unused inputs must be held HIGH or LOW. They may not float.
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3
NC7WZU04
DC ELECTRICAL CHARACTERISTICS
T
A
= +25°C
T = −40 to +85°C
A
Min
Typ
−
Max
−
Min
Max
−
Symbol
Parameter
Conditions
V
(V)
Unit
CC
V
IH
HIGH Level Input
Voltage
1.8 to 2.7
3.0 to 5.5
1.8 to 2.7
3.0 to 5.5
0.85 V
0.85 V
V
CC
CC
CC
0.8 V
−
−
0.8 V
−
CC
V
IL
LOW Level Input
Voltage
−
−
−
0.15 V
−
−
0.15 V
V
V
CC
CC
−
0.2 V
0.2 V
CC
CC
V
OH
High−Level Output
Voltage
V
= GND
IN
I
= −100 mA
= −4 mA
1.65 to 5.5
1.65
2.3
V
− 0.1
V
CC
−
−
−
−
−
−
−
V − 0.1
CC
1.29
−
−
−
−
−
−
−
OH
OH
CC
I
1.29
1.4
2.1
2.4
2.7
2.5
4.0
I
= −8 mA
1.9
2.2
2.4
2.3
3.8
1.9
2.2
2.4
2.3
3.8
OH
I
= −12 mA
= −16 mA
= −24 mA
= −32 mA
2.7
OH
I
3.0
OH
I
3.0
OH
I
4.5
OH
V
OL
Low−Level Output
Voltage
V
= V
CC
V
IN
I
= 100 mA
= 4 mA
1.65 to 5.5
1.65
2.3
−
−
−
−
−
−
−
−
0.08
0.2
0.22
0.28
0.38
0.42
0.1
0.24
0.3
−
−
−
−
−
−
−
0.1
0.24
0.3
OL
OL
I
I
OL
= 8 mA
OL
I
= 12 mA
= 16 mA
= 24 mA
= 32 mA
2.7
0.4
0.4
I
3.0
0.4
0.55
0.55
0.4
0.55
0.55
OL
I
3.0
OL
I
4.5
OL
I
Input Leakage
Current
V
V
= 5.5 V, GND
1.65 to 5.5
1.65 to 5.5
−
−
0.1
−
1.0
mA
mA
IN
IN
I
Quiescent Supply
Current
= 5.5 V, GND
−
−
1.0
−
10
CC
IN
I
Peak Supply
Current in Analog
Operation
V
V
= Open
1.8
2.5
3.3
5.0
−
−
−
−
0.2
2
−
−
−
−
−
−
−
−
−
−
−
−
mA
CCPEAK
OUT
IN
= Adjust for Peak I
CC
Current
5
15
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4
NC7WZU04
DC ELECTRICAL CHARACTERISTICS (NC7WZU04P6X−L22347)
T
= +25°C
Typ
−
T = −40 to +85°C
A
A
Min
Max
−
Min
Max
−
Symbol
Parameter
V
CC
(V)
Conditions
Unit
V
HIGH Level Input
Voltage
1.8 to 2.7
3.0 to 5.5
1.8 to 2.7
3.0 to 5.5
1.65
1.8
0.85 V
0.85 V
V
IH
CC
CC
CC
0.8 V
−
−
0.8 V
−
CC
V
LOW Level Input
Voltage
−
−
−
0.15 V
−
−
0.15 V
V
V
IL
CC
CC
−
0.2 V
0.2 V
CC
CC
V
OH
HIGH Level Output
Voltage
V
V
= V
I
= −100 mA
1.55
1.6
2.1
2.7
4.0
1.29
1.9
2.4
2.3
3.8
−
1.65
1.79
2.29
2.99
4.48
1.52
2.19
2.82
2.73
4.24
0.01
0.01
0.01
0.01
0.01
0.10
0.12
0.19
0.29
0.29
−
−
−
−
−
−
−
−
−
−
−
1.55
1.6
2.1
2.7
4.0
1.29
1.9
2.4
2.3
3.8
−
−
−
−
−
−
−
−
−
−
−
IN
IL
OH
2.3
3.0
4.5
1.65
2.3
= GND
I
I
I
I
I
I
= −2 mA
= −2 mA
= −4 mA
= −6 mA
= −8 mA
= 100 mA
V
V
V
IN
OH
OH
OH
OH
OH
OL
3.0
3.0
4.5
VOL
LOW Level Output
Voltage
1.65
1.8
0.2
0.2
0.2
0.2
V
V
= V
IN
IH
−
−
2.3
−
0.2
−
0.2
3.0
−
0.3
−
0.3
4.5
−
0.5
−
0.5
1.65
2.3
I
OL
I
OL
I
OL
I
OL
I
OL
= 2 mA
= 2 mA
= 4 mA
= 6 mA
= 8 mA
−
0.24
0.3
−
0.24
0.3
= V
IN
CC
−
−
3.0
−
0.4
−
0.4
3.0
−
0.55
0.55
0.1
−
0.55
0.55
1.0
4.5
−
−
I
IN
Input Leakage
Current
1.65 to 5.5
V
V
= 5.5 V, GND
−
−
mA
mA
IN
I
Quiescent Supply
Current
1.65 to 5.5
= 5.5 V, GND
−
−
1.0
−
10
CC
IN
I
Peak Supply
Current in Analog
Operation
1.8
2.5
3.3
5.0
V
V
= Open
−
−
−
−
0.2
2
−
−
−
−
−
−
−
−
−
−
−
−
mA
CCPEAK
OUT
IN
= Adjust for Peak I
CC
Current
5
15
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5
NC7WZU04
AC ELECTRICAL CHARACTERISTICS
T
A
= +25°C
Typ
T = −40 to +85°C
A
Symbol
, t
Parameter
V
(V)
Conditions
Min
−
Max
9.8
8.1
5.7
4.1
3.3
6.4
5.6
−
Min
Max
11.0
8.9
6.3
4.5
3.6
7.0
6.2
−
Unit
CC
t
Propagation Delay
(Figure 5, 6)
1.65
1.8
C = 15 pF,
5.5
−
−
−
−
−
−
−
−
−
−
ns
PLH PHL
L
R = 1 MW
L
−
4.6
3.3
2.7
2.2
4.0
3.4
3
2.5 0.2
3.3 0.3
5.0 0.5
3.3 0.3
5.0 0.5
0
−
−
−
C = 50 pF,
L
−
L
R = 500 W
−
C
Input Capacitance
−
pF
pF
IN
C
Power Dissipation Capacitance
(Figure 7)
3.3
(Note 2)
−
3.5
5.5
−
−
PD
5.0
−
−
−
2. C is defined as the value of the internal equivalent capacitance which is derived from dynamic operating current consumption (I
) at
PD
CCD
no output loading and operating at 50% duty cycle. C is related to I
dynamic operating current by the expression:
PD
CCD
I
= (C ) (V ) (f ) + (I static).
CCD
PD CC IN CC
AC Loading and Waveforms
t = 3 ns
r
t = 3 ns
f
V
CC
90% 90%
50% 50%
Input
V
CC
10%
10%
t
W
GND
INPUT
OUTPUT
t
t
PLH
PHL
C *
L
R
L
V
OH
Output
50%
50%
*C includes load and stray capacitance.
L
Input PRR = 1.0 MHz, t = 500 ns.
W
V
OL
Figure 5. AC Test Circuit
Figure 6. AC Waveforms
V
CC
A
INPUT
Application Note: When operating the NC7WZU04’s unbuffered
output stage in its linear range, as in oscillator applications, care
must be taken to observe maximum power rating for the device
and package. The high drive nature of the design of the output
stage will result in substantial simultaneous conduction currents
when the stage is in the linear region. See the I
specification on page 4.
CCPEAK
Input = AC Waveform; t = t = 1.8 ns.
r
f
PRR = 10 MHz; Duty Cycle = 50%.
Figure 7. ICCD Test Circuit
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6
NC7WZU04
DEVICE ORDERING INFORMATION
Device
†
Top Mark
ZU4
Packages
SC−88
Shipping
NC7WZU04P6X
3000 / Tape & Reel
3000 / Tape & Reel
5000 / Tape & Reel
NC7WZU04P6X−L22347
NC7WZU04L6X
ZU4
SC−88
B5
MicroPak
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
MicroPak is trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries.
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7
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SIP6 1.45X1.0
CASE 127EB
ISSUE O
DATE 31 AUG 2016
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13590G
SIP6 1.45X1.0
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SC−88 (SC−70 6 Lead), 1.25x2
CASE 419AD
ISSUE A
DATE 07 JUL 2010
1
SYMBOL
MIN
NOM
MAX
D
0.80
A
1.10
e
e
A1
A2
0.00
0.80
0.10
1.00
b
c
0.15
0.10
1.80
1.80
1.15
0.30
0.18
2.20
2.40
1.35
D
2.00
2.10
E1
E
E
E1
e
1.25
0.65 BSC
0.36
L
0.26
0.46
L1
L2
0.42 REF
0.15 BSC
TOP VIEW
0º
4º
8º
θ
10º
θ1
q1
A2
A1
A
q
L
b
L1
q1
c
L2
SIDE VIEW
END VIEW
Notes:
(1) All dimensions are in millimeters. Angles in degrees.
(2) Complies with JEDEC MO-203.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON34266E
SC−88 (SC−70 6 LEAD), 1.25X2
PAGE 1 OF 1
onsemi and
are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves
the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation
special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SC−88/SC70−6/SOT−363
CASE 419B−02
ISSUE Y
1
DATE 11 DEC 2012
SCALE 2:1
2X
aaa H
D
NOTES:
D
H
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
A
3. DIMENSIONS D AND E1 DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRU-
SIONS, OR GATE BURRS SHALL NOT EXCEED 0.20 PER END.
4. DIMENSIONS D AND E1 AT THE OUTERMOST EXTREMES OF
THE PLASTIC BODY AND DATUM H.
5. DATUMS A AND B ARE DETERMINED AT DATUM H.
6. DIMENSIONS b AND c APPLY TO THE FLAT SECTION OF THE
LEAD BETWEEN 0.08 AND 0.15 FROM THE TIP.
7. DIMENSION b DOES NOT INCLUDE DAMBAR PROTRUSION.
ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 TOTAL IN
EXCESS OF DIMENSION b AT MAXIMUM MATERIAL CONDI-
TION. THE DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OF THE FOOT.
D
GAGE
PLANE
6
1
5
2
4
3
L
L2
E1
E
DETAIL A
aaa
C
2X
2X 3 TIPS
bbb H
D
e
MILLIMETERS
DIM MIN NOM MAX
−−−
INCHES
MIN
−−−
NOM MAX
−−− 0.043
−−− 0.004
6X b
B
TOP VIEW
A
−−−
−−−
1.10
A1 0.00
A2 0.70
0.10 0.000
M
ddd
C A-B D
0.90
0.20
0.15
2.00
2.10
1.25
0.65 BSC
0.36
1.00 0.027 0.035 0.039
0.25 0.006 0.008 0.010
0.22 0.003 0.006 0.009
2.20 0.070 0.078 0.086
2.20 0.078 0.082 0.086
1.35 0.045 0.049 0.053
0.026 BSC
b
C
D
E
0.15
0.08
1.80
2.00
A2
DETAIL A
A
E1 1.15
e
L
0.26
0.46 0.010 0.014 0.018
0.006 BSC
L2
0.15 BSC
0.15
aaa
bbb
ccc
ddd
0.006
0.012
0.004
0.004
0.30
0.10
0.10
6X
ccc C
A1
SEATING
PLANE
c
C
SIDE VIEW
END VIEW
GENERIC
MARKING DIAGRAM*
RECOMMENDED
SOLDERING FOOTPRINT*
6
6X
0.30
XXXMG
6X
0.66
G
1
2.50
XXX = Specific Device Code
M
= Date Code*
G
= Pb−Free Package
0.65
(Note: Microdot may be in either location)
PITCH
*Date Code orientation and/or position may
vary depending upon manufacturing location.
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
STYLES ON PAGE 2
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42985B
SC−88/SC70−6/SOT−363
PAGE 1 OF 2
onsemi and
are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves
the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation
special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
SC−88/SC70−6/SOT−363
CASE 419B−02
ISSUE Y
DATE 11 DEC 2012
STYLE 1:
PIN 1. EMITTER 2
2. BASE 2
STYLE 2:
CANCELLED
STYLE 3:
CANCELLED
STYLE 4:
STYLE 5:
STYLE 6:
PIN 1. ANODE 2
2. N/C
PIN 1. CATHODE
2. CATHODE
3. COLLECTOR
4. EMITTER
5. BASE
PIN 1. ANODE
2. ANODE
3. COLLECTOR 1
4. EMITTER 1
5. BASE 1
3. COLLECTOR
3. CATHODE 1
4. ANODE 1
5. N/C
4. EMITTER
5. BASE
6. COLLECTOR 2
6. ANODE
6. CATHODE
6. CATHODE 2
STYLE 7:
STYLE 8:
CANCELLED
STYLE 9:
STYLE 10:
STYLE 11:
STYLE 12:
PIN 1. SOURCE 2
2. DRAIN 2
3. GATE 1
PIN 1. EMITTER 2
2. EMITTER 1
3. COLLECTOR 1
4. BASE 1
PIN 1. SOURCE 2
2. SOURCE 1
3. GATE 1
PIN 1. CATHODE 2
2. CATHODE 2
3. ANODE 1
PIN 1. ANODE 2
2. ANODE 2
3. CATHODE 1
4. ANODE 1
5. ANODE 1
6. CATHODE 2
4. SOURCE 1
5. DRAIN 1
6. GATE 2
4. DRAIN 1
5. DRAIN 2
6. GATE 2
4. CATHODE 1
5. CATHODE 1
6. ANODE 2
5. BASE 2
6. COLLECTOR 2
STYLE 13:
PIN 1. ANODE
2. N/C
STYLE 14:
PIN 1. VREF
2. GND
STYLE 15:
STYLE 16:
STYLE 17:
STYLE 18:
PIN 1. VIN1
2. VCC
PIN 1. ANODE 1
2. ANODE 2
PIN 1. BASE 1
2. EMITTER 2
3. COLLECTOR 2
4. BASE 2
PIN 1. BASE 1
2. EMITTER 1
3. COLLECTOR 2
4. BASE 2
3. COLLECTOR
4. EMITTER
5. BASE
3. GND
3. ANODE 3
3. VOUT2
4. VIN2
5. GND
6. VOUT1
4. IOUT
5. VEN
6. VCC
4. CATHODE 3
5. CATHODE 2
6. CATHODE 1
5. EMITTER 1
6. COLLECTOR 1
5. EMITTER 2
6. COLLECTOR 1
6. CATHODE
STYLE 19:
PIN 1. I OUT
2. GND
STYLE 20:
STYLE 21:
PIN 1. ANODE 1
2. N/C
STYLE 22:
PIN 1. D1 (i)
2. GND
STYLE 23:
PIN 1. Vn
2. CH1
3. Vp
STYLE 24:
PIN 1. CATHODE
2. ANODE
PIN 1. COLLECTOR
2. COLLECTOR
3. BASE
3. GND
3. ANODE 2
4. CATHODE 2
5. N/C
3. D2 (i)
3. CATHODE
4. CATHODE
5. CATHODE
6. CATHODE
4. V CC
4. EMITTER
5. COLLECTOR
6. COLLECTOR
4. D2 (c)
5. VBUS
6. D1 (c)
4. N/C
5. V EN
5. CH2
6. N/C
6. V REF
6. CATHODE 1
STYLE 30:
STYLE 25:
STYLE 26:
PIN 1. SOURCE 1
2. GATE 1
STYLE 27:
PIN 1. BASE 2
2. BASE 1
STYLE 28:
PIN 1. DRAIN
2. DRAIN
3. GATE
STYLE 29:
PIN 1. ANODE
2. ANODE
PIN 1. SOURCE 1
2. DRAIN 2
3. DRAIN 2
4. SOURCE 2
5. GATE 1
PIN 1. BASE 1
2. CATHODE
3. COLLECTOR 2
4. BASE 2
3. DRAIN 2
4. SOURCE 2
5. GATE 2
3. COLLECTOR 1
4. EMITTER 1
5. EMITTER 2
6. COLLECTOR 2
3. COLLECTOR
4. EMITTER
5. BASE/ANODE
6. CATHODE
4. SOURCE
5. DRAIN
6. DRAIN
5. EMITTER
6. COLLECTOR 1
6. DRAIN 1
6. DRAIN 1
Note: Please refer to datasheet for
style callout. If style type is not called
out in the datasheet refer to the device
datasheet pinout or pin assignment.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42985B
SC−88/SC70−6/SOT−363
PAGE 2 OF 2
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相关型号：
NC7WZU04P6X_NL
Inverter, LVC/LCX/Z Series, 2-Func, 1-Input, CMOS, PDSO6, 1.25 MM, EIAJ, SC-88, SC-70, 6 PIN
FAIRCHILD
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