NCID9400 [ONSEMI]
High Speed Quad-Channel Digital Isolator;
| 型号： | NCID9400 |
| 厂家： | 
ONSEMI |
| 描述： | High Speed Quad-Channel Digital Isolator |
| 文件： | 总15页 (文件大小：296K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
High Speed Quad-Channel
Digital Isolator
Product Preview
NCID9401, NCID9411
Description
The NCID94xx is a galvanically isolated high−speed quad−channel
digital isolator with output enable. This device supports isolated
communications thereby allowing digital signals to communicate
between systems without conducting ground loops or hazardous
voltages.
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It utilizes ON Semiconductor’s patented galvanic off−chip capacitor
isolation technology and optimized IC design to achieve high
insulation and high noise immunity, characterized by high common
mode rejection and power supply rejection specifications. The thick
ceramic substrate yields capacitors with ~25 times the thickness of
thin film on−chip capacitors and coreless transformers. The result is
a combination of the electrical performance benefits that digital
isolators offer with the safety reliability of a >0.5 mm insulator barrier
similar to what has historically been offered by optocouplers.
The device is housed in a 16−pin wide body small outline package.
SOIC16 W
CASE 751EN
MARKING DIAGRAM
Features
ON
AWLYWW
• Off−Chip Capacitive Isolation to Achieve Reliable High Voltage
9401
Insulation
♦ DTI (Distance Through Insulation): ≥ 0.5 mm
♦ Maximum Working Insulation Voltage: 2000 V
• Bi−directional Communication
peak
A
WL
Y
WW
9401/9411
= Assembly Location
= Wafer Lot / Assembly Lot
= Year
= Work Week
= Specific Device Code
• 100 kV/ms Minimum Common Mode Rejection
• 8 mm Creepage and Clearance Distance to Achieve Reliable High
Voltage Insulation
• Specifications Guaranteed Over 2.5 V to 5.5 V Supply Voltage
and −40°C to 125°C Extended Temperature Range
• Over Temperature Detection
• Output Enable Function (Primary and Secondary side)
• NCIV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable (Pending)
ORDERING INFORMATION
See detailed ordering and shipping information on page 13 of
this data sheet.
• Safety and Regulatory Approvals
♦ UL1577, 5000 VRMS for 1 Minute
♦ DIN VDE V 0884−11 (Pending)
Typical Applications
• Isolated PWM Control
• Industrial Fieldbus Communications
2
• Microprocessor System Interface (SPI, I C, etc.)
• Programmable Logic Control
• Isolated Data Acquisition System
• Voltage Level Translator
This document contains information on a product under development. ON Semiconductor
reserves the right to change or discontinue this product without notice.
© Semiconductor Components Industries, LLC, 2020
1
Publication Order Number:
August, 2020 − Rev. P1
NCID9401/D
NCID9401, NCID9411
BLOCK DIAGRAM
VDD1
GND1
VDD2
GND2
SYNC
SER
ENCODER
TX
RX
DECODER
DES
IO A
IOB
IOC
IOD
IO A
IOB
IOC
IOD
IO
SWITCH
IO
SWITCH
SYNC
DES
DECODER
RX
TX
ENCODER
SER
EN1
EN2
GND1
GND2
Figure 1. Functional Block Diagram
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2
NCID9401, NCID9411
PIN CONFIGURATION
NCID9401
NCID9411
1
2
3
4
5
6
7
8
16
1
16
V
V
V
V
DD2
DD1
DD2
DD1
GND1
15 GND2
GND1
2
3
4
5
6
7
8
15 GND2
14
14
V
V
V
V
V
V
V
V
V
V
V
V
INA
INB
OA
INA
INB
OA
13
12
11
10
9
13
12
11
10
9
OB
OB
V
V
V
INC
INC
IND
OC
OD
OC
V
OD
IND
NC
EN2
EN1
EN2
GND1
GND2
GND1
GND2
Figure 2. Pin and Channel Configuration
PIN DEFINITION
Name
Pin No.
NCID9401
Pin No.
NCID9411
Description
V
1
2
1
2
Power Supply, Side 1
Ground Connection for V
Input, Channel A
DD1
GND1
DD1
V
3
3
INA
V
INB
4
4
Input, Channel B
V
INC
5
5
Input, Channel C
V
6
11
7
Input, Channel D
IND
EN1
GND1
GND2
EN2
−
Output Enable 1
8
8
Ground Connection for V
Ground Connection for V
Output Enable 2
DD1
9
9
DD2
10
11
12
13
14
15
16
7
10
6
V
Output, Channel D
Output, Channel C
Output, Channel B
Output, Channel A
Ground Connection for V
Power Supply, Side 2
No Connect
OD
V
12
13
14
15
16
−
OC
V
OB
V
OA
GND2
DD2
V
DD2
NC
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3
NCID9401, NCID9411
SPECIFICATIONS
TRUTH TABLE (Note 1)
V
EN
V
V
V
OX
Comment
Normal Operation
Normal Operation
INX
X
DDI
DDO
H
H/NC
H/NC
L
Power Up
Power Up
Power Up
Power Up
Power Up
Power Up
H
L
L
X
X
Power Up
Hi−Z
L
H/NC
Power Down
Default low; V return to normal operation
OX
when V
change to Power Up
DDI
X
H/NC
Power Up
Power Down
Undetermined
(Note 2)
V
return to normal operation when V
OX DDO
change to Power Up
1. VINX = Input signal of a given channel (A, B, C or D). EN = Enable pin for primary or secondary side (1 or 2). V = Output signal of a given
X
OX
channel (A, B, C or D). V
= Input−side V . V
= Output−side V . X = Irrelevant. H = High level. L = Low level. NC = No Connection.
DDI
DD DDO DD
2. The outputs are in undetermined state when V
< V
.
DDO
UVLO
SAFETY AND INSULATION RATINGS
As per DIN VDE V 0884−11, this digital isolator is suitable for “safe electrical insulation” only within the safety limit data. Compliance with
the safety ratings must be ensured by means of protective circuits.
Symbol
Parameter
Min
−
Typ
I–IV
I–IV
I–IV
I–IV
I–III
40/100/21
2
Max
−
Unit
Installation Classifications per DIN VDE 0110/1.89
Table 1 Rated Mains Voltage
< 150 V
< 300 V
< 450 V
< 600 V
RMS
RMS
RMS
RMS
−
−
−
−
−
−
< 1000 V
−
−
RMS
Climatic Classification
−
−
Pollution Degree (DIN VDE 0110/1.89)
−
−
CTI
Comparative Tracking Index (DIN IEC 112/VDE 0303 Part 1)
Input−to−Output Test Voltage, Method b, V × 1.875 = V , 100%
600
3750
−
−
V
PR
−
−
V
peak
IORM
PR
Production Test with t = 1 s, Partial Discharge < 5 pC
m
Input−to−Output Test Voltage, Method a, V
× 1.6 = V , Type
3200
−
−
V
peak
IORM
PR
and Sample Test with t = 10 s, Partial Discharge < 5 pC
m
V
Maximum Working Insulation Voltage
Highest Allowable Over Voltage
2000
8000
8.0
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
V
V
IORM
peak
V
IOTM
peak
E
External Creepage
mm
mm
mm
°C
CR
E
External Clearance
8.0
CL
DTI
Insulation Thickness
0.50
150
100
600
Safety Limit Values – Maximum Values in Failure; Case Temperature
Safety Limit Values – Maximum Values in Failure; Input Power
Safety Limit Values – Maximum Values in Failure; Output Power
T
Case
P
mW
mW
W
S,INPUT
P
S,OUTPUT
9
R
Insulation Resistance at TS, V = 500 V
IO
IO
10
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4
NCID9401, NCID9411
ABSOLUTE MAXIMUM RATINGS (T = 25°C unless otherwise specified)
A
Symbol
Parameter
Value
−55 to +150
−40 to +125
−40 to +150
260 for 10 s
−0.5 to 6
−0.5 to 6
15
Unit
°C
°C
°C
°C
V
T
Storage Temperature
Operating Temperature
Junction Temperature
STG
OPR
T
T
J
T
SOL
Lead Solder Temperature (Refer to Reflow Temperature Profile)
Supply Voltage (V
V
DD
)
DDx
V
Voltage (V , V , ENx)
V
INx
Ox
I
O
Average Output Current
Power Dissipation
mA
mW
PD
210
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
RECOMMENDED OPERATING RANGES
Symbol
Parameter
Ambient Operating Temperature
Min
−40
2.5
0.7 × V
0
Max
+125
5.5
Unit
°C
V
T
A
V
V
Supply Voltage (Notes 3, 4)
High Level Input Voltage
DD1 DD2
V
INH
V
DDI
V
DDI
V
INL
Low Level Input Voltage
0.3 × V
V
DDI
V
V
Supply Voltage UVLO Rising Threshold
Supply Voltage UVLO Falling Threshold
Supply Voltage UVLO Hysteresis
High Level Output Current
Low Level Output Current
2.2
2.0
0.1
−2
−
−
V
UVLO+
V
UVLO−
UVLO
−
V
HYS
I
−
mA
mA
Mbps
OH
I
OL
−
2
DR
Signaling Rate
0
10
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
3. During power up or down, ensure that both the input and output supply voltages reach the proper recommended operating voltages to avoid
any momentary instability at the output state.
4. For reliable operation at recommended operating conditions, V supply pins require at least a pair of external bypass capacitors, placed
DD
within 2 mm from V pins 1 and 16 and GND pins 2 and 15. Recommended values are 0.1 mF and 1 mF.
DD
ISOLATION CHARACTERISTICS
Apply over all recommended conditions. All typical values are measured at T = 25°C.
A
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
V
ISO
Input−Output Isolation
Voltage
T = 25°C, Relative Humidity < 50%,
5000
−
−
V
RMS
A
t = 1.0 minute, I
(Notes 5, 6, 7)
v 10 mA, 50 Hz
I−O
11
R
C
Isolation Resistance
Isolation Capacitance
V
V
= 500 V (Note 5)
−
−
10
−
−
ISO
ISO
I−O
= 0 V, Frequency = 1.0 MHz
(Note 5)
1
pF
I−O
5. Device is considered a two−terminal device: pins 1 to 8 are shorted together and pins 9 to 16 are shorted together.
6. 5,000 V for 1−minute duration is equivalent to 6,000 V for 1−second duration.
RMS
RMS
7. The input−output isolation voltage is a dielectric voltage rating per UL1577. It should not be regarded as an input−output continuous voltage
rating. For the continuous working voltage rating, refer to equipment−level safety specification or DIN VDE V 0884−11 Safety and Insulation
Ratings Table on page 4.
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5
NCID9401, NCID9411
ELECTRICAL CHARACTERISTICS
Apply over all recommended conditions, T =−40°C to +125°C, V
= V
= 2.5 V to 5.5 V, unless otherwise specified. All typical values
A
DD1
DD2
are measured at T = 25°C.
A
Symbol
Parameter
Conditions
Min
– 0.4
Typ
V – 0.1
DDO
Max
Unit
Figure
V
OH
High Level Output
Voltage
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
= 5 V, I = −4 mA
V
DDO
−
V
11
OH
= 3.3 V, I = −2 mA
OH
= 2.5 V, I = −1 mA
OH
V
OL
Low Level Output
Voltage
= 5 V, I = 4 mA
−
−
0.1
0.4
V
12
OL
= 3.3 V, I = 2 mA
OL
= 2.5 V, I = 1 mA
OL
V
V
Rising Input Voltage
Threshold
−
−
0.7 × V
V
V
V
INT+
DDI
Falling Input Voltage
Threshold
0.1 × V
0.1 × V
−
−
INT−
DDI
V
Input Threshold Voltage
Hysteresis
0.2 × V
INT(HYS)
DDI
DDI
I
High Level Input Current
Low Level Input Current
V
V
= V
−
−
−
1
−
−
mA
mA
INH
IH
DDI
I
= 0 V
−1
INL
IL
CMTI
Common Mode Transient
Immunity
V = V
or 0 V,
100
150
kV/ms
16
I
DDI
= 1500 V
V
CM
C
Input Capacitance
V
= V /2 + 0.4 × sin (2pft),
−
2
−
pF
IN
IN
DDI
f = 1 MHz, V = 5 V
DD
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
SUPPLY CURRENT CHARACTERISTICS
Apply over all recommended conditions, T =−40°C to +125°C unless otherwise specified. All typical values are measured at T = 25°C.
A
A
Symbol
Parameter
Conditions
Min
Typ
8.3
9.3
8.0
9.1
7.9
9.0
8.4
9.5
8.1
9.2
8.0
9.1
8.9
11.3
8.4
10.2
8.2
Max
11.3
12.3
11
Unit
mA
Figure
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
DC Supply Current
V
IN
= 5 V, EN = 0/5 V,
DD
= 0/5 V
−
DD1
DD2
DD1
DD2
DD1
DD2
DD1
V
V
V
= 3.3 V, EN = 0/3.3 V,
= 0/3.3 V
DD
IN
12
V
V
= 2.5 V, EN = 0/2.5 V,
= 0/2.5 V
10.8
11.8
11.3
12.3
11
DD
IN
AC Supply Current
1 Mbps
V
DD
= 5 V, EN = 5 V,
−
mA
3, 4,
5, 6
C = 15 pF,
L
V
IN
= 5 V Square Wave
DD2
DD1
DD2
DD1
DD2
DD1
DD2
DD1
DD2
DD1
V
DD
= 3.3 V, EN = 3.3 V,
C = 15 pF,
L
12
V
IN
= 3.3 V Square Wave
V
DD
= 2.5 V, EN = 2.5 V,
10.8
11.8
12.6
13.6
11.7
12.7
11.3
C = 15 pF,
L
V
IN
= 2.5 V Square Wave
AC Supply Current
10 Mbps
V
DD
= 5 V, EN = 5 V,
−
mA
C = 15 pF,
L
V
IN
= 5 V Square Wave
V
DD
= 3.3 V, EN = 3.3 V,
C = 15 pF,
L
V
IN
= 3.3 V Square Wave
V
DD
= 2.5 V, EN = 2.5 V,
C = 15 pF,
L
I
9.8
12.3
V
IN
= 2.5 V Square Wave
DD2
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6
NCID9401, NCID9411
SWITCHING CHARACTERISTICS – NCID9401
Apply over all recommended conditions, T =−40°C to +125°C unless otherwise specified. All typical values are measured at T = 25°C.
A
A
Symbol
Parameter
Ch
Conditions
= 5 V, C = 15 pF
Min
Typ
Max
Unit
Figure
t
Propagation Delay to Logic Low
Output (Note 8)
All
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
−
136
200
ns
ns
ns
ns
ns
ns
ns
ns
ms
ns
8, 13
PHL
L
= 3.3 V, C = 15 pF
L
= 2.5 V, C = 15 pF
L
t
Propagation Delay to Logic High
Output (Note 9)
All
All
All
All
All
All
All
All
All
= 5 V, C = 15 pF
−
−
137
33
−
200
80
80
−
PLH
L
= 3.3 V, C = 15 pF
L
= 2.5 V, C = 15 pF
L
PWD
Pulse Width Distortion
= 5 V, C = 15 pF
L
| t
PHL
– t
| (Note 10)
PLH
= 3.3 V, C = 15 pF
L
= 2.5 V, C = 15 pF
L
t
Propagation Delay Skew
(Part to Part) (Note 11)
= 5 V, C = 15 pF
−80
−
PSK(PP)
L
= 3.3 V, C = 15 pF
L
= 2.5 V, C = 15 pF
L
t
R
Output Rise Time (10% to 90%)
Output Fall Time (90% to 10%)
= 5 V, C = 15 pF
3
L
= 3.3 V, C = 15 pF
L
= 2.5 V, C = 15 pF
L
t
F
= 5 V, C = 15 pF
−
2
−
L
= 3.3 V, C = 15 pF
L
= 2.5 V, C = 15 pF
L
t
t
High Impedance to Logic Low
Output Delay (Note 12)
−
8.4
25
25
1
14
= 5 V, R = 1 kW
PZL
L
= 3.3 V, R = 1 kW
9.9
L
= 2.5 V, R = 1 kW
12.3
10.8
14.5
17.8
0.53
0.50
0.50
11.7
13.1
15.0
L
Logic Low to High Impedance
Output Delay (Note 13)
−
= 5 V, R = 1 kW
PLZ
L
= 3.3 V, R = 1 kW
L
= 2.5 V, R = 1 kW
L
t
t
High Impedance to Logic High
Output Delay (Note 14)
−
15
= 5 V, R = 1 kW
PZH
L
= 3.3 V, R = 1 kW
L
= 2.5 V, R = 1 kW
L
Logic High to High Impedance
Output Delay (Note 15)
−
25
= 5 V, R = 1 kW
PHZ
L
= 3.3 V, R = 1 kW
L
= 2.5 V, R = 1 kW
L
8. Propagation delay t
signal.
is measured from the 50% level of the falling edge of the input pulse to the 50% level of the falling edge of the V
O
PHL
9. Propagation delay t
is measured from the 50% level of the rising edge of the input pulse to the 50% level of the rising edge of the V signal.
O
PLH
10.PWD is defined as | t
– t
PLH
| for any given device.
PHL
11. Part−to−part propagation delay skew is the difference between the measured propagation delay times of a specified channel of any two parts
at identical operating conditions and equal load.
12.Enable delay t
is measured from the 50% level of the rising edge of the EN pulse to the 50% of the falling edge of the V signal as it switches
PZL
O
from high impedance state to low state.
13.Disable delay t is measured from the 50% level of the falling edge of the EN pulse to 0.5 V level of the rising edge of the V signal as
PLZ
O
it switches from low state to high impedance state.
14.Enable delay t is measured from the 50% level of the rising edge of the EN pulse to the 50% of the rising edge of the V signal as it switches
PZH
O
from high impedance state to high state.
15.Disable delay t is measured from the 50% level of the falling edge of the EN pulse to V − 0.5 V level of the falling edge of the V signal
PHZ
OH
O
as it switches from high state to high impedance state.
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NCID9401, NCID9411
SWITCHING CHARACTERISTICS – NCID9411
Apply over all recommended conditions, T =−40°C to +125°C unless otherwise specified. All typical values are measured at T = 25°C.
A
A
Symbol
t
Parameter
Ch
Conditions
= 5 V, C = 15 pF
Min
Typ
Max
Unit
Figure
Propagation Delay to Logic
Low Output (Note 8)
A, B, C
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
−
115
170
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
ns
9, 10, 13
PHL
L
= 3.3 V, C = 15 pF
L
= 2.5 V, C = 15 pF
L
D
A,B,C
D
= 5 V, C = 15 pF
−
−
77
117
78
26
13
−
110
170
110
70
40
70
−
L
= 3.3 V, C = 15 pF
L
= 2.5 V, C = 15 pF
L
t
Propagation Delay to Logic
High Output (Note 9)
= 5 V, C = 15 pF
L
PLH
= 3.3 V, C = 15 pF
L
= 2.5 V, C = 15 pF
L
= 5 V, C = 15 pF
−
L
= 3.3 V, C = 15 pF
L
= 2.5 V, C = 15 pF
L
PWD
Pulse Width Distortion
A,B,C
D
= 5 V, C = 15 pF
−70
−40
−70
−
L
| t
PHL
– t
| (Note 10)
PLH
= 3.3 V, C = 15 pF
L
= 2.5 V, C = 15 pF
L
= 5 V, C = 15 pF
L
= 3.3 V, C = 15 pF
L
= 2.5 V, C = 15 pF
L
t
Propagation Delay Skew
(Part to Part) (Note 11)
All
= 5 V, C = 15 pF
L
PSK(PP)
= 3.3 V, C = 15 pF
L
= 2.5 V, C = 15 pF
L
t
R
Output Rise Time
(10% to 90%)
All
= 5 V, C = 15 pF
3
L
= 3.3 V, C = 15 pF
L
= 2.5 V, C = 15 pF
L
t
F
Output Fall Time
(90% to 10%)
All
= 5 V, C = 15 pF
−
2
−
L
= 3.3 V, C = 15 pF
L
= 2.5 V, C = 15 pF
L
t
t
High Impedance to Logic
Low Output Delay (Note 12)
All
−
8.5
25
25
1
14
= 5 V, R = 1 kW
PZL
L
= 3.3 V, R = 1 kW
10.2
12.6
10.8
14.6
17.8
0.54
0.50
0.50
11.6
12.9
14.6
L
= 2.5 V, R = 1 kW
L
Logic Low to High Impedance
Output Delay (Note 13)
All
−
= 5 V, R = 1 kW
PLZ
L
= 3.3 V, R = 1 kW
L
= 2.5 V, R = 1 kW
L
t
t
High Impedance to Logic High
Output Delay (Note 14)
All
−
15
= 5 V, R = 1 kW
PZH
L
= 3.3 V, R = 1 kW
L
= 2.5 V, R = 1 kW
L
Logic High to High Impedance
Output Delay (Note 15)
All
−
25
= 5 V, R = 1 kW
PHZ
L
= 3.3 V, R = 1 kW
L
= 2.5 V, R = 1 kW
L
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8
NCID9401, NCID9411
TYPICAL PERFORMANCE CHARACTERISTICS
12
11
12
T = 25°C
T = 25°C
A
A
LOAD = No Load
LOAD = 15 pF
11
I
V
= 5 V
I
V
= 5 V
DD2 DD
DD2 DD
I
V
= 3.3 V
DD2 DD
I
V
= 3.3 V
DD2 DD
10
9
10
9
I
V
= 2.5 V
DD2 DD
I
V
= 2.5 V
DD2 DD
I
V
= 5 V
I
V
= 3.3 V
I
V
= 2.5 V
I
V
= 5 V
I
V
= 3.3 V
I
V
= 2.5 V
DD1 DD
DD1 DD
DD1 DD
DD1 DD
DD1 DD
DD1 DD
8
8
7
7
0
2
4
6
8
10
0
2
4
6
8
10
Data Rate (Mbps)
Data Rate (Mbps)
Figure 3. NCID9401 Supply Current vs. Data Rate
(No Load)
Figure 4. NCID9401 Supply Current vs. Data Rate
(Load = 15 pF)
12
12
T = 25°C
T = 25°C
A
A
LOAD = 15 pF
LOAD = No Load
I
V
= 5 V
DD2 DD
I
V
= 5 V
DD2 DD
11
11
I
V
= 3.3 V
DD2 DD
I
V
= 3.3 V
DD2 DD
I
V
= 2.5 V
DD2 DD
I
V
= 2.5 V
DD2 DD
10
9
10
9
8
8
I
V
= 5 V
I
V
= 3.3 V
I
V
= 2.5 V
DD1 DD
DD1 DD
DD1 DD
I
V
= 5 V
I
V
= 3.3 V
I
V
= 2.5 V
DD1 DD
DD1 DD
DD1 DD
7
7
0
2
4
6
8
10
0
2
4
6
8
10
Data Rate (Mbps)
Data Rate (Mbps)
Figure 5. NCID9411 Supply Current vs. Data Rate
(No Load)
Figure 6. NCID9411 Supply Current vs. Data Rate
(Load = 15 pF)
3.0
150
V
DD
= 2.5 V to 5 V
Ch A/B/C/D
2.5
140
130
120
V
t
UVLO+
PHL
t
PLH
V
UVLO−
2.0
1.5
−40 −20
0
20
40
60
80 100 120
−40 −20
0
20
40
60
80 100 120
T
A
− Ambient Temperature (5C)
T
A
− Ambient Temperature (5C)
Figure 7. Supply Voltage UVLO Threshold vs.
Ambient Temperature
Figure 8. NCID9401 Propagation Delay vs. Ambient
Temperature
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9
NCID9401, NCID9411
TYPICAL PERFORMANCE CHARACTERISTICS (Continued)
130
125
120
90
V
= 2.5 V to 5 V
V
Ch D
= 2.5 V to 5 V
DD
DD
Ch A/B/C
85
80
t
PHL
t
PHL
t
PLH
115
110
75
70
t
PLH
105
100
65
60
−40 −20
0
20
40
60
80 100 120
−40 −20
0
20
40
60
80 100 120
T
A
− Ambient Temperature (5C)
T
A
− Ambient Temperature (5C)
Figure 9. NCID9411 Channel A/B/C Propagation Delay
vs. Ambient Temperature
Figure 10. NCID9411 Channel D Propagation Delay vs.
Ambient Temperature
130
1.0
T = 25°C
A
T = 25°C
A
125
120
0.8
0.6
V
= 5 V
DD
V
= 2.5 V
DD
V
= 3.3 V
DD
115
110
V
V
= 3.3 V
= 2.5 V
DD
DD
0.4
0.2
0.0
V
= 5 V
DD
105
100
−10
−8
−6
−4
−2
0
0
2
4
6
8
10
I
− High Level Output Current (mA)
I
− Low Level Output Current (mA)
OH
OL
Figure 11. High Level Output Voltage vs. Current
Figure 12. Low Level Output Voltage vs. Current
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10
NCID9401, NCID9411
TEST CIRCUITS
50%
V
I
V
DDI
V
DDO
V
I
V
O
+
−
+
−
t
t
PHL
PLH
V
IN
90%
10%
V
EN
50%
+
−
C
L
V
O
t
R
t
F
Figure 13. VIN to VO Propagation Delay Test Circuit and Waveform
R
1 kW
L
50%
V
I
V
DDI
V
DDO
V
O
+
+
−
t
t
PZL
PLZ
−
V
I
V
IN
0.5 V
V
O
+
−
50%
C
L
V
EN
Figure 14. EN to Logic Low VO Propagation Delay Test Circuit and Waveform
50%
V
I
V
DDO
V
DDI
V
O
+
−
+
−
t
t
PZH
PHZ
V
I
V
IN
1 kW
R
C
L
+
−
L
0.5 V
50%
V
O
V
EN
Figure 15. EN to Logic High VO Propagation Delay Test Circuit and Waveform
1
V
V
DDI
S at 0, VO remain consistently low
S at 1, VO remain consistently high
DDO
V
V
O
IN
2
S
0
S at 2, VO data same as V data
IN
SCOPE
V
CM
Figure 16. Common Mode Transient Immunity Test Circuit
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11
NCID9401, NCID9411
APPLICATION INFORMATION
Theory of Operation
In the layout with digital isolators, it is required that the
isolated circuits have separate ground and power planes. The
section below the device should be clear with no power,
ground or signal traces. Maintain a gap equal to or greater
than the specified minimum creepage clearance of the
device package.
NCID9401 and NCID9411 are quad−channel digital
isolators. Each channel enables communication between
two isolated circuits. It uses off−chip ceramic capacitors that
serve both as the isolation barrier and as the medium of
transmission for signal switching using On−Off keying
(OOK) technique, illustrated in the single channel
operational block diagram in Figure 17.
Signal Lines / VDD2 Fill
Signal Lines / VDD1 Fill
At the transmitter side, the V input logic state is
IN
GND1
Plane
GND2
Plane
modulated with a high frequency carrier signal. The
resulting signal is amplified and transmitted to the isolation
barrier. The receiver side detects the barrier signal and
demodulates it using an envelope detection technique. The
No Trace
VDD1 Plane
VDD2 Plane
Signal Lines / GND2 Fill
Signal Lines / GND1 Fill
Figure 19. 4−Layer PCB for Digital Isolator
output signal determines the V output logic state when the
O
output enable control EN is at high. When EN is at low,
It is highly advised to connect at least a pair of low ESR
supply bypass capacitors, placed within 2mm from the
power supply pins 1 and 16 and ground pins 2 and 15.
Recommended values are 1 mF and 0.1 mF, respectively.
output V is at high impedance state. V is at default state
O
O
low when the power supply at the transmitter side is turned
off or the input V is disconnected.
IN
Place them between the V pins of the device and the via
DD
ISOLATION
TRANSMITTER
EN
RECEIVER
BARRIER
to the power planes, with the higher frequency, lower value
capacitor closer to the device pins. Directly connect the
device ground pins 2, 8, 9 and 15 by via to their
corresponding ground planes.
TX
Amplifier
OOK
Modulator
RX
Amplifier
Envelope
Detector
V
V
O
IO
IN
OFF−CHIP
CAPACITORS
OSC
Figure 17. Operational Block Diagram of
Single Channel
1 mF 0.1 mF
0.1 mF 1 mF
V
V
DD2
GND2
DD1
GND1
V
IN
ISOLATION
BARRIER
SIGNAL
GND1
GND2
V
O
Figure 20. Placement of Bypass Capacitors
Figure 18. On−Off Keying Modulation Signals
Over Temperature Detection
NCID9401 and NCID9411 have built−in Over
Temperature Detection (OTD) feature that protects the IC
from thermal damage. The output pins will automatically
switch to default state when the ambient temperature
exceeds the maximum junction temperature at threshold of
approximately 160°C. The device will return to normal
operation when the temperature decreases approximately
20°C below the OTD threshold.
Layout Recommendation
Layout of the digital circuits relies on good suppression of
unwanted noise and electromagnetic interference. It is
recommended to use 4−layer FR4 PCB, with ground plane
below the components, power plane below the ground plane,
signal lines and power fill on top, and signal lines and ground
fill at the bottom. The alternating polarities of the layers
creates interplane capacitances that aids the bypass
capacitors required for reliable operation at digital
switching rates.
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12
NCID9401, NCID9411
ORDERING INFORMATION
Part Number
†
Grade
Package
SOIC16 W
SOIC16 W
SOIC16 W
SOIC16 W
SOIC16 W
SOIC16 W
SOIC16 W
SOIC16 W
Shipping
NCID9401
Industrial
Industrial
50 Units / Tube
750 Units / Tape & Reel
50 Units / Tube
NCID9401R2
NCID9411
Industrial
NCID9411R2
Industrial
750 Units / Tape & Reel
50 Units / Tube
NCIV9401* (pending)
NCIV9401R2* (pending)
NCIV9411* (pending)
NCIV9411R2* (pending)
Automotive
Automotive
Automotive
Automotive
750 Units / Tape & Reel
50 Units / Tube
750 Units / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*NCIV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP
Capable.
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13
NCID9401, NCID9411
PACKAGE DIMENSIONS
SOIC16 W
CASE 751EN
ISSUE O
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14
NCID9401, NCID9411
2
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