NCP163AMX330TBG [ONSEMI]

250 mA, Ultra-Low Noise and High PSRR LDO Regulator;
NCP163AMX330TBG
型号: NCP163AMX330TBG
厂家: ONSEMI    ONSEMI
描述:

250 mA, Ultra-Low Noise and High PSRR LDO Regulator

输出元件 调节器
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中文:  中文翻译
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NCP163  
250 mA, Ultra-Low Noise  
and High PSRR LDO  
Regulator for RF and  
Analog Circuits  
www.onsemi.com  
The NCP163 is a next generation of high PSRR, ultra−low noise  
LDO capable of supplying 250 mA output current. Designed to meet  
the requirements of RF and sensitive analog circuits, the NCP163  
device provides ultra−low noise, high PSRR and low quiescent  
current. The device also offer excelent load/line transients. The  
NCP163 is designed to work with a 1 uF input and a 1 mF output  
ceramic capacitor. It is available in two thickness ultra−small 0.35P,  
0.65 mm x 0.65 mm Chip Scale Package (CSP) and XDFN4 0.65P,  
1 mm x 1 mm.  
MARKING  
DIAGRAMS  
X
A1  
A1  
WLCSP4  
CASE 567JZ  
Features  
X
Operating Input Voltage Range: 2.2 V to 5.5 V  
Available in Fixed Voltage Option: 1.2 V to 5.3 V  
WLCSP4  
CASE 567KA  
2% Accuracy Over Load/Temperature  
Ultra Low Quiescent Current Typ. 12 mA  
Standby Current: Typ. 0.1 mA  
1
XX M  
XDFN4  
CASE 711AJ  
1
Very Low Dropout: 80 mV at 250 mA  
Ultra High PSRR: Typ. 92 dB at 20 mA, f = 1 kHz  
X or XX = Specific Device Code  
Ultra Low Noise: 6.5 mV  
RMS  
M
= Date Code  
Stable with a 1 mF Small Case Size Ceramic Capacitors  
Available in −WLCSP4 0.65 mm x 0.65 mm x 0.33 mm  
−WLCSP4 0.65 mm x 0.65 mm x 0.4 mm  
−XDFN4 1 mm x 1 mm x 0.4 mm  
PIN CONNECTIONS  
IN  
OUT  
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS  
A2  
A1  
Compliant  
Typical Applications  
B1  
B2  
Battery−powered Equipment  
Wireless LAN Devices  
EN  
GND  
Smartphones, Tablets  
(Top View)  
Cameras, DVRs, STB and Camcorders  
V
V
OUT  
IN  
IN  
OUT  
NCP163  
GND  
C
1 mF  
Ceramic  
EN  
IN  
C
OUT  
1 mF  
Ceramic  
ON  
OFF  
(Top View)  
ORDERING INFORMATION  
See detailed ordering, marking and shipping information on  
page 11 of this data sheet.  
Figure 1. Typical Application Schematics  
© Semiconductor Components Industries, LLC, 2016  
1
Publication Order Number:  
October, 2016 − Rev. 0  
NCP163/D  
NCP163  
IN  
ENABLE  
LOGIC  
THERMAL  
EN  
SHUTDOWN  
BANDGAP  
MOSFET  
REFERENCE  
INTEGRATED  
SOFT−START  
DRIVER WITH  
CURRENT LIMIT  
OUT  
* ACTIVE DISCHARGE  
Version A only  
EN  
GND  
Figure 2. Simplified Schematic Block Diagram  
PIN FUNCTION DESCRIPTION  
Pin No.  
WLCSP4  
Pin No.  
XDFN4  
Pin  
Name  
Description  
A1  
A2  
B1  
B2  
4
IN  
Input voltage supply pin  
1
3
OUT  
EN  
Regulated output voltage. The output should be bypassed with small 1 mF ceramic capacitor.  
Chip enable: Applying V < 0.4 V disables the regulator, Pulling V > 1.2 V enables the LDO.  
EN  
EN  
2
GND  
EPAD  
Common ground connection  
EPAD  
Expose pad can be tied to ground plane for better power dissipation  
ABSOLUTE MAXIMUM RATINGS  
Rating  
Symbol  
Value  
Unit  
V
Input Voltage (Note 1)  
V
IN  
−0.3 V to 6  
Output Voltage  
V
OUT  
−0.3 to V + 0.3, max. 6 V  
V
IN  
Chip Enable Input  
V
CE  
−0.3 to V + 0.3, max. 6 V  
V
IN  
Output Short Circuit Duration  
Maximum Junction Temperature  
Storage Temperature  
t
unlimited  
150  
s
SC  
T
°C  
°C  
V
J
T
STG  
−55 to 150  
2000  
ESD Capability, Human Body Model (Note 2)  
ESD Capability, Machine Model (Note 2)  
ESD Capability, Charged Device Model (Note 2)  
ESD  
HBM  
ESD  
200  
V
MM  
ESD  
1000  
V
CDM  
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality  
should not be assumed, damage may occur and reliability may be affected.  
1. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area.  
2. This device series incorporates ESD protection and is tested by the following methods:  
ESD Human Body Model tested per EIA/JESD22−A114  
ESD Machine Model tested per EIA/JESD22−A115  
ESD Charged Device Model tested per EIA/JESD22−C101, Field Induced Charge Model  
Latchup Current Maximum Rating tested per JEDEC standard: JESD78.  
THERMAL CHARACTERISTICS  
Rating  
Symbol  
Value  
108  
Unit  
Thermal Characteristics, WLCSP4 (Note 3), Thermal Resistance, Junction−to−Air  
Thermal Characteristics, XDFN4 (Note 3), Thermal Resistance, Junction−to−Air  
R
°C/W  
q
JA  
198.1  
3. Measured according to JEDEC board specification. Detailed description of the board can be found in JESD51−7  
www.onsemi.com  
2
 
NCP163  
ELECTRICAL CHARACTERISTICS −40°C T 125°C; V = V  
+ 1 V; I  
= 1 mA, C = C  
= 1 mF, unless otherwise  
J
IN  
OUT(NOM)  
OUT  
IN  
OUT  
noted. V = 1.2 V. Typical values are at T = +25°C (Note 4).  
EN  
J
Parameter  
Test Conditions  
Symbol  
Min  
Typ  
Max  
Unit  
Operating Input Voltage  
Output Voltage Accuracy  
V
2.2  
5.5  
V
IN  
V
V
= (V  
0 mA I  
+ 1 V) to 5.5 V  
250 mA  
IN  
OUT(NOM)  
V
−2  
−3  
+2  
+3  
%
%
OUT  
OUT  
OUT  
= (V  
+ 1 V) to 5.5 V  
IN  
OUT(NOM)  
0 mA I  
OUT  
250 mA  
V
OUT  
(for V  
V
< 1.8 V, XDFN4 package)  
Line Regulation  
+ 1 V V 5.5 V  
Line  
Reg  
0.02  
0.001  
80  
%/V  
%/mA  
mV  
OUT(NOM)  
IN  
Load Regulation  
I
= 1 mA to 250 mA  
Load  
Reg  
OUT  
Dropout Voltage (Note 5)  
Output Current Limit  
Short Circuit Current  
Quiescent Current  
Shutdown Current  
I
= 250 mA  
V
= 3.3 V  
V
DO  
145  
OUT  
OUT(NOM)  
V
OUT  
= 90% V  
I
250  
1.2  
700  
690  
12  
OUT(NOM)  
CL  
SC  
mA  
V
OUT  
= 0 V  
I
I
= 0 mA  
I
Q
20  
1
mA  
mA  
OUT  
V
EN  
0.4 V, V = 4.8 V  
I
0.01  
IN  
DIS  
EN Pin Threshold Voltage  
EN Input Voltage “H”  
EN Input Voltage “L”  
V
ENH  
V
V
ENL  
0.4  
0.5  
EN Pull Down Current  
Turn−On Time  
V
EN  
= 4.8 V  
I
0.2  
mA  
ms  
EN  
C
= 1 mF, From assertion of V to  
EN  
OUT  
120  
V
OUT  
= 95% V  
OUT(NOM)  
Power Supply Rejection Ratio  
I
= 20 mA  
f = 100 Hz  
91  
92  
85  
60  
OUT  
f = 1 kHz  
f = 10 kHz  
f = 100 kHz  
PSRR  
dB  
Output Voltage Noise  
f = 10 Hz to 100 kHz  
I
= 1 mA  
= 250 mA  
8.0  
6.5  
OUT  
V
N
mV  
RMS  
I
OUT  
Thermal Shutdown Threshold  
Temperature rising  
Temperature falling  
T
160  
140  
280  
°C  
°C  
W
SDH  
T
SDL  
Active Output Discharge Resistance  
Line Transient (Note 6)  
V
< 0.4 V, Version A only  
R
DIS  
EN  
V
IN  
= (V  
+ 1 V) to (V  
+
OUT(NOM)  
OUT(NOM)  
−1  
1.6 V) in 30 ms, I  
= 1 mA  
OUT  
Tran  
mV  
mV  
LINE  
V
IN  
= (V  
+ 1.6 V) to (V  
+
OUT(NOM)  
OUT(NOM)  
+1  
1 V) in 30 ms, I  
= 1 mA  
OUT  
Load Transient (Note 6)  
−40  
I
= 1 mA to 200 mA in 10 ms  
= 200 mA to 1mA in 10 ms  
OUT  
Tran  
LOAD  
I
+40  
OUT  
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product  
performance may not be indicated by the Electrical Characteristics if operated under different conditions.  
4. Performance guaranteed over the indicated operating temperature range by design and/or characterization. Production tested at T = 25°C.  
A
Low duty cycle pulse techniques are used during the testing to maintain the junction temperature as close to ambient as possible.  
5. Dropout voltage is characterized when V  
6. Guaranteed by design.  
falls 100 mV below V  
.
OUT  
OUT(NOM)  
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3
 
NCP163  
TYPICAL CHARACTERISTICS  
1.830  
1.825  
1.820  
1.815  
1.810  
3.330  
3.325  
3.320  
I = 10 mA  
OUT  
I
= 10 mA  
OUT  
3.315  
3.310  
3.305  
3.295  
3.290  
3.285  
3.280  
1.805  
1.800  
1.795  
1.790  
I
= 250 mA  
OUT  
I
= 250 mA  
OUT  
V
V
C
C
= 2.8 V  
V
V
C
C
= 4.3 V  
IN  
IN  
= 1.8 V  
= 1 mF  
= 3.3 V  
= 1 mF  
OUT  
OUT  
IN  
IN  
1.785  
1.780  
= 1 mF  
= 1 mF  
OUT  
OUT  
−40 −20  
0
20  
40  
60  
80 100 120 140  
−40 −20  
0
20  
40  
60  
80  
100 120 140  
T , JUNCTION TEMPERATURE (°C)  
J
T , JUNCTION TEMPERATURE (°C)  
J
Figure 3. Output Voltage vs. Temperature −  
OUT = 1.8 V − XDFN Package  
Figure 4. Output Voltage vs. Temperature −  
OUT = 3.3 V − XDFN Package  
V
V
5.040  
5.035  
5.030  
5.025  
5.020  
5.015  
5.010  
5.005  
5.000  
0.050  
0.040  
0.030  
0.020  
I
= 10 mA  
OUT  
0.010  
0.000  
I
= 250 mA  
OUT  
−0.010  
−0.020  
−0.030  
−0.040  
−0.050  
V
V
C
C
= 2.8 V  
IN  
V
V
C
C
= 5.5 V  
IN  
= 1.8 V  
OUT  
= 5.0 V  
= 1 mF  
OUT  
= 1 mF  
IN  
IN  
4.995  
4.990  
= 1 mF  
OUT  
= 1 mF  
OUT  
−40 −20  
0
20  
40  
60  
80  
100 120 140  
−40 −20  
0
20  
40  
60  
80 100 120 140  
T , JUNCTION TEMPERATURE (°C)  
J
T , JUNCTION TEMPERATURE (°C)  
J
Figure 5. Output Voltage vs. Temperature −  
OUT = 5.0 V − XDFN Package  
Figure 6. Line Regulation vs. Temperature −  
OUT = 1.8 V  
V
V
0.050  
0.040  
20  
18  
16  
14  
12  
10  
8
V
V
C
C
= 2.8 V  
IN  
= 1.8 V  
= 1 mF  
OUT  
0.030  
IN  
0.020  
= 1 mF  
OUT  
0.010  
0.000  
−0.010  
−0.020  
−0.030  
−0.040  
−0.050  
6
V
V
C
C
= 4.3 V  
IN  
4
= 3.3 V  
= 1 mF  
OUT  
IN  
2
= 1 mF  
OUT  
0
−40 −20  
0
20  
40  
60  
80  
100 120 140  
−40 −20  
0
20  
40  
60  
80 100 120 140  
T , JUNCTION TEMPERATURE (°C)  
J
T , JUNCTION TEMPERATURE (°C)  
J
Figure 7. Line Regulation vs. Temperature −  
OUT = 3.3 V  
Figure 8. Load Regulation vs. Temperature −  
VOUT = 1.8 V  
V
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4
NCP163  
TYPICAL CHARACTERISTICS  
20  
18  
16  
14  
12  
10  
8
20  
18  
16  
14  
12  
10  
8
V
V
C
C
= 4.3 V  
IN  
= 3.3 V  
= 1 mF  
OUT  
IN  
= 1 mF  
OUT  
6
6
V
V
C
C
= 5.5 V  
IN  
= 5.0 V  
= 1 mF  
OUT  
4
4
IN  
2
2
= 1 mF  
OUT  
0
0
−40 −20  
0
20  
40  
60  
80 100 120 140  
−40 −20  
0
20  
40  
60  
80 100 120 140  
T , JUNCTION TEMPERATURE (°C)  
J
T , JUNCTION TEMPERATURE (°C)  
J
Figure 9. Load Regulation vs. Temperature −  
Figure 10. Load Regulation vs. Temperature −  
VOUT = 5.0 V  
V
OUT = 3.3 V  
1500  
1350  
1200  
1050  
900  
750  
600  
450  
300  
150  
0
1500  
1350  
1200  
1050  
900  
750  
600  
450  
300  
150  
0
T = 125°C  
T = 125°C  
J
J
T = 25°C  
J
T = 25°C  
J
T = −40°C  
J
T = −40°C  
J
V
V
C
C
= 2.8 V  
V
V
C
C
= 4.3 V  
IN  
IN  
= 1.8 V  
= 1 mF  
= 3.3 V  
= 1 mF  
OUT  
OUT  
IN  
IN  
= 1 mF  
= 1 mF  
OUT  
OUT  
0
25 50 75 100 125 150 175 200 225 250  
, OUTPUT CURRENT (mA)  
0
25 50 75 100 125 150 175 200 225 250  
, OUTPUT CURRENT (mA)  
I
I
OUT  
OUT  
Figure 11. Ground Current vs. Load Current −  
Figure 12. Ground Current vs. Load Current −  
V
OUT = 1.8 V  
V
OUT = 3.3 V  
1500  
250  
225  
200  
175  
150  
125  
100  
75  
V
C
C
= 1.8 V  
= 1 mF  
= 1 mF  
OUT  
1350  
1200  
1050  
900  
IN  
T = 125°C  
J
OUT  
T = 125°C  
J
T = 25°C  
J
T = 25°C  
J
750  
T = −40°C  
J
T = −40°C  
J
600  
450  
V
V
C
C
= 5.5 V  
IN  
300  
= 5.5 V  
= 1 mF  
50  
OUT  
IN  
150  
25  
= 1 mF  
OUT  
0
0
0
0
25 50 75 100 125 150 175 200 225 250  
, OUTPUT CURRENT (mA)  
0
25 50 75 100 125 150 175 200 225 250  
, OUTPUT CURRENT (mA)  
I
I
OUT  
OUT  
Figure 13. Ground Current vs. Load Current −  
OUT = 5.0 V  
Figure 14. Dropout Voltage vs. Load Current −  
VOUT = 1.8 V  
V
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5
NCP163  
TYPICAL CHARACTERISTICS  
150  
135  
120  
105  
90  
150  
135  
120  
T = 125°C  
J
105  
90  
T = 25°C  
J
T = 125°C  
J
75  
75  
T = 25°C  
J
60  
60  
T = −40°C  
J
45  
45  
T = −40°C  
J
V
C
C
= 3.3 V  
= 1 mF  
= 1 mF  
V
OUT  
= 5.0 V  
OUT  
30  
30  
C
C
= 1 mF  
IN  
IN  
15  
0
15  
0
= 1 mF  
OUT  
OUT  
0
25 50 75 100 125 150 175 200 225 250  
, OUTPUT CURRENT (mA)  
0
25 50 75 100 125 150 175 200 225 250  
, OUTPUT CURRENT (mA)  
I
I
OUT  
OUT  
Figure 15. Dropout Voltage vs. Load Current −  
OUT = 3.3 V  
Figure 16. Dropout Voltage vs. Load Current −  
VOUT = 5.0 V  
V
1000  
100  
10  
1 mA  
10 mA  
250 mA  
RMS Output Noise (mV)  
10 Hz − 100 kHz 100 Hz − 100 kHz  
I
OUT  
1 mA  
10 mA  
250 mA  
7.73  
7.12  
7.11  
6.99  
6.26  
6.33  
V
V
C
C
= 2.8 V  
IN  
= 1.8 V  
= 1 mF  
OUT  
IN  
= 1 mF  
OUT  
1
10  
100  
1000  
10k  
100k  
1M  
FREQUENCY (Hz)  
Figure 17. Output Voltage Noise Spectral Density – VOUT = 1.8 V  
1000  
1 mA  
10 mA  
250 mA  
RMS Output Noise (mV)  
10 Hz − 100 kHz 100 Hz − 100 kHz  
I
OUT  
100  
10  
1
1 mA  
10 mA  
250 mA  
7.9  
7.07  
6.25  
6.38  
7.19  
7.29  
V
= 3.8 V  
= 2.8 V  
= 1 mF  
IN  
V
OUT  
C
C
IN  
= 1 mF  
OUT  
10  
100  
1000  
10k  
100k  
1M  
FREQUENCY (Hz)  
Figure 18. Output Voltage Noise Spectral Density – VOUT = 2.8 V  
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NCP163  
TYPICAL CHARACTERISTICS  
120  
100  
80  
60  
40  
20  
0
120  
V
V
C
= 4.3 V+100mV  
= 3.3 V  
V
V
C
= 2.8 V+100mV  
pp  
IN  
pp  
IN  
= 1.8 V  
OUT  
OUT  
100  
80  
60  
40  
20  
0
= 1 mF MLCC 1206  
= 1 mF MLCC 1206  
OUT  
OUT  
1 mA  
1 mA  
10 mA  
20 mA  
100 mA  
250 mA  
10 mA  
20 mA  
100 mA  
250 mA  
10  
100  
1000  
10k  
100k  
1M  
10M  
10  
100  
1000  
10k  
100k  
1M  
10M  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
Figure 19. Power Supply Rejection −  
Figure 20. Power Supply Rejection−  
VOUT = 3.3 V  
V
OUT = 1.8 V  
120  
100  
80  
60  
40  
20  
1 mA  
10 mA  
20 mA  
100 mA  
250 mA  
V
V
C
= 5.5 V+100mV  
pp  
IN  
= 5.0 V  
OUT  
= 1 mF MLCC 1206  
OUT  
0
10  
100  
1000  
10k  
100k  
1M  
10M  
FREQUENCY (Hz)  
Figure 21. Power Supply Rejection −  
OUT = 5.0 V  
V
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7
NCP163  
APPLICATIONS INFORMATION  
General  
transient response or high frequency PSRR. It is not  
The NCP163 is an ultra−low noise 250 mA low dropout  
recommended to use tantalum capacitors on the output due  
to their large ESR. The equivalent series resistance of  
tantalum capacitors is also strongly dependent on the  
temperature, increasing at low temperature.  
regulator designed to meet the requirements of RF  
applications and high performance analog circuits. The  
NCP163 device provides very high PSRR and excellent  
dynamic response. In connection with low quiescent current  
this device is well suitable for battery powered application  
such as cell phones, tablets and other. The NCP163 is fully  
protected in case of current overload, output short circuit and  
overheating.  
Enable Operation  
The NCP163 uses the EN pin to enable/disable its device  
and to deactivate/activate the active discharge function.  
If the EN pin voltage is <0.4 V the device is guaranteed to  
be disabled. The pass transistor is turned−off so that there is  
virtually no current flow between the IN and OUT. The  
active discharge transistor is active so that the output voltage  
Input Capacitor Selection (CIN)  
Input capacitor connected as close as possible is necessary  
for ensure device stability. The X7R or X5R capacitor  
should be used for reliable performance over temperature  
range. The value of the input capacitor should be 1 mF or  
greater to ensure the best dynamic performance. This  
capacitor will provide a low impedance path for unwanted  
AC signals or noise modulated onto constant input voltage.  
There is no requirement for the ESR of the input capacitor  
but it is recommended to use ceramiccapacitors for their low  
ESR and ESL. A good input capacitor will limit the  
influence of input trace inductance and source resistance  
during sudden load current changes.  
V
OUT  
is pulled to GND through a 280 Ω resistor. In the  
disable state the device consumes as low as typ. 10 nA from  
the V .  
IN  
If the EN pin voltage >1.2 V the device is guaranteed to  
be enabled. The NCP163 regulates the output voltage and  
the active discharge transistor is turned−off.  
The EN pin has internal pull−down current source with  
typ. value of 200 nA which assures that the device is  
turned−off when the EN pin is not connected. In the case  
where the EN function isn’t required the EN should be tied  
directly to IN.  
Output Decoupling (COUT  
)
Output Current Limit  
The NCP163 requires an output capacitor connected as  
close as possible to the output pin of the regulator. The  
recommended capacitor value is 1 mF and X7R or X5R  
dielectric due to its low capacitance variations over the  
specified temperature range. The NCP163 is designed to  
remain stable with minimum effective capacitance of 0.7 mF  
to account for changes with temperature, DC bias and  
package size. Especially for small package size capacitors  
such as 0201 the effective capacitance drops rapidly with the  
applied DC bias. Please refer Figure 22.  
Output Current is internally limited within the IC to a  
typical 700 mA. The NCP163 will source this amount of  
current measured with a voltage drops on the 90% of the  
nominal V  
. If the Output Voltage is directly shorted to  
= 0 V), the short circuit protection will limit  
OUT  
ground (V  
OUT  
the output current to 690 mA (typ). The current limit and  
short circuit protection will work properly over whole  
temperature range and also input voltage range. There is no  
limitation for the short circuit duration.  
Thermal Shutdown  
When the die temperature exceeds the Thermal Shutdown  
threshold (T − 160°C typical), Thermal Shutdown event  
SD  
is detected and the device is disabled. The IC will remain in  
this state until the die temperature decreases below the  
Thermal Shutdown Reset threshold (T  
− 140°C typical).  
SDU  
Once the IC temperature falls below the 140°C the LDO is  
enabled again. The thermal shutdown feature provides the  
protection from a catastrophic device failure due to  
accidental overheating. This protection is not intended to be  
used as a substitute for proper heat sinking.  
Power Dissipation  
As power dissipated in the NCP163 increases, it might  
become necessary to provide some thermal relief. The  
maximum power dissipation supported by the device is  
dependent upon board design and layout. Mounting pad  
configuration on the PCB, the board material, and the  
ambient temperature affect the rate of junction temperature  
rise for the part.  
Figure 22. Capacity vs DC Bias Voltage  
There is no requirement for the minimum value of  
Equivalent Series Resistance (ESR) for the C  
but the  
OUT  
maximum value of ESR should be less than 2 W. Larger  
output capacitors and lower ESR could improve the load  
www.onsemi.com  
8
 
NCP163  
The maximum power dissipation the NCP163 can handle  
The power dissipated by the NCP163 for given  
application conditions can be calculated from the following  
equations:  
is given by:  
o
ƪ
ƫ
125 C * TA  
PD(MAX)  
+
(eq. 1)  
ǒ
Ǔ
(eq. 2)  
PD [ VIN @ IGND ) IOUT VIN * VOUT  
qJA  
160  
150  
140  
130  
120  
110  
100  
90  
1.6  
P
P
, T = 25°C, 2 oz Cu  
D(MAX)  
A
1.4  
, T = 25°C, 1 oz Cu  
1.2  
1.0  
0.8  
0.6  
0.4  
D(MAX)  
A
q
, 1 oz Cu  
JA  
JA  
q
, 2 oz Cu  
500  
0.2  
0
80  
0
100  
200  
300  
400  
600  
700  
2
PCB COPPER AREA (mm )  
Figure 23. qJA and PD (MAX) vs. Copper Area (CSP4)  
220  
210  
200  
190  
180  
170  
160  
1.0  
0.9  
q
, 2 oz Cu  
JA  
0.8  
0.7  
0.6  
0.5  
q
, 1 oz Cu  
JA  
P
P
, T = 25°C, 2 oz Cu  
D(MAX)  
A
, T = 25°C, 1 oz Cu  
D(MAX)  
A
0.4  
0.3  
150  
0
100  
200  
300  
400  
500  
600  
700  
2
PCB COPPER AREA (mm )  
Figure 24. qJA and PD (MAX) vs. Copper Area (XDFN4)  
www.onsemi.com  
9
 
NCP163  
Reverse Current  
Turn−On Time  
The PMOS pass transistor has an inherent body diode  
which will be forward biased in the case that V > V .  
The turn−on time is defined as the time period from EN  
assertion to the point in which V will reach 98% of its  
OUT  
IN  
OUT  
Due to this fact in cases, where the extended reverse current  
condition can be anticipated the device may require  
additional external protection.  
nominal value. This time is dependent on various  
application conditions such as V , C , T .  
OUT(NOM) OUT  
A
PCB Layout Recommendations  
To obtain good transient performance and good regulation  
characteristics place C and C capacitors close to the  
Power Supply Rejection Ratio  
The NCP163 features very high Power Supply Rejection  
ratio. If desired the PSRR at higher frequencies in the range  
100 kHz – 10 MHz can be tuned by the selection of C  
capacitor and proper PCB layout.  
IN  
OUT  
device pins and make the PCB traces wide. In order to  
minimize the solution size, use 0402 or 0201 capacitors with  
appropriate capacity. Larger copper area connected to the  
pins will also improve the device thermal resistance. The  
actual power dissipation can be calculated from the equation  
above (Equation 2). Expose pad can be tied to the GND pin  
for improvement power dissipation and lower device  
temperature.  
OUT  
www.onsemi.com  
10  
NCP163  
ORDERING INFORMATION (WLCSP4)  
Voltage  
Option  
Device  
Marking  
Rotation  
Description  
Package  
Shipping  
NCP163AFCS180T2G  
NCP163AFCS260T2G  
NCP163AFCS280T2G  
NCP163AFCS285T2G  
NCP163AFCS290T2G  
NCP163AFCS2925T2G  
NCP163BFCS180T2G  
NCP163BFCS2925T2G  
1.8 V  
Y
4
3
5
6
2
Y
2
180  
180  
180  
180  
180  
180  
270  
270  
2.6 V  
2.8 V  
250 mA, Active Discharge  
WLCSP4  
CASE 567KA  
(Pb-Free)  
5000 /  
Tape &  
Reel  
2.85 V  
2.9 V  
2.925 V  
1.8 V  
250 mA, Non−Active Discharge  
2.925 V  
NCP163AFCT180T2G  
NCP163AFCT260T2G  
NCP163AFCT280T2G  
NCP163AFCT285T2G  
NCP163AFCT290T2G  
NCP163AFCT2925T2G  
NCP163AFCT300T2G  
NCP163BFCT180T2G  
NCP163BFCT2925T2G  
1.8 V  
2.6 V  
Y
6
3
5
4
2
3
Y
2
180  
270  
180  
270  
270  
180  
270  
270  
270  
2.8 V  
2.85 V  
2.9 V  
250 mA, Active Discharge  
WLCSP4  
CASE 567JZ  
(Pb-Free)  
5000 /  
Tape &  
Reel  
2.925 V  
3.0 V  
1.8 V  
250 mA, Non−Active Discharge  
2.925 V  
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging  
Specifications Brochure, BRD8011/D.  
ORDERING INFORMATION (XDFN4)  
Voltage  
Option  
Device  
Marking  
ME  
MG  
MA  
MC  
MH  
MN  
MD  
MM  
MQ  
MR  
MJ  
Description  
Package  
Shipping  
NCP163AMX120TBG*  
NCP163AMX130TBG*  
NCP163AMX180TBG  
NCP163AMX1825TBG  
NCP163AMX190TBG  
NCP163AMX260TBG  
NCP163AMX275TBG  
NCP163AMX280TBG  
NCP163AMX285TBG  
NCP163AMX290TBG  
NCP163AMX300TBG  
NCP163AMX330TBG  
NCP163AMX500TBG  
NCP163BMX180TBG  
NCP163BMX1825TBG  
NCP163BMX275TBG  
1.2 V  
1.3 V  
1.8 V  
1.825 V  
1.9 V  
2.6 V  
2.75 V  
2.8 V  
250 mA, Active Discharge  
XDFN4  
CASE 711AJ  
(Pb-Free)  
3000 /  
Tape &  
Reel  
2.85 V  
2.9 V  
3.0 V  
3.3 V  
MK  
ML  
5.0 V  
1.8 V  
PA  
1.825 V  
2.75 V  
PC  
250 mA, Non−Active Discharge  
PD  
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging  
Specifications Brochure, BRD8011/D.  
*Contact sales office for availability information.  
www.onsemi.com  
11  
NCP163  
PACKAGE DIMENSIONS  
WLCSP4, 0.64x0.64  
CASE 567JZ  
ISSUE A  
NOTES:  
A
E
B
D
1. DIMENSIONING AND TOLERANCING PER  
ASME Y14.5M, 1994.  
2. CONTROLLING DIMENSION: MILLIMETERS.  
3. COPLANARITY APPLIES TO SPHERICAL  
CROWNS OF SOLDER BALLS.  
PIN A1  
REFERENCE  
MILLIMETERS  
DIM  
A
A1  
A2  
b
MIN  
−−−  
0.04  
NOM  
−−−  
0.06  
0.23 REF  
0.210  
0.640  
MAX  
0.33  
0.08  
TOP VIEW  
0.195  
0.610  
0.610  
0.225  
0.670  
0.670  
A2  
D
E
0.640  
0.05  
C
e
0.35 BSC  
A
0.05  
C
RECOMMENDED  
A1  
SEATING  
PLANE  
SOLDERING FOOTPRINT*  
NOTE 3  
C
SIDE VIEW  
PACKAGE  
A1  
OUTLINE  
e
4X  
b
4X0.20  
e
0.35  
PITCH  
0.03  
C A B  
B
0.35  
PITCH  
A
DIMENSIONS: MILLIMETERS  
1
2
*For additional information on our Pb−Free strategy and soldering  
details, please download the ON Semiconductor Soldering and  
Mounting Techniques Reference Manual, SOLDERRM/D.  
BOTTOM VIEW  
WLCSP4, 0.64x0.64  
CASE 567KA  
ISSUE A  
NOTES:  
A
E
B
1. DIMENSIONING AND TOLERANCING PER  
ASME Y14.5M, 1994.  
PIN A1  
REFERENCE  
2. CONTROLLING DIMENSION: MILLIMETERS.  
3. COPLANARITY APPLIES TO SPHERICAL  
CROWNS OF SOLDER BALLS.  
D
MILLIMETERS  
DIM  
A
A1  
A2  
b
MIN  
0.35  
0.14  
NOM  
0.40  
0.16  
0.25 REF  
0.200  
0.640  
MAX  
0.45  
0.18  
TOP VIEW  
0.185  
0.610  
0.610  
0.215  
0.670  
0.670  
A2  
D
E
0.05  
C
0.640  
e
0.35 BSC  
A
0.05  
C
RECOMMENDED  
A1  
SEATING  
PLANE  
SOLDERING FOOTPRINT*  
NOTE 3  
C
SIDE VIEW  
PACKAGE  
A1  
OUTLINE  
e
4X  
b
4X0.20  
e
0.35  
PITCH  
0.05  
0.03  
C
C
A B  
B
0.35  
PITCH  
A
DIMENSIONS: MILLIMETERS  
1
2
*For additional information on our Pb−Free strategy and soldering  
details, please download the ON Semiconductor Soldering and  
Mounting Techniques Reference Manual, SOLDERRM/D.  
BOTTOM VIEW  
www.onsemi.com  
12  
NCP163  
PACKAGE DIMENSIONS  
XDFN4 1.0x1.0, 0.65P  
CASE 711AJ  
ISSUE A  
4X L2  
NOTES:  
A
B
D
1. DIMENSIONING AND TOLERANCING PER  
ASME Y14.5M, 1994.  
2. CONTROLLING DIMENSION: MILLIMETERS.  
3. DIMENSION b APPLIES TO PLATED TERMINAL  
AND IS MEASURED BETWEEN 0.15 AND  
0.20 mm FROM THE TERMINAL TIPS.  
4. COPLANARITY APPLIES TO THE EXPOSED  
PAD AS WELL AS THE TERMINALS.  
PIN ONE  
REFERENCE  
E
4X b2  
2X  
0.05  
C
MILLIMETERS  
DETAIL A  
DIM MIN  
0.33  
A1 0.00  
MAX  
0.43  
0.05  
0.05  
C
2X  
A
TOP VIEW  
A3  
b
b2 0.02  
0.10 REF  
0.15  
0.25  
0.12  
(A3)  
0.05  
0.05  
C
D
1.00 BSC  
D2 0.43  
0.53  
1.00 BSC  
0.65 BSC  
A
E
e
L
C
0.20  
0.30  
0.17  
SEATING  
PLANE  
NOTE 4  
A1  
L2 0.07  
C
SIDE VIEW  
RECOMMENDED  
MOUNTING FOOTPRINT*  
e
e/2  
DETAIL A  
4X L  
D2  
2X  
0.52  
0.65  
1
4
2
PITCH  
PACKAGE  
OUTLINE  
4X  
0.39  
D2  
4X  
0.11  
455  
1.20  
3
4X b  
M
0.05  
C A B  
4X  
4X  
0.26  
0.24  
NOTE 3  
BOTTOM VIEW  
DIMENSIONS: MILLIMETERS  
*For additional information on our Pb−Free strategy and soldering  
details, please download the ON Semiconductor Soldering and  
Mounting Techniques Reference Manual, SOLDERRM/D.  
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NCP163/D  

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