NCP1653ADR2G [ONSEMI]
Compact, Fixed-Frequency, Continuous Conduction Mode PFC Controller; 紧凑型，固定频率，连续导通模式PFC控制器
| 型号： | NCP1653ADR2G |
| 厂家： | 
ONSEMI |
| 描述： | Compact, Fixed-Frequency, Continuous Conduction Mode PFC Controller |
| 文件： | 总20页 (文件大小：184K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
NCP1653, NCP1653A
Compact, Fixed−Frequency,
Continuous Conduction
Mode PFC Controller
The NCP1653 is a controller designed for Continuous Conduction
Mode (CCM) Power Factor Correction (PFC) boost circuits. It
operates in the follower boost or constant output voltage in 67 or 100
kHz fixed switching frequency. Follower boost offers the benefits of
reduction of output voltage and hence reduction in the size and cost
of the inductor and power switch. Housed in a DIP−8 or SO−8
package, the circuit minimizes the number of external components
and drastically simplifies the CCM PFC implementation. It also
integrates high safety protection features. The NCP1653 is a driver
for robust and compact PFC stages.
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MARKING DIAGRAMS
8
1
8
NCP1653
AWL
YYWW
NCP1653A
AWL
8
1
YYWW
PDIP−8
P SUFFIX
1
Features
CASE 626
• IEC1000−3−2 Compliant
8
1
8
• Continuous Conduction Mode
8
N1653
ALYW
G
1653A
ALYW
G
• Average Current−Mode or Peak Current−Mode Operation
• Constant Output Voltage or Follower Boost Operation
• Very Few External Components
1
SO−8
1
D SUFFIX
CASE 751
A suffix = 67 kHz option
= Assembly Location
WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week
• Fixed Switching Frequency: 67 kHz = NCP1653A,
Fixed Switching Frequency: 100 kHz = NCP1653
• Soft−Start Capability
A
• V Undervoltage Lockout with Hysteresis (8.7 / 13.25 V)
G
= Pb−Free Package
CC
• Overvoltage Protection (107% of Nominal Output Level)
• Undervoltage Protection or Shutdown (8% of Nominal Output Level)
• Programmable Overcurrent Protection
• Programmable Overpower Limitation
• Thermal Shutdown with Hysteresis (120 / 150_C)
• Pb−Free Packages are Available
Typical Applications
PIN CONNECTIONS
FB
V
CC
1
2
3
4
8
7
6
5
V
Drv
control
In
Gnd
• TV & Monitors
CS
V
M
• PC Desktop SMPS
(Top View)
• AC Adapters SMPS
• White Goods
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 18 of this data sheet.
EMI
Filter
AC
Input
Output
15 V
FB
V
CC
V
control
Drv
In
Gnd
CS
V
M
NCP1653
Figure 1. Typical Application Circuit
©
Semiconductor Components Industries, LLC, 2005
1
Publication Order Number:
December, 2005 − Rev. 4
NCP1653/D
NCP1653, NCP1653A
L
I
Output Voltage (V
)
out
I
in
V
in
L
EMI
Filter
AC
Input
C
bulk
C
R
FB
filter
on
R
CS
I
L
off
I
FB
V
control
Vreg
2
Current
Mirror
1
300 k
9 V
FB / SD
C
control
9 V
1
0
0
1
I
Iref
IFB
96%
ref
Regulation Block
13.25 V
/ 8.7 V
Overvoltage
Protection
V
control
V
CC
UVLO
−
I
=
control
R
1
(I > 107% I
)
FB
ref
R = constant
1
+
8
V
CC
Shutdown / UVP
(I < 8% I
18 V
Current
)
ref
FB
&
Mirror
R
vac
4% I Hysteresis
ref
V
Overpower
Limitation
CC
12 k
In
I
vac
2
3
Reference Block
Internal Bias
(I
I
> 3 nA )
S
vac
Turn on
9 V
C
vac
V
M
R I I
M S vac
V
=
5
M
x
2 I
control
I
M
Thermal
Shutdown
9 V
(120 / 150 °C)
CS
Overcurrent
Protection
(I > 200 mA)
S
I
S
R
M
Current
Mirror
C
M
4
7
V
R
S
ref
PFC
I
ch
Modulation
9 V
V
CC
−
Drv
+
+
R
Q
OR
V
ramp
C
ramp
0
1
Output
Driver
Gnd
S
6
67 or 100 kHz clock
Figure 2. Functional Block Diagram
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2
NCP1653, NCP1653A
PIN FUNCTION DESCRIPTION
Pin
Symbol
Name
Function
1
FB / SD
Feedback /
Shutdown
This pin receives a feedback current I which is proportional to the PFC circuit output voltage.
The current is for output regulation, output overvoltage protection (OVP), and output
undervoltage protection (UVP).
FB
When I goes above 107% I , OVP is activated and the Drive Output is disabled.
FB
ref
When I goes below 8% I , the device enters a low−consumption shutdown mode.
FB
ref
2
3
V
Control Voltage /
Soft−Start
The voltage of this pin V
factor of the circuit. This pin is connected to an external capacitor C
bandwidth typically below 20 Hz to achieve near unity power factor.
directly controls the input impedance and hence the power
control
control
to limit the V
control
control
The device provides no output when V
capacitor.
= 0 V. Hence, C
also works as a soft−start
control
control
In
Input Voltage
Sense
This pin sinks an input−voltage current I
which is proportional to the RMS input voltage V .
vac ac
The current I
is for overpower limitation (OPL) and PFC duty cycle modulation. When the
vac
2
product (I ⋅I ) goes above 3 nA , OPL is activated and the Drive Output duty ratio is reduced
S vac
by pulling down V
indirectly to reduce the input power.
control
4
5
CS
Input Current
Sense
This pin sources a current I which is proportional to the inductor current I . The sense current
S L
I
is for overcurrent protection (OCP), overpower limitation (OPL) and PFC duty cycle
S
modulation. When I goes above 200 mA, OCP is activated and the Drive Output is disabled.
S
V
M
Multiplier Voltage This pin provides a voltage V for the PFC duty cycle modulation. The input impedance of the
M
PFC circuit is proportional to the resistor R externally connected to this pin. The device
M
operates in average current−mode if an external capacitor C is connected to the pin.
M
Otherwise, it operates in peak current−mode.
6
7
8
GND
Drv
The IC Ground
Drive Output
−
This pin provides an output to an external MOSFET.
V
CC
Supply Voltage
This pin is the positive supply of the device. The operating range is between 8.75 V and 18 V
with UVLO start threshold 13.25 V.
MAXIMUM RATINGS
Rating
Symbol
Value
Unit
FB, V
, In, CS, V Pins (Pins 1−5)
control
M
Maximum Voltage Range
Maximum Current
V
−0.3 to +9
100
V
max
I
mA
max
Drive Output (Pin 7)
Maximum Voltage Range
Maximum Current Range (Note 2)
V
−0.3 to +18
1.5
V
A
max
I
max
Power Supply Voltage (Pin 8)
Maximum Voltage Range
Maximum Current
V
−0.3 to +18
100
V
max
I
mA
max
Power Dissipation and Thermal Characteristics
P suffix, Plastic Package, Case 626
Maximum Power Dissipation @ T = 70°C
Thermal Resistance Junction−to−Air
P
800
100
mW
A
D
R
q
°C/W
JA
D suffix, Plastic Package, Case 751
Maximum Power Dissipation @ T = 70°C
P
450
178
mW
A
D
Thermal Resistance Junction−to−Air
Operating Junction Temperature Range
Storage Temperature Range
R
q
°C/W
JA
T
−40 to +125
−65 to +150
°C
°C
J
T
stg
1. MaximumRatings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those
indicated may adversely affect device reliability. Functional operation under absolute maximum−rated is not implied. Functional operation
should be restricted to the Recommended Operating Conditions.
A. This device series contains ESD protection and exceeds the following tests:
Pins 1−8: Human Body Model 2000 V per MIL−STD−883, Method 3015.
Machine Model Method 190 V.
B. This device contains Latchup protection and exceeds 100 mA per JEDEC Standard JESD78.
2. Guaranteed by design.
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3
NCP1653, NCP1653A
ELECTRICAL CHARACTERISTICS (For typical values T = 25°C. For min/max values, T = −40°C to +125°C, V = 15 V,
J
J
CC
I
FB
= 100 mA, I
= 30 mA, I = 0 mA, unless otherwise specified)
vac
S
Characteristics
Pin
Symbol
Min
Typ
Max
Unit
OSCILLATOR
Switching Frequency
NCP1653
NCP1653A
7
7
f
90
60.3
102
67
110
73.7
kHz
%
SW
Maximum Duty Cycle (V = 0 V) (Note 3)
D
94
−
−
M
max
GATE DRIVE
Gate Drive Resistor
7
Output High and Draw 100 mA out of Drv pin (I
= 100 mA)
R
5.0
2.0
9.0
6.6
20
18
W
W
source
OH
Output Low and Insert 100 mA into Drv pin (I
= 100 mA)
R
OL
sink
Gate Drive Rise Time from 1.5 V to 13.5 V (Drv = 2.2 nF to Gnd)
Gate Drive Fall Time from 13.5 V to 1.5 V (Drv = 2.2 nF to Gnd)
7
7
t
−
−
88
−
−
ns
ns
r
t
61.5
f
FEEDBACK / OVERVOLTAGE PROTECTION / UNDERVOLTAGE PROTECTION
Reference Current (V = 3 V)
1
1
2
2
2
1
I
192
95
−
204
96
208
98
−
mA
%
M
ref
Regulation Block Ratio
I
/I
regL ref
Vcontrol Pin Internal Resistor
R
300
2.4
100
kW
V
control
Maximum Control Voltage (I = 100 mA)
V
−
−
FB
control(max)
control(max)
Maximum Control Current (I
= I / 2)
ref
I
−
−
mA
control(max)
Feedback Pin Voltage (I = 100 mA)
V
FB1
1.0
1.3
1.5
1.8
1.9
2.2
V
V
FB
Feedback Pin Voltage (I = 200 mA)
FB
Overvoltage Protection
OVP Ratio
1
I
/I
104
−
107
214
500
−
230
−
%
mA
ns
OVP ref
Current Threshold
Propagation Delay
I
t
OVP
OVP
−
Undervoltage Protection (V = 3 V)
1
M
UVP Activate Threshold Ratio
UVP Deactivate Threshold Ratio
UVP Lockout Hysteresis
Propagation Delay
I
I
/I
4.0
7.0
4.0
−
8.0
12
15
20
−
%
%
UVP(on) ref
/I
UVP(off) ref
I
8.0
500
mA
ns
UVP(H)
t
−
UVP
CURRENT SENSE
Current Sense Pin Offset Voltage (I = 100 mA)
4
4
V
0
10
30
mV
S
S
Overcurrent Protection Threshold (V = 1 V)
I
185
200
215
mA
M
S(OCP)
OVERPOWER LIMITATION
Input Voltage Sense Pin Internal Resistor
4
3−4
4
R
I
−
−
12
−
−
kW
vac(int)
2
Over Power Limitation Threshold
× I
vac
3.0
nA
S
Sense Current Threshold (I
Sense Current Threshold (I
= 30 mA, V = 3 V)
I
I
80
24
100
32
140
48
mA
mA
vac
M
S(OPL1)
= 100 mA, V = 3 V)
vac
M
S(OPL2)
CURRENT MODULATION
PWM Comparator Reference Voltage
5
5
V
2.25
2.62
2.75
V
ref
Multiplier Current (V
Multiplier Current (V
Multiplier Current (V
Multiplier Current (V
= V
= V
= V
= V
, I
= 30 mA, I = 25 mA)
I
I
I
I
1.0
3.2
10
2.85
9.5
5.8
18
mA
mA
mA
mA
control
control
control
control
control(max) vac
S
M1
M2
M3
M4
, I
= 30 mA, I = 75 mA)
S
control(max) vac
/ 10, I
= 30 mA, I = 25 mA)
35
58
control(max)
control(max)
vac
vac
S
/ 10, I
= 30 mA, I = 75 mA)
30
103.5
180
S
THERMAL SHUTDOWN
Thermal Shutdown Threshold (Note 3)
Thermal Shutdown Hysteresis
−
−
T
150
−
−
−
−
°C
°C
SD
−
30
3. Guaranteed by design.
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4
NCP1653, NCP1653A
ELECTRICAL CHARACTERISTICS (For typical values T = 25°C. For min/max values, T = −40°C to +125°C, V = 15 V,
J
J
CC
I
FB
= 100 mA, I
= 30 mA, I = 0 mA, unless otherwise specified)
vac
S
Characteristics
Pin
Symbol
Min
Typ
Max
Unit
SUPPLY SECTION
Supply Voltage
8
UVLO Startup Threshold
V
V
12.25
8.0
13.25
8.7
14.5
9.5
−
V
V
V
CC(on)
Minimum Operating Voltage after Startup
UVLO Hysteresis
CC(off)
V
4.0
4.55
CC(H)
Supply Current:
8
Startup (V = V
− 0.2 V)
I
−
−
−
−
−
−
−
18
0.95
21
50
1.5
50
mA
mA
mA
CC
CC(on)
stup
stup1
stup2
stup3
Startup (V < 4.0 V, I = 200 mA)
I
CC
FB
Startup (4.0 V < V < V
− 0.2 V, I = 200 mA)
I
I
CC
CC(on)
FB
Startup (V < V
− 0.2 V, I = 0 mA) (Note 4)
21
50
mA
CC
CC(on)
FB
Operating (V = 15 V, Drv = open, V = 3 V)
I
I
3.7
4.7
33
5.0
6.0
50
mA
mA
mA
CC
M
CC1
Operating (V = 15 V, Drv = 1 nF to Gnd, V = 1 V)
CC
M
CC2
Shutdown (V = 15 V and I = 0 A)
I
stdn
CC
FB
4. Please refer to the “Biasing the Controller” Section in the Functional Description.
TYPICAL CHARACTERISTICS
110
105
100
95
100
99
98
97
96
95
94
93
92
91
90
NCP1653
90
85
80
75
NCP1653A
V
M
= 0 V
70
65
60
0
25
50
75
100
125
0
25
50
75
100
125
−50
−25
−50
−25
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 3. Switching Frequency vs. Temperature
Figure 4. Maximum Duty Cycle vs. Temperature
14
205
204
203
202
201
200
199
198
197
196
195
12
10
8
R
OH
R
OL
6
4
2
0
−50
0
25
50
75
100
125
0
25
50
75
100
125
−25
−50
−25
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 5. Gate Drive Resistance vs. Temperature
Figure 6. Reference Current vs. Temperature
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NCP1653, NCP1653A
TYPICAL CHARACTERISTICS
100
3
2.5
2
99
98
97
96
95
94
93
92
91
90
T = 25°C
J
T = 125°C
J
T = −40°C
J
1.5
1
0.5
0
0
25
50
75
100
125
100
120
140
160
180
200
220
−50
−25
I , FEEDBACK CURRENT (mA)
FB
T , JUNCTION TEMPERATURE (°C)
J
Figure 7. Regulation Block
Figure 8. Regulation Block Ratio vs.
Temperature
2.5
2
3.0
2.9
2.8
2.7
2.6
2.5
2.4
2.3
2.2
2.1
2.0
I
FB
= 200 mA
1.5
1
I
FB
= 100 mA
0.5
0
0
25
50
75
100
125
−25
0
25
50
75
100
125
−50
−50
−25
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 9. Maximum Control Voltage vs.
Temperature
Figure 10. Feedback Pin Voltage vs.
Temperature
2.5
2
120
118
116
114
112
110
108
106
104
102
100
T = −40°C
J
1.5
1
T = 25°C
J
T = 125°C
J
0.5
0
50
I
100
150
200
250
0
25
50
75
100
125
0
−50
−25
, FEEDBACK PIN CURRENT (mA)
T , JUNCTION TEMPERATURE (°C)
J
FB
Figure 11. Feedback Pin Voltage vs. Feedback
Current
Figure 12. Overvoltage Protection Ratio
vs. Temperature
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NCP1653, NCP1653A
TYPICAL CHARACTERISTICS
16
14
12
10
8
230
225
220
215
210
205
200
I
/I
UVP(off) ref
6
I
/I
UVP(on) ref
4
2
0
0
25
50
75
100
125
0
25
50
75
100
125
−50
−25
−50
−25
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 13. Overvoltage Protection Threshold
vs. Temperature
Figure 14. Undervoltage Protection
Thresholds vs. Temperature
100
90
210
208
206
204
202
200
198
196
194
192
190
80
70
60
50
40
30
T = −40 °C
J
20
10
0
T = 125 °C
J
T = 25 °C
J
0
25
50
75
100
125
−50
−25
100
150
200
250
0
50
T , JUNCTION TEMPERATURE (°C)
J
I , SENSE CURRENT (mA)
S
Figure 15. Current Sense Pin Voltage vs.
Sense Current
Figure 16. Overcurrent Protection Threshold
vs. Temperature
4
3.5
3
7
6
5
4
3
2
1
0
I
= 100 mA
= 30 mA
vac
I
vac
T = −40 °C
J
2.5
2
T = 25 °C
J
T = 125 °C
J
1.5
1
0.5
0
0
25
50
75
100
125
0
50
100
150
200
−50
−25
T , JUNCTION TEMPERATURE (°C)
J
I
, INPUT−VOLTAGE CURRENT (mA)
vac
Figure 17. Overpower Limitation Threshold
vs. Temperature
Figure 18. In Pin Voltage vs.
Input−Voltage Current
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NCP1653, NCP1653A
TYPICAL CHARACTERISTICS
3
2.9
2.8
200
180
160
140
120
100
I
= 25 mA
= 75 mA
S
2.7
2.6
2.5
2.4
I
S
80
I
V
= 30 mA
vac
60
40
2.3
2.2
2.1
2
= V
control(max)
control
I I
S vac
I
=
derived from the (eq.8)
20 control
2I
M
0
−50
0
25
50
75
100
125
0
25
50
75
100
125
−50
−25
−25
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 19. PWM Comparator Reference
Voltage vs. Temperature
Figure 20. Maximum Control Current vs.
Temperature
20
18
16
14
12
10
8
20
18
16
14
12
10
8
V
CC(on)
I
= 75 mA
= 25 mA
S
I
S
V
CC(off)
I
V
= 30 mA
vac
6
6
= 10 % V
control(max)
control
4
4
I I
S vac
I
=
derived from the (eq.8)
control
2
2
2I
M
0
0
0
25
50
75
100
125
0
25
50
75
100
125
−50
−25
−50
−25
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 21. 10% of Maximum Control Current
vs. Temperature
Figure 22. Supply Voltage Undervoltage
Lockout Thresholds vs. Temperature
80
70
60
50
6
5
4
I , 1 nF Load
CC2
I , No Load
CC1
40
30
20
10
0
I
3
2
1
stdn
I
stup
V
CC
= 15 V
0
0
25
50
75
100
125
0
25
50
75
100
125
−50
−25
−50
−25
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 23. Supply Current in Startup and
Shutdown Mode vs. Temperature
Figure 24. Operating Supply Current vs.
Temperature
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NCP1653, NCP1653A
FUNCTIONAL DESCRIPTION
Introduction
5. Thermal Shutdown (TSD) is activated and the
Drive Output (Pin 7) is disabled when the
junction temperature exceeds 150_C. The
operation resumes when the junction temperature
falls down by typical 30_C.
The NCP1653 is a Power Factor Correction (PFC) boost
controller designed to operate in fixed−frequency
Continuous Conduction Mode (CCM). It can operate in
either peak current−mode or average current−mode.
Fixed−frequency operation eases the compliance with
EMI standards and the limitation of the possible radiated
noise that may pollute surrounding systems. The CCM
operation reduces the application di/dt and the resulting
interference. The NCP1653 is designed in a compact 8−pin
package which offers the minimum number of external
components. It simplifies the design and reduces the cost.
The output stage of the NCP1653 incorporates 1.5 A
current capability for direct driving of the MOSFET in
high−power applications.
The NCP1653 is implemented in constant output voltage
or follower boost modes. The follower boost mode permits
one to significantly reduce the size of the PFC circuit
inductor and power MOSFET. With this technique, the
output voltage is not set at a constant level but depends on
the RMS input voltage or load demand. It allows lower
output voltage and hence the inductor and power MOSFET
size or cost are reduced.
CCM PFC Boost
A CCM PFC boost converter is shown in Figure 25. The
input voltage is a rectified 50 or 60 Hz sinusoidal signal.
The MOSFET is switching at a high frequency (typically
102 kHz in the NCP1653) so that the inductor current I
L
basically consists of high and low−frequency components.
Filter capacitor C is an essential and very small value
filter
capacitor in order to eliminate the high−frequency
component of the inductor current I . This filter capacitor
L
cannot be too bulky because it can pollute the power factor
by distorting the rectified sinusoidal input voltage.
I
in
I
L
L
V
out
V
in
C
filter
C
bulk
Hence, NCP1653 is an ideal candidate in high−power
applications where cost−effectiveness, reliability and high
power factor are the key parameters. The NCP1653
incorporates all the necessary features to build a compact
and rugged PFC stage.
Figure 25. CCM PFC Boost Converter
PFC Methodology
The NCP1653 uses a proprietary PFC methodology
particularly designed for CCM operation. The PFC
methodology is described in this section.
The NCP1653 provides the following protection features:
1. Overvoltage Protection (OVP) is activated and
the Drive Output (Pin 7) goes low when the
output voltage exceeds 107% of the nominal
regulation level which is a user−defined value.
The circuit automatically resumes operation when
the output voltage becomes lower than the 107%.
2. Undervoltage Protection (UVP) is activated and
the device is shut down when the output voltage
goes below 8% of the nominal regulation level.
The circuit automatically starts operation when
the output voltage goes above 12% of the
I
L
I
in
t
t
time
1
2
nominal regulation level. This feature also
provides output open−loop protection, and an
external shutdown feature.
T
Figure 26. Inductor Current in CCM
3. Overpower Limitation (OPL) is activated and the
Drive Output (Pin 7) duty ratio is reduced by
pulling down an internal signal when a computed
input power exceeds a permissible level. OPL is
automatically deactivated when this computed input
power becomes lower than the permissible level.
4. Overcurrent Protection (OCP) is activated and
the Drive Output (Pin 7) goes low when the
inductor current exceeds a user−defined value.
The operation resumes when the inductor current
becomes lower than this value.
As shown in Figure 26, the inductor current I in a
switching period T includes a charging phase for duration
L
t and a discharging phase for duration t . The voltage
1
2
conversion ratio is obtained in (eq.1).
V
V
t ) t
T
T * t
out
in
1
2
+
+
t
2
1
T * t
1
(eq.1)
V
in
+
V
out
T
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9
NCP1653, NCP1653A
The input filter capacitor C
filter absorbs the high−frequency component of inductor
and the front−ended EMI
C
V
filter
t
ramp ref
T * t
1
1
(eq.6)
V
+ V
ref
*
+ V
ref
M
C
T
T
ramp
current I . It makes the input current I a low−frequency
L
in
From (eq.3) and (eq.6), the input impedance Z is
re−formulated in (eq.7).
in
signal only of the inductor current.
(eq.2)
I
in
+ I
L−50
V
V
M
out
(eq.7)
Z
+
in
The suffix 50 means it is with a 50 or 60 Hz bandwidth
of the original I .
V
I
ref L−50
L
Because V and V are roughly constant versus time,
ref
out
From (eq.1) and (eq.2), the input impedance Z is
formulated.
in
the multiplier voltage V is designed to be proportional to
M
the I
in order to have a constant Z for PFC purpose.
in
L−50
It is illustrated in Figure 28.
T * t
V
out
V
1
in
(eq.3)
Z
+
+
in
I
in
T
I
L−50
Power factor is corrected when the input impedance Z
in
in (eq.3) is constant or slowly varying in the 50 or 60 Hz
bandwidth.
V
in
V
M
V
ref
I
in
time
PFC Modulation
−
I
ch
R
S
Q
+
+
I
L
V
ramp
time
time
0
1
C
ramp
V
M
clock
V
ref
Figure 28. Multiplier Voltage Timing Diagram
It can be seen in the timing diagram in Figure 27 that V
originally consists of a switching frequency ripple coming
M
V
ramp
V
M
from the inductor current I . The duty ratio can be
L
inaccurately generated due to this ripple. This modulation
is the so−called “peak current−mode”. Hence, an external
without
filtering
V
M
capacitor C connected to the multiplier voltage V pin
M
M
Clock
(Pin 5) is essential to bypass the high−frequency
Latch Set
component of V . The modulation becomes the so−called
M
“average current−mode” with a better accuracy for PFC.
Latch Reset
Output
V
M
R
M
I
I
vac S
V
M
=
5
2I
control
I
M
Inductor
Current
PFC Duty
Modulation
Figure 27. PFC Duty Modulation and Timing Diagram
C
M
R
M
The PFC duty modulation and timing diagram is shown
in Figure 27. The MOSFET on time t is generated by the
1
intersection of reference voltage V and ramp voltage
ref
Figure 29. External Connection on the Multiplier
Voltage Pin
V
ramp
. A relationship in (eq.4) is obtained.
I
C
t
ch 1
(eq.4)
V
ramp
+ V
)
+ V
ref
M
The multiplier voltage V is generated according to
M
ramp
(eq.8).
The charging current I is specially designed as in
ch
R
I
I
M vac S
2 I
(eq.5). The multiplier voltage V is therefore expressed in
M
(eq.8)
V
M
+
control
terms of t in (eq.6).
1
Input−voltage current I
is proportional to the RMS
vac
C
V
ramp ref
(eq.5)
input voltage V as described in (eq.9). The suffix ac
I
ch
+
ac
T
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10
NCP1653, NCP1653A
stands for the RMS. I is a constant in the 50 or 60 Hz
over the bandwidth of 50 or 60 Hz and power factor is
corrected.
vac
bandwidth. Multiplier resistor R is the external resistor
M
connected to the multiplier voltage V pin (Pin 5). It is also
Practically, the differential−mode inductance in the
front−ended EMI filter improves the filtering performance
M
constant. R directly limits the maximum input power
M
capability and hence its value affects the NCP1653 to
operate in either “follower boost mode” or “ constant
output voltage mode”.
of capacitor C . Therefore, the multiplier capacitor C
filter M
is generally with a larger value comparing to the filter
capacitor C
.
filter
Input and output power (P and P ) are derived in
in
out
Ǹ
2 V * 4 V
V
ac
) 12 kW
ac
(eq.9)
I
+
[
(eq.13) when the circuit efficiency η is obtained or
vac
(
)
RȀ
vac
R
vac
assumed. The variable V stands for the RMS input
ac
Sense current I is proportional to the inductor current I
as described in (eq.10). I consists of the high−frequency
component (which depends on di/dt or inductor L) and
low−frequency component (which is I
S
L
voltage.
L
2
V
Z
2 R RȀ
I
V
V
ac
S
vac control ref ac
P
in
+
T
+
R
R V
M CS out
in
).
L−50
(eq.13a)
(eq.13b)
R
R
I
V
CS
S
control ac
(eq.10)
I
S
+
I
L
V
out
Control current I
is a roughly constant current that
control
2 R RȀ
I
R
V
V
S
vac control ref ac
P
out
+ hP + h
in
comes from the PFC output voltage V that is a slowly
out
R
V
M
CS out
varying signal. The bandwidth of
additionally limited by inserting an external capacitor
to the control voltage V pin (Pin 2) in
I
can be
control
I
V
control ac
T
V
C
out
control
control
Figure 30. It is recommended to limit f , that is the
control
bandwidth of V
achieve power factor correction purpose. Typical value of
(or I
), below 20 Hz typically to
control
control
Follower Boost
The NCP1653 operates in follower boost mode when
is constant. If I is constant based on (eq.13), for
C
is between 0.1 mF and 0.33 mF.
control
I
control
control
V
reg
a constant load or power demand the output voltage V of
out
the converter is proportional to the RMS input voltage V . It
ac
300 k
V
control
means the output voltage V becomes lower when the RMS
I
=
out
control
R
1
input voltage V becomes lower. On the other hand, the
ac
96% I
I
I
ref ref
FB
output voltage V becomes lower when the load or power
out
Regulation Block
demand becomes higher. It is illustrated in Figure 31.
2
V
control
V
(Traditional boost)
out
in
C
control
V
(Follower boost)
out
Figure 30. Vcontrol Low−Pass Filtering
V
1
C
u
control
(eq.11)
2 p 300 kW f
control
time
time
From (eq.7)−(eq.10), the input impedance Z is
re−formulated in (eq.12).
in
R
R
V V I
M
CS ac out L
P
Z
+
in
out
2 R RȀ
I
V
I
S
vac control ref L−50
R
R
V
I
V
M
CS ac out
(eq.12)
Z
+
whenI + I
L−50
in
L
2 R RȀ
V
S
vac control ref
Figure 31. Follower Boost Characteristics
Follower Boost Benefits
The multiplier capacitor C is the one to filter the
M
high−frequency component of the multiplier voltage V .
M
The high−frequency component is basically coming from
The follower boost circuit offers an opportunity to reduce
the output voltage V whenever the RMS input voltage
is lower or the power demand P is higher. Because
out
of the step−up characteristics of boost converter, the output
voltage V will always be higher than the input voltage
the inductor current I . On the other hand, the filter
L
out
capacitor C
similarly removes the high−frequency
filter
V
ac
component of inductor current I . If the capacitors C and
L
M
C
match with each other in terms of filtering capability,
filter
out
I becomes I
. Input impedance Z is roughly constant
L
L−50
in
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11
NCP1653, NCP1653A
V even though V is reduced in follower boost operation.
power P . However, this output level is not constant and
out
in
out
As a result, the on time t is reduced. Reduction of on time
depending on different values of V and P . The follower
1
ac out
makes the loss of the inductor and power MOSFET smaller.
Hence, it allows cheaper cost in the inductor and power
MOSFET or allows the circuit components to operate at a
lower stress condition in most of the time.
boost operating area is illustrated in Figure 33.
V
out
P
P
out(max)
out(min)
96% I
R
ref FB
1
2
1. P increases, V decreases
out
out
Output Feedback
2. V decreases, V decreases
ac
out
The output voltage V of the PFC circuit is sensed as a
out
V
in
feedback current I flowing into the FB pin (Pin 1) of the
FB
device. Since the FB pin voltage V
is much smaller than
FB1
V
V
V
ac(min)
ac
ac(max)
V
, it is usually neglected.
out
Figure 33. Follower Boost Region
V
out
* V
FB1
V
out
(eq.14)
I
+
[
FB
R
FB
R
FB
Region (2): 96% × Iref < IFB < Iref
where R is the feedback resistor across the FB pin
FB
When I is between 96% and 100% of I (i.e., 96% R
(Pin 1) and the output voltage referring to Figure 2.
FB
ref
FB
× I < V < R × I ), the NCP1653 operates in constant
Then, the feedback current I represents the output
ref
out
FB
ref
FB
output voltage mode which is similar to the follower boost
mode characteristic but with narrow output voltage range.
voltage V
and will be used in the output voltage
out
regulation, undervoltage protection (UVP), and
overvoltage protection (OVP).
The regulation block output V decreases linearly with
reg
I
in the range from 96% of I to I . It gives a linear
ref ref
FB
Output Voltage Regulation
function of I
in (eq.16).
control
Feedback current I which represents the output voltage
FB
I
control(max)
0.04
V
out
(eq.16)
(eq.17)
V
out
is processed in a function with a reference current
ǒ1 *
Ǔ
I
+
control
R
I
FB ref
(I = 200 mA typical) as shown in regulation block
ref
Resolving (eq.16) and (eq.13),
function in Figure 32. The output of the voltage regulation
block, low−pass filter on V
V
0.04
pin and the I
=
.
ac
control
control
V
out
P
R
M
R
V
out
CS
ac
I
V
control
/ R block is in Figure 30 is control current I
1
control
+ ǒ
Ǔ
)
h
I
R
2 R RȀ
V
control(max)
FB ref
S
vac ref
And the input is feedback current I . It means that I
FB
control
According to (eq.17), output voltage V becomes R
out
FB
is the output of I and it can be described as in Figure 32.
FB
× I when power is low (P ≈ 0). It is the maximum value
of V in this operating region. Hence, it can be concluded
that output voltage increases when power decreases. It is
similar to the follower boost characteristic in (eq.15). On
the other hand in (eq.17), output voltage V becomes R
ref
out
There are three linear regions including: (1) I < 96% ×
FB
out
I
, (2) 96% × I <I < I , and (3) I > I . They are
ref FB ref FB ref
ref
discussed separately as follows:
I
control
out
FB
× I when RMS input voltage V is very high. It is the
ref
ac
I
control(max)
maximum value of V in this operating region. Hence, it
out
can also be concluded that output voltage increases when
RMS input voltage increases. It is similar to another
follower boost characteristic in (eq.15). This characteristic
is illustrated in Figure 34.
96% I
I
I
FB
ref
ref
Figure 32. Regulation Block
V
P
out
out(min)
P
out(max)
Region (1): IFB < 96% × Iref
I
R
ref FB
1
2
When I is less than 96% of I (i.e., V < 96% R
FB
FB
ref
out
96% I
R
ref FB
× I ), the NCP1653 operates in follower boost mode. The
ref
1. P increases, V decreases
out
out
regulation block output V is at its maximum value.
reg
2. V decreases, V decreases
ac
out
I
I
becomes its maximum value (i.e., I
=
control
control
= I /2 = 100 mA) which is a constant. (eq.13)
control(max)
ref
V
V
V
becomes (eq.15).
ac(min)
ac
ac(max)
2 R RȀ
I
V
V
S
vac control(max) ref ac
Figure 34. Constant Output Voltage Region
V
out
+ h
R
R
P
M
CS out
(eq.15)
Region (3): IFB > Iref
V
ac
T
When I is greater than I (i.e., V > R × I ), the
FB
ref
out
FB
ref
P
out
NCP1653 provides no output or zero duty ratio. The
The output voltage V is regulated at a particular level
with a particular value of RMS input voltage V and output
out
regulation block output V becomes 0 V. I
also
control
reg
ac
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12
NCP1653, NCP1653A
becomes zero. The multiplier voltage V in (eq.8)
I
is always greater than 8% and 12% of the nominal level
FB
M
becomes its maximum value and generates zero on time t .
to enable the NCP1653 to operate. Hence, UVP happens
when the output voltage is abnormally undervoltage, the
FB pin (Pin 1) is opened, or the FB pin (Pin 1) is manually
pulled low.
1
Then, V decreases and the minimum can be V = V in
out
out
in
a boost converter. Going down to V , V automatically
in
out
enters the previous two regions (i.e., follower boost region
or constant output voltage region) and hence output voltage
Soft−Start
V
out
cannot reach input voltage V as long as the NCP1653
in
The device provides no output (or no duty ratio) when the
provides a duty ratio for the operation of the boost
converter.
In conclusion, the NCP1653 circuit operates in one of the
following conditions:
V
control
(Pin 2) voltage is zero (i.e., V
= 0 V). An
control
external capacitor C
connected to the V
pin
control
control
provides a gradually increment of the V
voltage (or
control
the duty ratio) in the startup and hence provides a soft−start
feature.
Constant output voltage mode: The output voltage is
regulated around the range between 96% and 100% of R
FB
× I . The output voltage is described in (eq.16). Its
ref
Current Sense
The device senses the inductor current I by the current
sense scheme in Figure 36. The device maintains the
voltage at the CS pin (Pin 4) to be zero voltage (i.e.,
behavior is similar to a follower boost.
L
Follower boost mode: The output voltage is regulated
under 96% of R × I and I
= I
= I /2 =
FB
ref
control
control(max) ref
100 mA. The output voltage is described in (eq.15).
V ≈ 0 V) so that (eq.10) can be formulated.
S
Overvoltage Protection (OVP)
I
L
When the feedback current I is higher than 107% of the
FB
reference current I (i.e., V > 107% R × I ), the
ref
out
FB
ref
Drive Output (Pin 7) of the device goes low for protection.
The circuit automatically resumes operation when the
feedback current becomes lower than 107% of the
R
I
S
S
CS
+
NCP1653
Gnd
V
S
reference current I
.
ref
R
CS
I
L
−
The maximum OVP threshold is limited to 230 mA which
corresponds to 230 mA × 1.92 MW + 2.5 V = 444.1 V when
R
= 1.92 MW (680 kW + 680 kW + 560 kW) and
FB
V
FB1
= 2.5 V (for the worst case referring to Figure 11).
Figure 36. Current Sensing
Hence, it is generally recommended to use 450 V rating
output capacitor to allow some design margin.
This scheme has the advantage of the minimum number
of components for current sensing and the inrush current
Undervoltage Protection (UVP)
limitation by the resistor R . Hence, the sense current I
CS
S
represents the inductor current I and will be used in the
L
I
CC
PFC duty modulation to generate the multiplier voltage
V , Overpower Limitation (OPL), and overcurrent
M
protection.
I
CC2
Overcurrent Protection (OCP)
Overcurrent protection is reached when I is larger than
S
I
(200 mA typical). The offset voltage of the CS pin
S(OCP)
Shutdown
Operating
is typical 10 mV and it is neglected in the calculation.
Hence, the maximum OCP inductor current threshold
I
stdn
I
is obtained in (eq.15).
L(OCP)
R I
S S(OCP)
R
S
(eq.18)
I
8% I
I
+
+
200 mA
12% I
L(OCP)
ref
FB
ref
R
CS
R
CS
When overcurrent protection threshold is reached, the
Figure 35. Undervoltage Protection
Drive Output (Pin 7) of the device goes low. The device
automatically resumes operation when the inductor current
goes below the threshold.
When the feedback current I is less than 8% of the
FB
reference current I (i.e., the output voltage V is less
ref
out
than 8% of its nominal value), the device is shut down and
consumes less than 50 mA. The device automatically starts
operation when the output voltage goes above 12% of the
nominal regulation level. In normal situation of boost
Input Voltage Sense
The device senses the RMS input voltage V by the
ac
sensing scheme in Figure 37. The internal current mirror is
with a typical 4 V offset voltage at its input so that the
converter configuration, the output voltage V is always
out
greater than the input voltage V and the feedback current
current I can be derived in (eq.9). An external capacitor
in
vac
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13
NCP1653, NCP1653A
C
is to maintain the In pin (Pin 3) voltage in the
limited. The OPL is automatically deactivated when the
vac
2
calculation to always be the peak of the sinusoidal voltage
product (I × I ) becomes lower than the 3 nA level. This
S vac
2
due to very little current consumption (i.e., V = √2 V and
3 nA level corresponds to the approximated input power
in
ac
I
≈ 0). This I current represents the RMS input voltage
(I × V ) to be smaller than the particular expression in
vac
vac
L
ac
V and will be used in overpower limitation (OPL) and the
ac
(eq.20).
PFC duty modulation.
2
I
I
t 3 nA
S vac
V
Current
Mirror
Ǹ
in
2
R
R
CS
S
2
ǒI @
L
Ǔ
ǒV
Ǔt 3 nA
@
ac
R
) 12 kW
vac
R
R
S
R
) 12 kW
vac
vac
12 k
2
3 nA
(eq.20)
I @ V
L ac
t
In
Ǹ
R
CS
4 V
I
2
vac
3
Biasing the Controller
C
It is recommended to add a typical 1 nF to 100 nF
9 V
vac
decoupling capacitor next to the V pin for proper operation.
CC
When the NCP1653 operates in follower boost mode, the PFC
output voltage is not always regulated at a particular level
under all application range of input voltage and load power.
It is not recommended to make a low−voltage bias supply
voltage by adding an auxiliary winding on the PFC boost
Figure 37. Input Voltage Sensing
There is an internal 9 V ESD Zener Diode on the pin.
Hence, the value of R is recommended to be at least
vac
938 kΩ for possibly up to 400 V instantaneous input voltage.
inductor. Alternatively, it is recommended to get the V
CC
biasing supply from the second−stage power conversion stage
as shown in Figure 39.
R
12 kW
9 V * 4 V
vac
400 V * 9 V
u
V
(eq.19)
R
vac
u 938 kW
bulk
Overpower Limitation (OPL)
AC
EMI
Sense current I represents the inductor current I and
Input Filter
S
L
hence represents the input current approximately.
Input−voltage current I represents the RMS input
vac
voltage V and hence represents the input voltage. Their
ac
Output
Voltage
product (I × I ) represents an approximated input power
V
cc
S
vac
(I × V ).
L
ac
Second−stage
Power Converter
V
reg
NCP1653
300 k
V
2
control
Figure 39. Recommended Biasing Scheme in
Follower Boost Mode
0
1
96% I
I
I
FB
ref
ref
Regulation Block
When the NCP1653 operates in constant output voltage
mode, it is possible to make a low−voltage bias supply by
adding an auxiliary winding on the PFC boost inductor in
Figure 40. In PFC boost circuit, the input is the rectified AC
voltage and it is non−constant versus time that makes the
auxiliary winding voltage also non−constant. Hence, the
configuration in Figure 40 charges the voltages in
capacitors C1 and C2 to n×(V − V ) and n×V and n is
Overpower
Limitation
Figure 38. Overpower Limitation Reduces Vcontrol
When the product (I × I ) is greater than a permissible
S
vac
2
level 3 nA , the output V of the regulation block is pulled
reg
out
in
in
to 0 V. It makes V
to be 0 V indirectly and V is
M
control
the turn ratio. As a result, the stack of the voltages is n×V
out
pulled to be its maximum. It generates the minimum duty
ratio or no duty ratio eventually so that the input power is
that is constant and can be used as a biasing voltage.
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14
NCP1653, NCP1653A
Vout
VCC Undervoltage Lockout (UVLO)
Vin
The device typically starts to operate when the supply
voltage V exceeds 13.25 V. It turns off when the supply
CC
voltage V goes below 8.7 V. An 18 V internal ESD Zener
CC
Diode is connected to the V
pin (Pin 8) to prevent
CC
excessive supply voltage. After startup, the operating range
is between 8.7 V and 18 V.
C2
C1
Thermal Shutdown
VCC
An internal thermal circuitry disables the circuit gate
drive and then keeps the power switch off when the junction
temperature exceeds 150_C. The output stage is then
enabled once the temperature drops below typically 120_C
(i.e., 30_C hysteresis). The thermal shutdown is provided
to prevent possible device failures that could result from an
accidental overheating.
Figure 40. Self−biasing Scheme in Constant Output
Voltage Mode
When the NCP1653 circuit is required to be startup
independently from the second−stage converter, it is
recommended to use a circuit in Figure 41. When there is
Output Drive
The output stage of the device is designed for direct drive
of power MOSFET. It is capable of up to 1.5 A peak drive
current and has a typical rise and fall time of 88 and
61.5 ns with a 2.2 nF load.
no feedback current (I = 0 mA) applied to FB pin (Pin 1),
FB
the NCP1653 V
startup current is as low (50 mA
CC
maximum). It is good for saving the current to charge the
capacitor. However, when there is some feedback
V
CC
current the startup current rises to as high as 1.5 mA in the
< 4 V region. That is why the circuit of Figure 41 can
V
CC
be implemented: a PNP bipolar transistor derives the
feedback current to ground at low V levels (V < 4 V)
CC
CC
so that the startup current keeps low and an initial voltage
can be quickly built up in the V capacitor. The values in
CC
Figure 41 are just for reference.
Input
Output
180k
180k
180k
1.5M
560k
100uF
NCP1653
BC556
Figure 41. Recommended Startup Biasing Scheme
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15
NCP1653, NCP1653A
Application Schematic
680 k
680 k
560 k
KBU6K
Fuse
600 mH
CSD04060
150 mH
Input
90 Vac
to
100 nF
4.7 M
Output
390 V
100 mF
450 V
680 nF
1 mF
265 Vac
SPP20N60S
15 V
33 nF
2 x 3.9 mH
470 k
0.1
NCP1653
2.85 k
4.5
10 k
56 k
330 nF
1 nF
1 nF 330 pF
Figure 42. 300 W 100 kHz Power Factor Correction Circuit
Table 1. Total Harmonic Distortion and Efficiency
Input Voltage
(V)
Input Power
(W)
Output Voltage
(V)
Output Current
(A)
Power Factor
Total Harmonic
Distortion (%)
Efficiency
(%)
110
110
110
110
110
110
220
220
220
220
220
220
331.3
296.7
157.3
109.8
80.7
370.0
373.4
381.8
383.5
384.4
385.0
385.4
386.2
386.4
386.7
386.5
386.6
0.83
0.74
0.38
0.26
0.19
0.16
0.77
0.53
0.38
0.27
0.19
0.16
0.998
0.998
0.995
0.993
0.990
0.988
0.989
0.985
0.978
0.960
0.933
0.920
4
4
93
93
92
91
91
91
95
95
93
95
92
92
7
9
10
10
9
67.4
311.4
215.7
157.3
110.0
80.2
8
9
11
14
15
66.9
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16
NCP1653, NCP1653A
APPENDIX I – SUMMARY OF EQUATIONS IN NCP1653 BOOST PFC
Description
Boost Converter
Follower Boost Mode
Constant Output Voltage Mode
Same as Follower Boost Mode
V
V
t ) t
1 2
T
T * t
out
in
+
+
t
2
1
V
* V
t
t
1
T
out
V
in
1
³
+
+
t
1
) t
2
out
Input Current Averaged by
Filter Capacitor
Same as Follower Boost Mode
Same as Follower Boost Mode
I
+ I
L * 50
in
Nominal Output Voltage (I
V
+ I
R
) V
+ 200 mA @ R
FB
FB
out(nom)
FB FB FB1
= 200 mA)
[ I
R
FB FB
Feedback Pin Voltage V
Output Voltage
Please refer to Figure 11.
Same as Follower Boost Mode
FB1
V
in
t V
out
t 192 mA @ R
FB
192 mA @ R
FB
t V
out
t 200 mA @ R
FB
Inductor Current
Peak−Peak Ripple
Same as Follower Boost Mode
DI
t 2 @ I
L * 50
L(pk * pk)
Control Current
I
I
ref
2
control(max)
V
out
I
+ I
+
+ 100 mA
control
control(max)
ǒ1 *
Ǔ
I
+
control
0.04
R
I
FB ref
+ 100 mA
control(max)
and I
t I
control
Switching Frequency
Same as Follower Boost Mode
Same as Follower Boost Mode
f + 67 or 100 kHz
Minimum Inductor for CCM
Input Impedance
Input Power
V
out
V
* V
in
V
1
in
L u L
+
(CRM)
DI
f
out
L(pk * pk)
R R
V
V
R
M
R
V
V
M CS ac out
CS ac out
Z
+
Z
+
+
in
in
R RȀ
S
I
V
2R RȀvac I
V
control ref
vac ref ref
S
R
S
RȀ
I
V
V
2R RȀ
V
I
V
vac ref ref ac
S
vac ref control ac
P
in
+
P
in
R
R
CS
V
out
R R
M CS
V
out
M
Output Power
hR RȀ
I
V
h2 R RȀvac V
S
vac ref ref V
S
refI
V
ac
control ac
P
out
+ hP +
in
P
out
+
R
M
R
V
out
R
M
R
CS
V
CS
out
Maximum Input Power when
Circuit will enter follower boost region when
maximum power is reached.
R
S
RȀ
I
V
V
vac ref ref ac
P
+ P
in
+
I
= 100 mA
in(max)
control
R
R
CS
V
out
M
Current Limit
Power Limit
Same as Follower Boost Mode
Same as Follower Boost Mode
R
S
I
+
@ 200 mA
L(OCP)
R
CS
R
R
vac
) 12 kW
S
2
@ 3 nA
I @ V
L
t
AC
Ǹ
R
CS
2
Output Overvoltage
Output Undervoltage
Same as Follower Boost Mode
Same as Follower Boost Mode
V
+ 107% @ V
out(nom)
out(OVP)
[ 214 mA @ R
FB
V
V
+ 8% @ V
out(nom)
out(UVP * on)
[ 16 mA @ R
FB
+ 12% @ V
[ 24 mA @ R
out(UVP * off)
out(nom)
FB
Input Voltage Sense Pin
Same as Follower Boost Mode
Same as Follower Boost Mode
R
vac
) 12 kW
R
u 938 kWand RȀ +
vac
Resistor R
vac
vac
Ǹ
2
PWM Comparator
Reference Voltage
V
ref
+ 2.62 V
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17
NCP1653, NCP1653A
ORDERING INFORMATION
Device
†
Package
Shipping
Switching Frequency
NCP1653P
PDIP−8
50 Units / Rail
50 Units / Rail
100 kHz
NCP1653PG
PDIP−8
(Pb−Free)
NCP1653DR2
SO−8
2500 Units / Tape & Reel
2500 Units / Tape & Reel
NCP1653DR2G
SO−8
(Pb−Free)
NCP1653AP
PDIP−8
50 Units / Rail
50 Units / Rail
67 kHz
NCP1653APG
PDIP−8
(Pb−Free)
NCP1653ADR2
SO−8
2500 Units / Tape & Reel
2500 Units / Tape & Reel
NCP1653ADR2G
SO−8
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
PACKAGE DIMENSIONS
PDIP−8
P SUFFIX
CASE 626−05
ISSUE L
NOTES:
1. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
8
5
2. PACKAGE CONTOUR OPTIONAL (ROUND OR
SQUARE CORNERS).
3. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
−B−
MILLIMETERS
INCHES
MIN
1
4
DIM MIN
MAX
10.16
6.60
4.45
0.51
1.78
MAX
0.400
0.260
0.175
0.020
0.070
A
B
C
D
F
9.40
6.10
3.94
0.38
1.02
0.370
0.240
0.155
0.015
0.040
F
−A−
NOTE 2
L
G
H
J
2.54 BSC
0.100 BSC
0.76
0.20
2.92
1.27
0.30
3.43
0.030
0.008
0.115
0.050
0.012
0.135
K
L
C
7.62 BSC
0.300 BSC
M
N
−−−
0.76
10
_
1.01
−−−
0.030
10
_
0.040
J
−T−
SEATING
PLANE
N
M
D
K
G
H
M
M
M
B
0.13 (0.005)
T A
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18
NCP1653, NCP1653A
PACKAGE DIMENSIONS
SO−8
D SUFFIX
CASE 751−07
ISSUE AG
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE
MOLD PROTRUSION.
−X−
A
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
8
5
4
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. 751−01 THRU 751−06 ARE OBSOLETE. NEW
STANDARD IS 751−07.
S
M
M
B
0.25 (0.010)
Y
1
K
−Y−
G
MILLIMETERS
DIM MIN MAX
INCHES
MIN
MAX
0.197
0.157
0.069
0.020
A
B
C
D
G
H
J
K
M
N
S
4.80
3.80
1.35
0.33
5.00 0.189
4.00 0.150
1.75 0.053
0.51 0.013
C
N X 45
_
SEATING
PLANE
−Z−
1.27 BSC
0.050 BSC
0.10 (0.004)
0.10
0.19
0.40
0
0.25 0.004
0.25 0.007
1.27 0.016
0.010
0.010
0.050
8
0.020
0.244
M
J
H
D
8
0
_
_
_
_
0.25
5.80
0.50 0.010
6.20 0.228
M
S
S
X
0.25 (0.010)
Z
Y
SOLDERING FOOTPRINT*
1.52
0.060
7.0
4.0
0.275
0.155
0.6
0.024
1.270
0.050
mm
inches
ǒ
Ǔ
SCALE 6:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
MountingTechniques Reference Manual, SOLDERRM/D.
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19
NCP1653, NCP1653A
The product described herein (NCP1653) may be covered by one or more of the following U.S. patents: 6,362,067. There may be other patents pending.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any
liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental
damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over
time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under
its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body,
or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death
may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees,
subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of
personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part.
SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
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For additional information, please contact your
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