NCP177AMX180TCG [ONSEMI]
Linear Voltage Regulator - Fast Transient Response, Enable;型号: | NCP177AMX180TCG |
厂家: | ONSEMI |
描述: | Linear Voltage Regulator - Fast Transient Response, Enable |
文件: | 总11页 (文件大小:584K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
NCP177
Linear Voltage Regulator -
Fast Transient Response,
Enable
500 mA
www.onsemi.com
The NCP177 is CMOS LDO regulator featuring 500 mA output
current. The input voltage is as low as 1.6 V and the output voltage can
be set from 0.7 V.
1
Features
XDFN4
CASE 711AJ
• Operating Input Voltage Range: 1.6 V to 5.5 V
• Output Voltage Range: 0.7 V to 3.6 V
• Quiescent Current typ. 60 mA
MARKING DIAGRAM
• Low Dropout: 200 mV Typ. at 500 mA, V
• High Output Voltage Accuracy 0.8%
= 1.8 V
OUT−NOM
XX M
1
• Stable with Small 1 mF Ceramic Capacitors
• Over−current Protection
XX = Specific Device Code
• Thermal Shutdown Protection: 175°C
M
= Date Code
• With (NCP177A) and Without (NCP177B) Output Discharge
Function
• Available in XDFN4 1 mm x 1 mm x 0.4 mm Package
PINOUT DIAGRAM
• This is a Pb−Free Device
IN
EN
Typical Applications
4
3
• Battery Powered Equipment
• Portable Communication Equipment
• Cameras, Image Sensors and Camcorders
EPAD
1
OUT
2
GND
VIN
VOUT
IN
OUT
CIN
1 μF
COUT
1 μF
NCP177
ON
(Top View)
EN
GND
OFF
ORDERING INFORMATION
See detailed ordering, marking and shipping information on
page 10 of this data sheet.
Figure 1. Typical Application
Schematic
© Semiconductor Components Industries, LLC, 2017
1
Publication Order Number:
October, 2019 − Rev. 5
NCP177/D
NCP177
IN
OUT
IN
OUT
PROG . VOLTAGE
REFERENCE AND
SOFT − START
PROG . VOLTAGE
REFERENCE AND
SOFT − START
EN
EN
0.7 V
0.7 V
THERMAL
SHUTDOWN
THERMAL
SHUTDOWN
GND
GND
NCP177A (with output active discharge)
NCP177B (without output active discharge)
Figure 2. Internal Block Diagram
PIN FUNCTION DESCRIPTION
Pin No.
Pin Name
OUT
GND
EN
Description
1
2
3
4
−
Regulated output voltage pin
Power supply ground pin
Enable pin (active “H”)
IN
Power supply input voltage pin
EPAD
Exposed pad should be tied to ground plane for better power dissipation
ABSOLUTE MAXIMUM RATINGS
Rating
Symbol
IN
Value
−0.3 to 6.0
−0.3 to VIN + 0.3
−0.3 to 6.0
Internally Limited
150
Unit
V
Input Voltage (Note 1)
Output Voltage
OUT
EN
V
Chip Enable Input
V
Output Current
I
mA
°C
°C
V
OUT
Maximum Junction Temperature
Storage Temperature
TJ(MAX)
TSTG
−55 to 150
2000
ESD Capability, Human Body Model (Note 2)
ESD Capability, Machine Model (Note 2)
ESDHBM
ESDMM
200
V
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area.
2. This device series incorporates ESD protection and is tested by the following methods:
ESD Human Body Model tested per JESD22−A114
ESD Machine Model tested per JESD22−A115
Latchup Current Maximum Rating tested per JEDEC standard: JESD78
THERMAL CHARACTERISTICS
Rating
Symbol
Value
Unit
Thermal Characteristics, XDFN4 (Note 3)
Thermal Resistance, Junction−to−Air
RqJA
223
°C/W
3. Measured according to JEDEC board specification. Detailed description of the board can be found in JESD51−7
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2
NCP177
ELECTRICAL CHARACTERISTICS
V
= V
+ 0.5 V or V = 1.6 V (whichever is higher), V = 1.2 V, I
= 1 mA, C = C
= 1.0 mF, T = 25°C
OUT J
IN
OUT−NOM
IN
EN
OUT
IN
The specifications in bold are guaranteed at −40°C ≤ T ≤ 85°C. (Note 4)
J
Parameter
Input Voltage
Test Conditions
Symbol
Min
1.6
Typ
Max
5.5
0.8
1.0
1.2
1.5
0.1
Unit
V
V
IN
Output Voltage
V
V
≥ 1.8 V
T = +25°C
J
V
OUT
−0.8
−2.0
−1.2
−2.5
%
OUT_NOM
−40°C ≤ T ≤ 85°C
J
< 1.8 V
T = +25°C
J
OUT_NOM
−40°C ≤ T ≤ 85°C
J
Line Regulation
V
IN
= V
+ 0.5 V to 5.25 V
LineReg
LoadReg
0.02
%/V
OUT−NOM
V
≥ 1.6 V
IN
Load Regulation
1 mA ≤ I
≤ 500 mA, V ≥ 1.75 V
1
10
380
285
240
200
175
90
mV
mV
OUT
IN
Dropout Voltage (Note 5)
I
= 500 mA
1.4 V ≤ V
1.8 V ≤ V
2.1 V ≤ V
2.5 V ≤ V
3.0 V ≤ V
= 0 mA
< 1.8 V
< 2.1 V
< 2.5 V
< 3.0 V
< 3.6 V
V
DO
295
200
160
130
110
60
OUT
OUT
OUT
OUT
OUT
OUT
Quiescent Current
Standby Current
I
I
Q
mA
mA
OUT
V
EN
= 0 V
I
0.1
1
STBY
Output Current Limit
V
= V
− 100 mV, V ≥ 1.75 V
I
OUT
510
300
510
1.0
800
600
800
mA
OUT
OUT−NOM
IN
V
= V
− 100 mV, V ≥ 1.6 V
OUT−NOM IN
OUT
Short Circuit Current
V
= 0 V, V ≥ 1.75 V
I
mA
V
OUT
IN
SC
EN Pin Threshold Voltage
EN Input Voltage “H”
EN Input Voltage “L”
V
ENH
V
ENL
0.4
0.6
Enable Input Current
V
EN
= V = 5.5 V
I
EN
0.15
75
mA
IN
Power Supply Rejection Ratio
f = 1 kHz, Ripple 0.2 Vp−p,
= V + 1.0 V, I = 30 mA
PSRR
dB
V
IN
OUT−NOM
OUT
(V
≤ 2.0 V, V = 3.0 V)
OUT
IN
Output Noise
f = 10 Hz to 100 kHz
= 4.0 V, V = 0 V, V = V
54
60
mV
RMS
Output Discharge Resistance
(NCP177A option only)
V
IN
R
W
EN
OUT
OUT−NOM
ACTDIS
Thermal Shutdown Temperature
Thermal Shutdown Hysteresis
Temperature rising from 25°C
Temperature falling from T
TSD_TEMP
TSD_HYST
175
20
°C
°C
SD_TEMP
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Performance guaranteed over the indicated operating temperature range by design and/or characterization. Production tested at T = 25°C.
A
Low duty cycle pulse techniques are used during the testing to maintain the junction temperature as close to ambient as possible.
5. Measured when the output voltage falls 3% below the nominal output voltage (the voltage measured under the condition V = V
IN
OUT−NOM
+ 0.5 V).
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3
NCP177
TYPICAL CHARACTERISTICS
V
IN
= V
+ 0.5 V or V = 1.6 V (whichever is higher), V = 1.2 V, I
= 1 mA, C = C
= 1.0 mF, T = 25°C
OUT−NOM
IN
EN
OUT
IN
OUT
J
1.814
1.804
0.708
0.703
0.698
0.693
1.794
1.784
V
= 1.8 V
1.774
1.764
V
= 0.7 V
40
0.688
0.683
OUT−NOM
OUT−NOM
−40
−20
0
20
60
80
−40
−20
0
20
40
60
80
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 3. Output Voltage vs. Temperature
Figure 4. Output Voltage vs. Temperature
0.10
0.08
0.06
0.04
0.02
0
V
V
= 3.3 V
= 3.8 V to 5.25 V
OUT−NOM
3.324
IN
3.314
3.304
3.294
3.284
3.274
3.264
3.254
−0.02
−0.04
−0.06
V
= 3.3 V
40
OUT−NOM
3.244
3.234
−0.08
−0.10
−40
−20
0
20
60
80
−40
−20
0
20
40
60
80
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 5. Output Voltage vs. Temperature
Figure 6. Line Regulation vs. Temperature
5
4
275
250
225
200
175
150
125
100
75
V
= 3.3 V
= 1 mA to 500 mA
OUT−NOM
V
= 1.8 V
OUT−NOM
I
OUT
T = 85°C
J
3
T = 25°C
J
2
1
0
T = −40°C
J
−1
−2
−3
50
−4
−5
−40
25
0
−20
0
20
40
60
80
0
100
200
300
400
500
TEMPERATURE (°C)
OUTPUT CURRENT (mA)
Figure 7. Load Regulation vs. Temperature
Figure 8. Dropout Voltage vs. Output Current
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4
NCP177
TYPICAL CHARACTERISTICS
V
IN
= V
+ 0.5 V or V = 1.6 V (whichever is higher), V = 1.2 V, I
= 1 mA, C = C
= 1.0 mF, T = 25°C
OUT J
OUT−NOM
IN
EN
OUT
IN
275
250
225
200
175
150
125
100
75
160
V
= 3.3 V
V
= 1.8 V
OUT−NOM
OUT−NOM
140
120
100
80
I
= 500 mA
OUT
T = 85°C
J
T = 25°C
J
I
I
= 250 mA
OUT
60
T = −40°C
J
40
= 100 mA
= 10 mA
OUT
50
20
0
25
0
−40
I
OUT
−20
0
20
40
60
80
0
100
200
300
400
500
TEMPERATURE (°C)
OUTPUT CURRENT (mA)
Figure 9. Dropout Voltage vs. Temperature
Figure 10. Dropout Voltage vs. Output Current
1.0
0.9
0.8
0.7
160
140
120
100
80
V
= 3.3 V
OUT−NOM
V
EN
= 0 V
I
= 500 mA
= 250 mA
OUT
0.6
0.5
I
I
0.4
0.3
OUT
60
40
0.2
= 100 mA
= 10 mA
OUT
20
0
V
= 0.7 V to 3.3 V
0.1
0
−40
OUT−NOM
I
OUT
−40
−20
0
20
40
60
80
−20
0
20
40
60
80
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 11. Dropout Voltage vs. Temperature
Figure 12. Standby Current vs. Temperature
90
90
80
70
60
50
40
30
20
I
= 0 mA
85
80
75
70
65
60
OUT
V
V
= 3.3 V
= 0.7 V
OUT−NOM
OUT−NOM
V
= 1.8 V
OUT−NOM
T = −40°C
J
T = 25°C
J
T = 85°C
J
V
= 1.8 V
5.0
55
50
OUT−NOM
I
= 0 mA
10
0
−40
OUT
−20
0
20
40
60
80
2.0
2.5
3.0
3.5
4.0
4.5
5.5
TEMPERATURE (°C)
INPUT VOLTAGE (V)
Figure 13. Quiescent Current vs. Temperature
Figure 14. Quiescent Current vs. Input Voltage
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5
NCP177
TYPICAL CHARACTERISTICS
V
IN
= V
+ 0.5 V or V = 1.6 V (whichever is higher), V = 1.2 V, I
= 1 mA, C = C
= 1.0 mF, T = 25°C
OUT J
OUT−NOM
IN
EN
OUT
IN
350
300
250
200
150
100
1000
950
900
850
800
750
700
650
600
V
= 0 V
1.4 V
OUT−FORCED
1.8 V
T = −40°C
J
3.3 V
T = 25°C
J
V
= 0.7 V
OUT−NOM
T = 85°C
J
50
0
V
= 1.8 V
OUT−NOM
550
500
0
100
200
300
400
500
−40
−20
0
20
40
60
80
OUTPUT CURRENT (mA)
TEMPERATURE (°C)
Figure 15. Ground Current vs. Output Current
Figure 16. Short Circuit Current vs.
Temperature
1000
950
900
850
800
750
700
650
600
1.0
0.9
0.8
0.7
0.6
V
= V
− 0.1 V
OUT−FORCED
OUT−NOM
OFF −> ON
ON −> OFF
1.8 V
1.4 V
3.3 V
V
= 0.7 V
OUT−NOM
0.5
0.4
V
= 1.8 V
0
OUT−NOM
550
500
−40
−20
0
20
40
60
80
−40
−20
20
40
60
80
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 17. Output Current Limit vs.
Temperature
Figure 18. Enable Threshold Voltage vs.
Temperature
70
0.6
V
V
V
= 1.8 V
OUT−NOM
60
50
= 5.5 V
0.5
0.4
0.3
0.2
IN
= 5.5 V
EN
40
30
20
V
V
V
V
= 1.8 V
OUT−NOM
= 4.0 V
= 0 V
IN
0.1
0
EN
10
0
= V
60
OUT−FORCED
OUT−NOM
−40
−20
0
20
40
60
80
−40
−20
0
20
40
80
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 19. Enable Input Current vs.
Temperature
Figure 20. Output Discharge Resistance vs.
Temperature (NCP177A option only)
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NCP177
TYPICAL CHARACTERISTICS
V
IN
= V
+ 0.5 V or V = 1.6 V (whichever is higher), V = 1.2 V, I
= 1 mA, C = C
= 1.0 mF, T = 25°C
OUT J
OUT−NOM
IN
EN
OUT
IN
90
80
70
60
50
40
30
20
6
5
4
3
2
C
= 1 mF X7R 0805
OUT
V
V
= 1.8 V, V = 3.0 V
IN
OUT_NOM
OUT_NOM
= 3.3 V, V = 4.3 V
IN
C
= 1 mF X7R 0805
OUT
Integral Noise:
10 Hz − 100 kHz: 54 mVrms
10 Hz − 1 MHz: 62 mVrms
1
0
V
V
= 1.8 V, V = 3.0 V
IN
= 3.3 V, V = 4.3 V
OUT_NOM
OUT_NOM
10
0
IN
10
100
1k
10k
100k
1M
10M
10
100
1k
10k
100k
1M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 21. Power Supply Rejection Ratio
Figure 22. Output Voltage Noise Spectral
Density
V
= 1.8 V
V
= 1.8 V
OUT−NOM
OUT−NOM
I
IN
I
IN
V
IN
V
IN
V
OUT
V
OUT
1 ms/div
50 ms/div
Figure 23. Turn−ON/OFF − VIN Driven (slow)
Figure 24. Turn−ON − VIN Driven (fast)
V
IN
V
= 1.8 V
OUT−NOM
V
= 1.8 V
3.3 V
V
IN
OUT−NOM
V
EN
t
R
= t = 1 ms
F
I
IN
2.3 V
Without output discharge
With output discharge
V
OUT
1.8 V
V
OUT
1 ms/div
5 ms/div
Figure 25. Turn−ON/OFF − EN Driven
Figure 26. Line Transient Response
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7
NCP177
TYPICAL CHARACTERISTICS
V
IN
= V
+ 0.5 V or V = 1.6 V (whichever is higher), V = 1.2 V, I
= 1 mA, C = C
= 1.0 mF, T = 25°C
OUT J
OUT−NOM
IN
EN
OUT
IN
0.7
0.6
0.5
0.4
0.3
0.2
370
350
330
310
290
P
P
, 2 oz Cu
, 1 oz Cu
D(MAX)
V
IN
V
= 1.8 V
500 mA
OUT−NOM
D(MAX)
1 mA
t
R
= t = 1 ms
F
I
OUT
270
250
230
V
1.8 V
OUT
q
, 1 oz Cu
, 2 oz Cu
JA
T = 25°C
T = 125°C (for P
J
A
0.1
0
q
210
190
JA
curve)
300
D(MAX)
0
100
200
400
500
600
20 ms/div
2
PCB COPPER AREA (mm )
Figure 27. Load Transient Response
Figure 28. qJA and PD(MAX) vs. Copper Area
APPLICATIONS INFORMATION
General
Output Capacitor Selection (COUT)
The NCP177 is a high performance 500 mA low dropout
The LDO requires an output capacitor connected as close
as possible to the output and ground pins. The recommended
capacitor value is 1 mF, ceramic X7R or X5R type due to its
low capacitance variations over the specified temperature
range. The LDO is designed to remain stable with minimum
effective capacitance of 0.8 mF. When selecting the capacitor
the changes with temperature, DC bias and package size
needs to be taken into account. Especially for small package
size capacitors such as 0201 the effective capacitance drops
rapidly with the applied DC bias voltage (refer the
capacitor’s datasheet for details).
linear regulator (LDO) delivering excellent noise and
dynamic performance. Thanks to its adaptive ground current
behavior the device consumes only 60 mA of quiescent
current (no−load condition).
The regulator features low noise of 48 mV , PSRR of
RMS
75 dB at 1 kHz and very good line/load transient
performance. Such excellent dynamic parameters, small
dropout voltage and small package size make the device an
ideal choice for powering the precision noise sensitive
circuitry in portable applications.
A logic EN input provides ON/OFF control of the output
voltage. When the EN is low the device consumes as low as
100 nA typ. from the IN pin.
The device is fully protected in case of output overload,
output short circuit condition or overheating, assuring a very
robust design.
There is no requirement for the minimum value of
equivalent series resistance (ESR) for the C
but the
OUT
maximum value of ESR should be less than 0.5 W. Larger
capacitance and lower ESR improves the load transient
response and high frequency PSRR. Only ceramic
capacitors are recommended, the other types like tantalum
capacitors not due to their large ESR.
Input Capacitor Selection (CIN)
Input capacitor connected as close as possible is necessary
to ensure device stability. The X7R or X5R capacitor should
be used for reliable performance over temperature range.
The value of the input capacitor should be 1 mF or greater for
the best dynamic performance. This capacitor will provide
a low impedance path for unwanted AC signals or noise
modulated onto the input voltage.
There is no requirement for the ESR of the input capacitor
but it is recommended to use ceramic capacitor for its low
ESR and ESL. A good input capacitor will limit the
influence of input trace inductance and source resistance
during load current changes.
Enable Operation
The LDO uses the EN pin to enable/disable its operation
and to deactivate/activate the output discharge function
(A−version only).
If the EN pin voltage is < 0.4 V the device is disabled and
the pass transistor is turned off so there is no current flow
between the IN and OUT pins. On A−version the active
discharge transistor is active so the output voltage is pulled
to GND through 60 W (typ.) resistor.
If the EN pin voltage is > 1.0 V the device is enabled and
regulates the output voltage. The active discharge transistor
is turned off.
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NCP177
The EN pin has internal pull−down current source with
The power dissipated by the LDO for given application
conditions can be calculated by the next equation:
value of 300 nA typ. which assures the device is turned off
when the EN pin is unconnected. In case when the EN
function isn’t required the EN pin should be tied directly to
IN pin.
ǒ Ǔ
D + VIN @ IGND ) VIN * VOUT @ IOUT [W]
P
(eq. 2)
Where: I
is the LDO’s ground current, dependent on the
GND
output load current.
Connecting the exposed pad and N/C pin to a large ground
planes helps to dissipate the heat from the chip.
Output Current Limit
Output current is internally limited to a 750 mA typ. The
LDO will source this current when the output voltage drops
down from the nominal output voltage (test condition is
The relation of θ and P
to PCB copper area and
JA
D(MAX)
Cu layer thickness could be seen on the Figure 26.
V
– 100 mV). If the output voltage is shorted to
OUT−NOM
ground, the short circuit protection will limit the output
current to 700 mA typ. The current limit and short circuit
protection will work properly over the whole temperature
and input voltage ranges. There is no limitation for the short
circuit duration.
Reverse Current
The PMOS pass transistor has an inherent body diode
which will be forward biased in the case when V
Due to this fact in cases, where the extended reverse current
condition can be anticipated the device may require
additional external protection.
> V .
OUT
IN
Thermal Shutdown
When the LDO’s die temperature exceeds the thermal
shutdown threshold value the device is internally disabled.
The IC will remain in this state until the die temperature
decreases by value called thermal shutdown hysteresis.
Once the IC temperature falls this way the LDO is back
enabled. The thermal shutdown feature provides the
protection against overheating due to some application
failure and it is not intended to be used as a normal working
function.
Power Supply Rejection Ratio
The LDO features very high power supply rejection ratio.
The PSRR at higher frequencies (in the range above
100 kHz) can be tuned by the selection of C
and proper PCB layout. A simple LC filter could be added
to the LDO’s IN pin for further PSRR improvement.
capacitor
OUT
Enable Turn−On Time
The enable turn−on time is defined as the time from EN
assertion to the point in which V
nominal value. This time is dependent on various
application conditions such as V , C and T .
will reach 98% of its
OUT
Power Dissipation
Power dissipation caused by voltage drop across the LDO
and by the output current flowing through the device needs
to be dissipated out from the chip. The maximum power
dissipation is dependent on the PCB layout, number of used
Cu layers, Cu layers thickness and the ambient temperature.
The maximum power dissipation can be computed by
following equation:
OUT−NOM OUT
A
PCB Layout Recommendations
To obtain good transient performance and good regulation
characteristics place C and C capacitors as close as
IN
OUT
possible to the device pins and make the PCB traces wide.
In order to minimize the solution size, use 0402 or 0201
capacitors size with appropriate effective capacitance.
Larger copper area connected to the pins will also improve
the device thermal resistance. The actual power dissipation
can be calculated from the equation above (Power
Dissipation section). Exposed pad and N/C pin should be
tied to the ground plane for good power dissipation.
TJ * TA
qJA
125 * TA
PD(MAX)
+
+
[W]
(eq. 1)
qJA
Where: (T − T ) is the temperature difference between the
J
A
junction and ambient temperatures and θ is the thermal
JA
resistance (dependent on the PCB as mentioned above).
For reliable operation junction temperature should be
limited do +125°C.
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9
NCP177
ORDERING INFORMATION
†
Part Number
Voltage Option
Option
Marking
JA
Package
Shipping
NCP177AMX070TCG
NCP177AMX090TCG
NCP177AMX100TCG
NCP177AMX110TCG
NCP177AMX120TCG
NCP177AMX125TCG
NCP177AMX135TCG
NCP177AMX150TCG
NCP177AMX180TCG
NCP177AMX330TCG
NCP177BMX070TCG
NCP177BMX100TCG
NCP177BMX110TCG
NCP177BMX120TCG
NCP177BMX125TCG
NCP177BMX135TCG
NCP177BMX150TCG
NCP177BMX180TCG
NCP177BMX330TCG
0.70 V
0.90 V
1.00 V
1.10 V
1.20 V
1.25 V
1.35 V
1.50 V
1.80 V
3.30 V
0.70 V
1.00 V
1.10 V
1.20 V
1.25 V
1.35 V
1.50 V
1.80 V
3.30 V
JM
JC
JD
JE
With output discharge
JK
JF
JG
JH
XDFN−4
(Pb−Free)
JJ
3000 / Tape & Reel
HA
HC
HD
HE
HL
Without output discharge
HF
HG
HH
HJ
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
www.onsemi.com
10
NCP177
PACKAGE DIMENSIONS
XDFN4 1.0x1.0, 0.65P
CASE 711AJ
ISSUE A
4X L2
NOTES:
A
B
D
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.15 AND
0.20 mm FROM THE TERMINAL TIPS.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
PIN ONE
REFERENCE
E
4X b2
2X
0.05
C
MILLIMETERS
DETAIL A
DIM MIN
0.33
A1 0.00
MAX
0.43
0.05
0.05
C
2X
A
TOP VIEW
A3
b
b2 0.02
0.10 REF
0.15
0.25
0.12
(A3)
0.05
0.05
C
D
1.00 BSC
D2 0.43
0.53
A
E
e
L
1.00 BSC
0.65 BSC
0.20
C
0.30
0.17
SEATING
PLANE
NOTE 4
A1
L2 0.07
C
SIDE VIEW
e
e/2
RECOMMENDED
DETAIL A
4X L
D2
MOUNTING FOOTPRINT*
1
4
2
2X
0.52
0.65
PITCH
PACKAGE
OUTLINE
D2
455
3
4X
0.39
4X
0.11
1.20
4X b
M
0.05
C A B
NOTE 3
BOTTOM VIEW
4X
4X
0.26
0.24
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
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◊
NCP177/D
相关型号:
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