NCP186BMX120TAG [ONSEMI]
Fast Transient Response Low Voltage 1 A LDO;
| 型号： | NCP186BMX120TAG |
| 厂家： | 
ONSEMI |
| 描述： | Fast Transient Response Low Voltage 1 A LDO |
| 文件： | 总13页 (文件大小：334K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
NCP186
Fast Transient Response
Low Voltage 1 A LDO
The NCP186x series are CMOS LDO regulators featuring 1 A
output current. The input voltage is as low as 1.8 V and the output
voltage can be set from 1.2 V.
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Features
• Operating Input Voltage Range: 1.8 V to 5.5 V
• Output Voltage Range: 1.2 to 3.9 V
• Quiescent Current typ. 90 mA
XDFN8
MX SUFFIX
CASE 711AS
• Low Dropout: 100 mV typ. at 1 A, V
• High Output Voltage Accuracy 1%
= 3.0 V
OUT
• Stable with Small 1 mF Ceramic Capacitors
• Over−current Protection
PIN CONNECTIONS
• Built−in Soft Start Circuit to Suppress Inrush Current
• Thermal Shutdown Protection: 165°C
IN
1
2
3
4
8
7
6
5
OUT
OUT
N/C
FB
• With (NCP186A) and Without (NCP186B) Output Discharge
IN
Function
• Available in Small xDFN8 1.2 x 1.6 mm Package
• These are Pb−free Devices
EN
GND
Typical Applications
• Battery Powered Equipment
• Portable Communication Equipment
• Cameras, Image Sensors and Camcorders
(Top View)
MARKING DIAGRAM
VIN
VOUT
IN
OUT
XXMG
CIN
1 mF
COUT
1 mF
G
NCP186
ON
EN
FB
GND
XX = Specific Device Code
OFF
M
= Date Code
G
= Pb−Free Package
Figure 1. Typical Application Schematic
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the ordering
information section on page 4 of this data sheet.
© Semiconductor Components Industries, LLC, 2015
1
Publication Order Number:
June, 2015 − Rev. 0
NCP186/D
NCP186
IN
OUT IN
FB
OUT
FB
VOLTAGE REFERENCE
AND
VOLTAGE REFERENCE
AND
SOFT−START
SOFT−START
EN
EN
0.7 V
0.7 V
THERMAL
SHUTDOWN
THERMAL
SHUTDOWN
GND
GND
NCP186A (with output discharge)
NCP186B (without output discharge)
Figure 2. Internal Block Diagram
Table 1. PIN FUNCTION DESCRIPTION
Pin No. XDFN6
Pin Name
Description
LDO output pin
1
OUT
2
3
N/C
FB
Not internally connected. This pin can be tied to the ground plane to improve thermal dissipation.
4
Feedback input pin
Ground pin
5
GND
EN
6
7
Chip enable input pin (active “H”)
Power supply input pin
IN
8
EPAD
EPAD
It’s recommended to connect the EPAD to GND, but leaving it open is also acceptable
Table 2. ABSOLUTE MAXIMUM RATINGS
Rating
Symbol
IN
Value
Unit
V
Input Voltage (Note 1)
−0.3 to 6.0
Output Voltage
OUT
EN
−0.3 to V + 0.3
V
IN
Chip Enable Input
−0.3 to 6.0
Internally Limited
150
V
Output Current
I
mA
°C
°C
V
OUT
Maximum Junction Temperature
Storage Temperature
T
J(MAX)
T
STG
−55 to 150
2000
ESD Capability, Human Body Model (Note 2)
ESD Capability, Machine Model (Note 2)
ESD
HBM
ESD
200
V
MM
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Refer to ELECTRICAL CHARACTERISTIS and APPLICATION INFORMATION for Safe Operating Area.
2. This device series incorporates ESD protection and is tested by the following methods:
ESD Human Body Model tested per AEC−Q100−002 (EIA/JESD22−A114)
ESD Machine Model tested per AEC−Q100−003 (EIA/JESD22−A115)
Latchup Current Maximum Rating tested per JEDEC standard: JESD78
Table 3. THERMAL CHARACTERISTICS
Rating
Symbol
Value
Unit
Thermal Resistance, Junction−to−Air, XDFN8 1.2 mm x 1.6 mm
R
111
°C/W
q
JA
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2
NCP186
Table 4. ELECTRICAL CHARACTERISTICS
V
V
= V
+ 0.5 V or V = 1.8 V whichever is greater; I
= 1 mA; C = C
= 1.0 mF (effective capacitance) (Note 3);
IN
OUT_NOM
IN
OUT
IN
OUT
= 1.2 V; T = 25°C; unless otherwise noted. The specifications in bold are guaranteed at −40°C ≤ T ≤ 125°C.
EN
J
J
Parameter
Test Conditions
Symbol
Min
Typ
Max
5.5
Unit
V
Operating Input Voltage
Output Voltage
V
IN
1.8
V
I
+ 0.5 V ≤ V ≤ 5.5 V,
V
OUT
−1.0
1.0
%
OUT_NOM
OUT
IN
= 0 to 1 A, −40°C ≤ T ≤ 85°C
J
V
I
+ 0.5 V ≤ V ≤ 5.5 V,
−2.0
1.0
OUT_NOM
IN
= 0 to 1 A, −40°C ≤ T ≤ 125°C
OUT
J
Load Regulation
Line Regulation
Dropout Voltage
I
= 1 mA to 1000 mA
LoadReg
LineReg
0.7
0.002
405
180
175
170
120
110
100
95
5.0
0.1
mV
%/V
mV
OUT
V
= V
+ 0.5 V to 5.0 V
IN
OUT_NOM
I
= 1 A
V
V
V
V
V
V
V
V
V
V
= 1.2 V
= 1.75 V
= 1.8 V
= 1.85 V
= 2.5 V
= 2.8 V
= 3.0 V
= 3.3 V
= 3.5 V
= 3.9 V
V
DO
585
295
285
280
190
170
160
145
135
130
140
1.5
OUT
OUT_NOM
OUT_NOM
OUT_NOM
OUT_NOM
OUT_NOM
OUT_NOM
OUT_NOM
OUT_NOM
OUT_NOM
OUT_NOM
When V
V
falls to
OUT
– 100 mV
OUT_NOM
92
86
Quiescent Current
I
= 0 mA
I
Q
90
mA
mA
mA
mA
mA
V
OUT
Standby Current
V
V
V
= 0 V
I
0.1
EN
STBY
Output Current Limit
Output Short Circuit Current
Enable Input Current
Enable Threshold Voltage
= 90% of V
= 0 V
I
1100
1100
1400
1400
0.15
OUT
OUT
OUT_NOM
OCL
I
OSC
I
0.6
0.4
EN
EN Input Voltage “H”
EN Input Voltage “L”
V
ENH
1.0
V
ENL
Power Supply Rejection Ratio
Output Noise
V
= V
+ 1.0 V, Ripple 0.2 Vp−p,
PSRR
75
dB
IN
OUT_NOM
I
= 30 mA, f = 1 kHz
OUT
f = 10 Hz to 100 kHz
= 5.5 V, V = 0 V, V
V
N
48
34
mV
RMS
Output Discharge Resistance
(NCP186A option only)
V
IN
= 1.8 V
R
W
EN
OUT
AD
Thermal Shutdown
Temperature
Temperature rising from T = +25°C
T
165
20
°C
°C
J
SD
Thermal Shutdown Hysteresis Temperature falling from T
T
SDH
SD
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
3. Effective capacitance, including the effect of DC bias, tolerance and temperature. See the Application Information section for more
information.
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3
NCP186
ORDERING INFORMATION TABLE
Voltage
Option
1.2 V
1.75 V
1.8 V
1.85 V
2.5 V
2.8 V
3.0 V
3.3 V
3.5 V
3.9 V
1.2 V
1.75 V
1.8 V
1.85 V
2.5 V
2.8 V
3.0 V
3.3 V
3.5 V
3.9 V
Part Number
Marking
FA
Option
Package
Shipping
NCP186AMX120TAG
NCP186AMX175TAG
NCP186AMX180TAG
NCP186AMX185TAG
NCP186AMX250TAG
NCP186AMX280TAG
NCP186AMX300TAG
NCP186AMX330TAG
NCP186AMX350TAG
NCP186AMX390TAG
NCP186BMX120TAG
NCP186BMX175TAG
NCP186BMX180TAG
NCP186BMX185TAG
NCP186BMX250TAG
NCP186BMX280TAG
NCP186BMX300TAG
NCP186BMX330TAG
NCP186BMX350TAG
NCP186BMX390TAG
With active discharge
With active discharge
With active discharge
With active discharge
With active discharge
With active discharge
With active discharge
With active discharge
With active discharge
With active discharge
Without active discharge
Without active discharge
Without active discharge
Without active discharge
Without active discharge
Without active discharge
Without active discharge
Without active discharge
Without active discharge
Without active discharge
FC
FD
FL
XDFN−8
(Pb−Free)
FE
3000/Tape&Reel
FF
711AS
FG
FH
FJ
FK
HA
HC
HD
HL
XDFN−8
(Pb−Free)
HE
HF
HG
HH
HJ
3000/Tape&Reel
711AS
HK
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4
NCP186
TYPICAL CHARACTERISTICS
V
IN
= V
+ 0.5 V or V = 1.8 V, whichever is greater, V = 1.2 V, I
= 1 mA, C = C
= 1.0 mF, T = 25°C.
OUT−NOM
IN
EN
OUT
IN
OUT
J
1.212
1.209
1.206
1.203
1.200
1.197
1.194
1.814
1.809
1.804
1.799
1.794
1.789
1.784
1.779
1.774
1.191
1.188
1.185
V
= 1.8 V
OUT−NOM
1.182
1.179
1.176
V
= 1.2 V
80
OUT−NOM
1.769
1.764
−40 −20
0
20
40
60
100
120
−40 −20
0
20
40
60
80
100 120
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 3. Output Voltage vs. Temperature
Figure 4. Output Voltage vs. Temperature
3.932
3.922
3.912
3.902
3.892
3.882
3.872
3.862
3.852
3.842
3.324
3.314
3.304
3.294
3.284
3.274
3.264
3.254
V
= 3.3 V
80
OUT−NOM
V
= 3.9 V
80
OUT−NOM
3.244
3.234
3.832
3.822
−40 −20
0
20
40
60
100 120
−40 −20
0
20
40
60
100 120
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 5. Output Voltage vs. Temperature
Figure 6. Output Voltage vs. Temperature
0.10
0.08
0.06
0.04
0.02
0
5
4
V
V
V
V
= 1.2 V
= 1.8 V
= 3.3 V
= 3.9 V
OUT−NOM
OUT−NOM
OUT−NOM
OUT−NOM
V
V
V
V
= 1.2 V
= 1.8 V
= 3.3 V
= 3.9 V
OUT−NOM
OUT−NOM
OUT−NOM
OUT−NOM
3
2
1
0
−0.02
−0.04
−1
−2
−3
−0.06
I
= 1 mA to 1000 mA
OUT
V
IN
= V
+ 0.5 V to 5.0 V, V ≥ 1.8 V
OUT−NOM IN
−0.08
−0.10
−4
−5
−40 −20
−40 −20
0
20
40
60
80
100 120
0
20
40
60
80
100 120
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 7. Line Regulation vs. Temperature
Figure 8. Load Regulation vs. Temperature
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NCP186
TYPICAL CHARACTERISTICS
V
IN
= V
+ 0.5 V or V = 1.8 V, whichever is greater, V = 1.2 V, I
= 1 mA, C = C
= 1.0 mF, T = 25°C.
OUT J
OUT−NOM
IN
EN
OUT
IN
275
250
225
200
175
150
125
100
75
275
250
225
200
175
150
125
100
75
V
= 1.8 V
V
= 1.8 V
OUT−NOM
OUT−NOM
I
= 1000 mA
OUT
T = 125°C
J
T = 25°C
J
I
I
= 500 mA
= 200 mA
OUT
T = −40°C
J
OUT
50
50
25
0
25
0
−40 −20
I
= 10 mA
OUT
0
200
400
600
800
1000
0
20
40
60
80
100 120
OUTPUT CURRENT (mA)
TEMPERATURE (°C)
Figure 9. Dropout Voltage vs. Output Current
Figure 10. Dropout Voltage vs. Temperature
140
120
100
80
140
120
100
80
T = 125°C
J
V
= 3.3 V
V
= 3.3 V
OUT−NOM
OUT−NOM
I
= 1000 mA
OUT
T = 25°C
J
I
I
= 500 mA
= 200 mA
OUT
60
60
T = −40°C
J
40
40
OUT
20
0
20
0
I
= 10 mA
OUT
0
200
400
600
800
1000
−40 −20
0
20
40
60
80
100
120
OUTPUT CURRENT (mA)
TEMPERATURE (°C)
Figure 11. Dropout Voltage vs. Output Current
Figure 12. Dropout Voltage vs. Temperature
450
400
350
300
250
200
150
100
120
110
100
90
T = 125°C
J
T = 25°C
J
V
= 1.2 V
T = −40°C
J
OUT−NOM
V
V
= 1.8 V
= 3.3 V
OUT−NOM
OUT−NOM
V
= 3.9 V
80
OUT−NOM
70
60
50
0
V
= 1.8 V
OUT−NOM
I
= 0 mA
0
OUT
0
200
400
600
800
1000
−40 −20
20
40
60
80
100 120
OUTPUT CURRENT (mA)
TEMPERATURE (°C)
Figure 13. Ground Current vs. Output Current
Figure 14. Quiescent Current vs. Temperature
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NCP186
TYPICAL CHARACTERISTICS
V
IN
= V
+ 0.5 V or V = 1.8 V, whichever is greater, V = 1.2 V, I
= 1 mA, C = C
= 1.0 mF, T = 25°C.
OUT J
OUT−NOM
IN
EN
OUT
IN
120
110
100
90
1.0
0.9
T = 125°C
T = 25°C
J
J
V
V
V
V
= 1.2 V
= 1.8 V
= 3.3 V
= 3.9 V
OUT−NOM
OUT−NOM
OUT−NOM
OUT−NOM
0.8
0.7
0.6
0.5
0.4
0.3
0.2
T = −40°C
J
80
70
V
I
= 1.8 V
OUT−NOM
= 0 mA
60
50
OUT
0.1
0
V
EN
= 0 V
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
−40 −20
0
20
40
60
80
100 120
INPUT VOLTAGE (V)
TEMPERATURE (°C)
Figure 15. Quiescent Current vs. Input Voltage
Figure 16. Standby Current vs. Temperature
2.0
1.9
1.8
1.7
2.0
1.9
1.8
1.7
1.6
1.5
V
= 1.8 V
OUT−NOM
V
= 3.9 V
= 1.2 V
V
= 3.3 V
OUT−NOM
OUT−NOM
V
= 3.9 V
= 1.2 V
OUT−NOM
V
= 3.3 V
OUT−NOM
V
OUT−NOM
V
OUT−NOM
1.6
1.5
1.4
1.3
V
= 1.8 V
1.4
1.3
OUT−NOM
1.2
1.1
−40 −20
V
= 90% of V
1.2
1.1
V
= 0 V
OUT−FORCED OUT−NOM
OUT−FORCED
0
20
40
60
80
100 120
−40 −20
0
20
40
60
80
100 120
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 17. Short Circuit Current vs.
Temperature
Figure 18. Output Current Limit vs.
Temperature
1.0
0.9
0.8
0.7
0.6
0.6
0.5
0.4
0.3
0.2
V
V
V
V
= 1.2 V
= 1.8 V
= 3.3 V
= 3.9 V
OUT−NOM
OUT−NOM
OUT−NOM
OUT−NOM
OFF −> ON
ON −> OFF
0.5
0.4
0.1
0
−40 −20
0
20
40
60
80
100 120
−40 −20
0
20
40
60
80
100 120
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 19. Enable Threshold Voltage vs.
Temperature
Figure 20. Enable Input Current vs.
Temperature
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NCP186
TYPICAL CHARACTERISTICS
V
IN
= V
+ 0.5 V or V = 1.8 V, whichever is greater, V = 1.2 V, I
= 1 mA, C = C
= 1.0 mF, T = 25°C.
OUT J
OUT−NOM
IN
EN
OUT
IN
50
45
40
35
30
90
80
70
60
50
40
30
20
V
= V
OUT−NOM
OUT−FORCED
= 5.5 V
V
IN
V
EN
= 0 V
C
= 1 mF X7R 0805
OUT
V
V
= 1.2 V
= 3.3 V
OUT−NOM
OUT−NOM
25
20
V
= 1.8 V, V = 2.8 V
IN
OUT−NOM
OUT−NOM
10
0
V
= 3.3 V, V = 4.3 V
IN
−40 −20
0
20
40
60
80
100 120
10
100
1k
10k
100k
1M
10M
TEMPERATURE (°C)
FREQUENCY (Hz)
Figure 21. Output Discharge Resistance vs.
Temperature (NCP186A option only)
Figure 22. Power Supply Rejection Ratio
6
5
4
3
2
V
V
= 1.8 V, V = 2.8 V
IN
OUT−NOM
OUT−NOM
= 3.9 V, V = 4.9 V
IN
C
= 1 mF X7R 0805
OUT
Integral Noise:
V
= 1.8 V
10 Hz − 100 kHz: 45 mVrms
10 Hz − 1 MHz: 61 mVrms
OUT−NOM
V
= 3.9 V
OUT−NOM
10 Hz − 100 kHz: 52 mVrms
10 Hz − 1 MHz: 68 mVrms
1
0
10
100
1K
10K
100K
1M
FREQUENCY (Hz)
Figure 23. Output Voltage Noise Spectral
Density
V
= 1.2 V
V
= 1.2 V
OUT−NOM
OUT−NOM
I
IN
I
IN
V
IN
V
IN
V
OUT
V
OUT
1 ms/div
20 ms/div
Figure 24. Turn−ON/OFF − VIN driven (slow)
Figure 25. Turn−ON − VIN driven (fast)
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NCP186
TYPICAL CHARACTERISTICS
V
IN
= V
+ 0.5 V or V = 1.8 V, whichever is greater, V = 1.2 V, I
= 1 mA, C = C
= 1.0 mF, T = 25°C.
OUT J
OUT−NOM
IN
EN
OUT
IN
V
= 3.9 V
OUT−NOM
V
= 3.9 V
OUT−NOM
I
IN
I
IN
V
IN
V
IN
V
OUT
V
OUT
1 ms/div
20 ms/div
Figure 26. Turn−ON/OFF − VIN driven (slow)
Figure 27. Turn−ON − VIN driven (fast)
V
EN
V
EN
V
OUT
V
= 1.2 V
OUT−NOM
Device with output discharge
V
OUT
V
= 1.8 V
OUT−NOM
Device without output discharge
I
IN
I
IN
200 ms/div
200 ms/div
Figure 28. Turn−ON/OFF − EN driven
Figure 29. Turn−ON/OFF − EN driven
V
= 3.9 V
V
= 1.2 V
OUT−NOM
OUT−NOM
V
IN
V
IN
2.8 V
5.4 V
t
R
= t = 1 ms
F
t = t = 1 ms
R F
1.8 V
1.2 V
4.4 V
3.9 V
V
OUT
V
OUT
10 ms/div
10 ms/div
Figure 30. Line Transient Response
Figure 31. Line Transient Response
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NCP186
TYPICAL CHARACTERISTICS
V
IN
= V
+ 0.5 V or V = 1.8 V, whichever is greater, V = 1.2 V, I
= 1 mA, C = C
= 1.0 mF, T = 25°C.
OUT−NOM
IN
EN
OUT
IN
OUT
J
V
IN
V
IN
1000 mA
1000 mA
t
R
= t = 1 ms
F
t = t = 1 ms
R F
1 mA
I
I
1 mA
OUT
OUT
V
OUT
V
OUT
1.2 V
3.9 V
V
= 1.2 V
V
= 3.9 V
OUT−NOM
OUT−NOM
10 ms/div
10 ms/div
Figure 32. Load Transient Response
Figure 33. Load Transient Response
220
200
180
1.6
P
, 2 oz Cu
, 1 oz Cu
1.4
1.2
1.0
0.8
0.6
0.4
D(MAX)
160
140
120
100
P
D(MAX)
q
, 1 oz Cu
JA
q
, 2 oz Cu
JA
80
60
0.2
0
0
100
200
300
400
500
600
2
PCB COPPER AREA (mm )
Figure 34. qJA and PD(MAX) vs. Copper Area
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NCP186
APPLICATIONS INFORMATION
Enable Operation
General
The NCP186 is a high performance 1 A low dropout linear
The LDO uses the EN pin to enable/disable its operation
and to deactivate/activate the output discharge function
(A−version only).
If the EN pin voltage is < 0.4 V the device is disabled and
the pass transistor is turned off so there is no current flow
between the IN and OUT pins. On A−version the active
discharge transistor is active so the output voltage is pulled
to GND through 34 W (typ.) resistor.
regulator (LDO) delivering excellent noise and dynamic
performance. Thanks to its adaptive ground current
behavior the device consumes only 90 mA typ. of quiescent
current (no−load condition).
The regulator features low noise of 48 mV , PSRR of
RMS
75 dB at 1 kHz and very good line/load transient
performance. Such excellent dynamic parameters, small
dropout voltage and small package size make the device an
ideal choice for powering the precision noise sensitive
circuitry in portable applications.
If the EN pin voltage is > 1.0 V the device is enabled and
regulates the output voltage. The active discharge transistor
is turned off.
A logic EN input provides ON/OFF control of the output
voltage. When the EN is low the device consumes as low as
100 nA typ. from the IN pin.
The device is fully protected in case of output overload,
output short circuit condition or overheating, assuring a very
robust design.
The EN pin has internal pull−down current source with
value of 150 nA typ. which assures the device is turned off
when the EN pin is unconnected. In case when the EN
function isn’t required the EN pin should be tied directly to
IN pin.
Output Current Limit
Output current is internally limited to a 1.4 A typ. The
LDO will source this current when the output voltage drops
down from the nominal output voltage (test condition is
Input Capacitor Selection (CIN)
Input capacitor connected as close as possible is necessary
to ensure device stability. The X7R or X5R capacitor should
be used for reliable performance over temperature range.
The value of the input capacitor should be 1 mF or greater for
the best dynamic performance. This capacitor will provide
a low impedance path for unwanted AC signals or noise
modulated onto the input voltage.
There is no requirement for the ESR of the input capacitor
but it is recommended to use ceramic capacitor for its low
ESR and ESL. A good input capacitor will limit the
influence of input trace inductance and source resistance
during load current changes.
V
– 100mV). If the output voltage is shorted to
OUT−NOM
ground, the short circuit protection will limit the output
current to 1.4 A typ. The current limit and short circuit
protection will work properly over the whole temperature
and input voltage ranges. There is no limitation for the short
circuit duration.
Thermal Shutdown
When the LDO’s die temperature exceeds the thermal
shutdown threshold value the device is internally disabled.
The IC will remain in this state until the die temperature
decreases by value called thermal shutdown hysteresis.
Once the IC temperature falls this way the LDO is back
enabled. The thermal shutdown feature provides the
protection against overheating due to some application
failure and it is not intended to be used as a normal working
function.
Output Capacitor Selection (COUT
)
The LDO requires an output capacitor connected as close
as possible to the output and ground pins. The recommended
capacitor value is 1 mF, ceramic X7R or X5R type due to its
low capacitance variations over the specified temperature
range. The LDO is designed to remain stable with minimum
effective capacitance of 0.8 mF. When selecting the capacitor
the changes with temperature, DC bias and package size
needs to be taken into account. Especially for small package
size capacitors such as 0201 the effective capacitance drops
rapidly with the applied DC bias voltage (refer the
capacitor’s datasheet for details).
Power Dissipation
Power dissipation caused by voltage drop across the LDO
and by the output current flowing through the device needs
to be dissipated out from the chip. The maximum power
dissipation is dependent on the PCB layout, number of used
Cu layers, Cu layers thickness and the ambient temperature.
The maximum power dissipation can be computed by
following equation:
There is no requirement for the minimum value of
equivalent series resistance (ESR) for the C
but the
OUT
maximum value of ESR should be less than 0.5 W. Larger
capacitance and lower ESR improves the load transient
response and high frequency PSRR. Only ceramic
capacitors are recommended, the other types like tantalum
capacitors not due to their large ESR.
TJ * TA
qJA
PD(MAX)
+
[W]
(eq. 1)
Where (T − T ) is the temperature difference between the
J
A
junction and ambient temperatures and θ is the thermal
JA
resistance (dependent on the PCB as mentioned above).
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11
NCP186
The power dissipated by the LDO for given application
conditions can be calculated by the next equation:
100 kHz) can be tuned by the selection of C
and proper PCB layout. A simple LC filter could be added
to the LDO’s IN pin for further PSRR improvement.
capacitor
OUT
ǒ
Ǔ
PD + VIN @ IGND ) VIN * VOUT @ IOUT [W]
(eq. 2)
Enable Turn−On Time
The enable turn−on time is defined as the time from EN
assertion to the point in which V
nominal value. This time is dependent on various
application conditions such as V , C and T .
Where I
the output load current.
Connecting the exposed pad and N/C pin to a large ground
planes helps to dissipate the heat from the chip.
The relation of θ and P
Cu layer thickness could be seen on the Figure 34.
is the LDO’s ground current, dependent on
GND
will reach 98% of its
OUT
OUT−NOM OUT
A
to PCB copper area and
JA
D(MAX)
PCB Layout Recommendations
To obtain good transient performance and good regulation
characteristics place C and C capacitors as close as
Reverse Current
The PMOS pass transistor has an inherent body diode
IN
OUT
possible to the device pins and make the PCB traces wide.
In order to minimize the solution size, use 0402 or 0201
capacitors size with appropriate effective capacitance.
Larger copper area connected to the pins will also improve
the device thermal resistance. The actual power dissipation
can be calculated from the equation above (Power
Dissipation section). Exposed pad and N/C pin should be
tied to the ground plane for good power dissipation.
which will be forward biased in the case when V
> V .
OUT
IN
Due to this fact in cases, where the extended reverse current
condition can be anticipated the device may require
additional external protection.
Power Supply Rejection Ratio
The LDO features very high power supply rejection ratio.
The PSRR at higher frequencies (in the range above
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12
NCP186
PACKAGE DIMENSIONS
XDFN8 1.6x1.2, 0.4P
CASE 711AS
ISSUE A
NOTES:
L
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
D
A
B
2. CONTROLLING DIMENSION: MILLIMETERS.
3. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
8X
L1
DETAIL A
MILLIMETERS
OPTIONAL
DIM
A
A1
b
MIN
0.30
0.00
0.13
MAX
0.45
0.05
0.23
CONSTRUCTION
E
PIN ONE
IDENTIFIER
EXPOSED Cu
MOLD CMPD
1.60 BSC
D
2X
0.10
C
1.20
0.20
0.40 BSC
0.15
1.40
1.20 BSC
D2
E
E2
e
L
L1
0.40
2X
0.10
C
TOP VIEW
DETAIL B
0.25
OPTIONAL
0.05 REF
A
CONSTRUCTION
DETAIL B
0.10
0.08
C
C
A1
RECOMMENDED
MOUNTING FOOTPRINT*
8X
SEATING
PLANE
NOTE 3
C
SIDE VIEW
D2
8X
0.35
1.44
PACKAGE
OUTLINE
DETAIL A
1.40
1
4
E2
8X
L1
1
0.44
0.40
PITCH
8X
0.26
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
8
5
8X b
8X
L
e
0.10
0.05
C
C
A
B
e/2
BOTTOM VIEW
ON Semiconductor and the
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NCP186/D
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