NCP45770IMN24TWG [ONSEMI]
Load Switch, Integrated, ecoSWITCH™ 3.6 mΩ, 24V, 20 A, Fault Protection;
| 型号： | NCP45770IMN24TWG |
| 厂家： | 
ONSEMI |
| 描述： | Load Switch, Integrated, ecoSWITCH™ 3.6 mΩ, 24V, 20 A, Fault Protection |
| 文件： | 总12页 (文件大小：282K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ecoSwitcht
Advanced Load Management
Controlled Load Switch with Ultra Low RON
NCP45770
The NCP45770 load management device provides a component and
area−reducing solution for efficient power domain switching with
inrush current limit via soft start. These devices are designed to
integrate control and driver functionality with a high performance
ultra−low on−resistance power MOSFET in a single package offering
safeguards and monitoring via fault protection and power good
signaling. This cost effective solution is ideal for power management
and disconnect functions in USB Type−C ports and power management
applications requiring low power consumption in a small footprint.
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R
TYP
V
IN
*DC I
MAX
ON
3.6 mW
3 V to 24 V
20 A
*I
is defined as the maximum steady state cur-
MAX
rent the load switch can pass at room ambient tem-
perature without entering thermal lockout. See the
SOA section for more information on transient cur-
rent limitations.
Features
• Advanced Controller with Charge Pump
• Integrated N−Channel MOSFET with Ultra−Low R
ON
DFN12, 3x3
CASE 506DY
• Soft−Start via Controlled Slew Rate
1
• Adjustable Slew Rate Control
• Fault Detection with Power Good Output
• Thermal Shutdown and Under Voltage Lockout
• Short−Circuit and Adjustable Over−Current Protections
• Input Voltage Range 3 V to 24 V
MARKING DIAGRAM
770
ALYWG
• Extremely Low Standby Current
• This is a RoHS/REACH Compliant Device
770
A
L
= Specific Device Code
= Assembly Location
= Wafer Lot
Typical Applications
• USB Type C Power Delivery
Y
= Year
= Work Week
= Pb−Free Package
W
G
• Servers, Set−Top Boxes and Gateways
• Notebook and Tablet Computers
• Telecom, Networking, Medical and Industrial Equipment
• Hot−Swap Devices and Peripheral Ports
PIN CONFIGURATION
V
V
V
V
V
1
12
11
10
9
V
IN
OUT
OUT
OUT
OUT
OUT
VCC
EN
OCP
VIN
EN
V
2
3
4
5
6
CC
Thermal
Shutdown,
UVLO, &
OCP
Bandgap
&
Biases
Control
Logic
13: V
IN
OCP
PG
8
V
7
SR
SS
Delay and
Slew Rate
Control
Charge
Pump
(Top View)
ORDERING INFORMATION
Device
NCP45770IMN24TWG
Package
Shipping
VSS
VOUT
SR
DFN12
(RoHS/
REACH)
3000 / Tape &
Reel
Figure 1. Block Diagram
© Semiconductor Components Industries, LLC, 2018
1
Publication Order Number:
January, 2021 − Rev. 5
NCP45770/D
NCP45770
Table 1. PIN DESCRIPTION
Pin
Name
Function
1,2,3,4,5
V
OUT
Source of MOSFET connected to load. Includes an internal bleed resistor to GND. – All pins must be con-
nected to provide correct Rds, OCP, and current capability.
6
7
8
V
Driver ground
SS
SR
PG
Slew Rate control pin. Slew rate adjustment made with an external capacitor to GND; float if not used.
Active−high, open−drain output that indicates when the gate of the MOSFET is fully charged, external pull up
resistor ≥ 100 kW to an external voltage source required; tie to GND if not used.
9
OCP
Over−current protection trip point adjustment is made with a resistor to ground. Connect OCP directly to
ground it over current protection is not needed.
10
11
V
Driver supply voltage (3.0 V − 5.5 V)
CC
EN
Active−high digital input used to turn on the MOSFET driver, pin has an internal pull down resistor to GND.
Input voltage (3 V − 24 V) – Pin 13 should be used for high current (>0.5 A)
12,13
V
IN
Table 2. ABSOLUTE MAXIMUM RATINGS
Rating
Symbol
Value
−0.3 to 6
−0.3 to 30
−0.3 to 30
−0.3 to 6
−0.3 to 6
−0.3 to 6
49.7
Unit
V
Supply Voltage Range
V
CC
Input Voltage Range
V
IN
V
Output Voltage Range
V
OUT
V
EN Input Voltage Range
V
EN
V
PG Output Voltage Range (Note 1)
OCP Input Voltage Range
V
PG
V
V
OCP
V
Thermal Resistance, Junction−to−Ambient, Steady State (Note 2)
R
R
°C/W
°C/W
A
θJA
Thermal Resistance, Junction−to−Case (V Paddle)
1.7
IN
θJC
Continuous MOSFET Current @ T = 25°C (Note 2)
I
20
A
MAX
Storage Temperature Range
T
−55 to 150
260
°C
°C
kV
kV
mA
STG
Lead Temperature, Soldering (10 sec.)
ESD Capability, Human Body Model (Notes 3 and 4)
ESD Capability, Charged Device Model (Notes 3 and 4)
Latch−up Current Immunity (Note 3)
T
SLD
ESD
ESD
2
HBM
CDM
0.5
LU
100
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. PG is an open drain output that requires an external pull−up resistor > 100 kW to an external voltage source.
2. Surface−mounted on FR4 board using the minimum recommended pad size, 1 oz Cu. Over current protection will limit maximum realized
current to 20 A at highest setting.
3. Tested by the following methods @ T = 25°C:
A
ESD Human Body Model tested per JS−001
ESD Charged Device Model per ESD JS−002
Latch−up Current tested per JESD78
PG, OCP, and SR pins must be connected correctly for compliance.
4. Rating is for all pins except for V and V
which are tied to the internal MOSFET’s Drain and Source. Typical MOSFET ESD performance
IN
OUT
for V and V
should be expected and these devices should be treated as ESD sensitive.
IN
OUT
Table 3. OPERATING RANGES
Rating
Symbol
Min
3
Max
5.5
Unit
V
VCC − (V > 4.5 V)
V
CC
V
CC
IN
VCC − (V < 4.5 V)
4.5
3
5.5
V
IN
VIN − (V > 4.5 V)
V
IN
24
V
CC
VIN − (V < 4.5 V)
V
4.5
short
24
V
CC
IN
OCP External Resistor to VSS
R
open
220
kW
mJ
OCP
OFF to ON Transition Energy Dissipation Limit (See application section)
E
TRANS
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2
NCP45770
Table 3. OPERATING RANGES
Rating
Symbol
Min
Max
0
Unit
V
VSS
V
SS
Ambient Temperature
Junction Temperature
T
−40
−40
85
°C
°C
A
T
125
J
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
Table 4. ELECTRICAL CHARACTERISTICS (TJ = 25°C, V = 3 V − 5.5 V, unless otherwise specified)
CC
Parameter
Conditions
Symbol
Min
Typ
3.6
Max
4.2
4.2
4.2
4.2
100
1.5
300
5.0
0.5
200
Unit
On−Resistance
R
mW
V
CC
V
CC
V
CC
V
CC
V
EN
V
EN
V
EN
V
EN
V
EN
= 4.5 V; V = 3 V
ON
IN
= 3.3 V; V = 4.5 V
3.6
IN
= 3.3 V; V = 15 V
3.6
IN
= 3.3 V; V = 24 V
3.6
IN
Leakage Current − V to V
(Note 5)
= 0 V; V = 24 V
I
LEAK
22.8
0.805
143
1.56
0.35
101
nA
mA
mA
mA
mA
kW
V
IN
OUT
IN
V
IN
V
IN
Control Current − V to V
= 0 V; V = 24 V (for typical)
I
INCTL
IN
SS
IN
Control Current − V to V
= V ; V = 24 V (for typical)
I
INCTL_EN
IN
SS
CC
IN
Supply Standby Current (Note 6)
Supply Dynamic Current (Note 7)
Bleed Resistance
= 0 V; V = 24 V (for typical)
I
STBY
IN
= V ; V = 24 V (for typical)
I
DYN
CC
IN
R
75
2
BLEED
EN Input High Voltage
V
IH
EN Input Low Voltage
V
0.8
1
V
IL
EN Input Leakage Current
EN Pull Down Resistance
V
= 0 V
I
R
V
−1.0
0.02
100
mA
kW
V
EN
IL
76
124
0.1
100
130
PD
OL
PG Output Low Voltage
I
= 100 mA
0.022
3.3
SINK
PG Output Leakage Current
Slew Rate Control Constant (Note 8)
FAULT PROTECTIONS
V
TERM
= 3.3 V
I
nA
mA
OH
K
SR
70
109
Thermal Shutdown Threshold (Note 9)
Thermal Shutdown Hysteresis (Note 9)
T
145
20
°C
°C
V
SDT
T
HYS
V
IN
V
IN
Under Voltage Lockout Threshold
Under Voltage Lockout Hysteresis
V
rising
V
UVLO
1.8
150
1.9
2.04
227
2.9
9.3
16.2
20
2.3
300
3.4
IN
V
HYS
mV
A
Over−Current Protection Trip
(V = 3.3 V)
CC
I
R
R
R
R
R
= open
TRIP
OCP
OCP
OCP
OCP
OCP
= 100 kW
= 20 kW
= 1 kW (Note 10)
= short to GND (Note 10)
20
Over−Current Protection Blanking Time
t
2.25
35
ms
A
OCP
Short−Circuit Protection Trip Current
(Note 11)
I
TJ = −40°C
SC
TJ = 150°C
20
TA = 25°C, DC Current (Note 12)
20
5. Average current from V to V
with MOSFET turned off.
IN
OUT
6. Average current from V to GND with MOSFET turned off.
CC
7. Average current from V to GND after charge up time of MOSFET.
CC
8. See Applications Information section for details on how to adjust the gate slew rate.
9. Operation above T = 125°C is not guaranteed.
J
10.Transient currents exceeding the short−circuit protection trip current will cause the device to fault. For OCP settings less than 20 kW, high
steady state currents may cause an over temperature lockout before the OCP threshold is reached due to self−heating.
11. Short Circuit Protection protects the device against hard shorts (R
≤ 250 mW Vout to Ground) for Vin < 18 V, and against soft shorts
SHORT
(R
> 250 mW) for Vin < 24 V. Short circuit protection testing assumed a 100 W supply capability limit on Vin.
SHORT
12.A sustained current of more then 20 A may cause a SCP trip or thermal lockout due to self−heating.
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3
NCP45770
Table 5. SWITCHING CHARACTERISTICS (T = 25°C unless otherwise specified) (Notes 13 and 14)
J
Parameter
Conditions
= 4.5 V; V = 3 V
Symbol
Min
13
Typ
20.3
20.6
23
Max
28
Unit
Output Slew Rate − Default
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
SR
V/ms
IN
= 5.0 V; V = 3 V
13
28
IN
= 3.3 V; V = 24 V
13
28
IN
= 5.0 V; V = 24 V
13
23
28
IN
Output Turn−on Delay
= 4.5 V; V = 3 V
T
ON
100
100
100
100
162
161
446
443
60
700
700
700
700
ms
ms
IN
= 5.0 V; V = 3 V
IN
= 3.3 V; V = 24 V
IN
= 5.0 V; V = 24 V
IN
Output Turn−off Delay
= 4.5 V; V = 3 V
T
OFF
IN
= 5.0 V; V = 3 V
60
IN
= 3.3 V; V = 24 V
40
IN
= 5.0 V; V = 24 V
40
IN
Power Good Turn−on Time
Power Good Turn−off Time (Note 15)
= 4.5 V; V = 3 V
T
0.25
0.25
0.25
0.25
0.5
0.5
1.5
1.5
2.5
2.5
2.5
2.5
10
ms
ns
IN
PG,ON
= 5.0 V; V = 3 V
IN
= 3.3 V; V = 24 V
IN
= 5.0 V; V = 24 V
IN
= 4.5 V; V = 3 V
T
PG,OFF
IN
= 5.0 V; V = 3 V
10
IN
= 3.3 V; V = 24 V
10
IN
= 5.0 V; V = 24 V
10
IN
13.See below figure for Test Circuit and Timing Diagram.
14.Tested with the following conditions: V = V ; R = 100 kW; R = 10 W; C = 0.1 mF.
TERM
CC
PG
L
L
15.PG Turn−off time is very dependent on external pull up resistor and capacitive loading. Tested with 100 kW pull up to 3.3 V.
VIN
VOUT
VCC
EN
OCP
NCP45770
VSS
RL
CL
OFF ON
PG
SR
50%
50%
TON
VEN
Dt
TOFF
90%
90%
DV
Dt
DV
SR=
10%
VOUT
TPG,ON
TPG,OFF
50%
50%
VPG
Figure 2. Switching Characteristics Test Circuit and Timing Diagram
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4
NCP45770
TYPICAL CHARACTERISTICS
3.70
3.68
3.66
3.64
6
5
4
3
2
3.62
3.60
1
0
2
6
10
14
18
22
26
−80
−40
0
40
80
120
Vin (V)
TEMPERATURE (°C)
Figure 3. On−Resistance vs. Input Voltage
Figure 4. On−Resistance vs. Temperature
1.7
1.5
1.3
1.1
2.4
V
= 5.5 V
CC
2.0
1.6
1.2
0.8
V
= 5.0 V
= 4.5 V
CC
CC
V
CC
= 5.5 V
V
0.9
V
= 3.0 V
80
CC
0.4
0
0.7
0.5
V
= 3.3 V
CC
2
4
6
8
10 12 14 16 18 20 22 24
Vin (V)
−80
−40
0
40
120
160
TEMPERATURE (°C)
Figure 5. Supply Standby Current vs. Supply
Voltage
Figure 6. Supply Standby Current vs.
Temperature
450
400
350
300
250
200
150
380
360
V
= 5.5 V
= 3.0 V
CC
V
V
= 5.5 V
CC
= 5.0 V
= 4.5 V
CC
CC
340
320
V
CC
V
V
= 3.0 V
CC
300
280
100
260
240
50
0
−80
0
2
4
6
8
10 12 14 16 18 20 22 24 26
Vin (V)
−40
0
40
80
120
160
TEMPERATURE (°C)
Figure 7. Dynamic Current vs. Input Voltage
Figure 8. Supply Dynamic Current vs.
Temperature
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NCP45770
TYPICAL CHARACTERISTICS
15
14
13
12
11
10
9
8
7
6
5
900
800
V
V
= 5.5 V
CC
700
600
500
400
300
200
Vin = 24 V
= 3.0 V
CC
4
Vin = 3 V
3
2
1
0
100
0
0
2
4
6
8
10 12 14 16 18 20 22 24 26
Vin (V)
−80 −60 −40 −20
0
20 40 60 80 100 120
TEMPERATURE (°C)
Figure 9. Input to Output Leakage vs. Input
Voltage
Figure 10. Input to Output Leakage vs.
Temperature
1.0
0.9
0.8
0.7
180
160
Vin = 24 V
Vin = 3 V
Vin = 24 V
140
120
100
80
0.6
0.5
0.4
0.3
0.2
60
40
Vin = 3 V
20
0
0.1
0
−80 −60 −40 −20
0
20 40 60 80 100 120
−80 −60 −40 −20
0
20 40 60 80 100 120
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 11. Vin Controller Current vs.
Temperature (EN = 0)
Figure 12. Vin Controller Current vs.
Temperature (EN = HIGH)
0.50
0.45
0.40
0.35
0.30
0.25
0.20
0.15
500
450
400
350
300
250
200
150
100
Vin = 24 V
V
CC
= 3.0 V
V
CC
= 5.5 V
Vin = 15 V
Vin = 3 V
0.10
0.05
0
50
0
0
4
8
12
16
20
24
−80 −60 −40 −20
0
20 40 60 80 100 120
Vin (V)
TEMPERATURE (°C)
Figure 13. Output Turn−On Delay vs. Input
Figure 14. Output Turn−On Delay vs.
Voltage
Temperature
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NCP45770
TYPICAL CHARACTERISTICS
2.25
2.00
1.75
1.50
1.25
1.00
0.75
0.50
2500
2000
V
V
= 3.0 V
CC
Vin = 24 V
1500
1000
= 5.0 V
= 5.5 V
CC
V
CC
Vin = 3 V
500
0
0.25
0
−80
−40
0
40
80
120
0
2
4
6
8
10 12 14 16 18 20 22 24 26
Vin (V)
TEMPERATURE (°C)
Figure 15. Power Good Turn−On Time vs.
Figure 16. Power Good Turn−On vs.
Input Voltage
Temperature
23.5
23.0
22.5
22.0
21.5
11.1
11.0
10.9
10.8
10.7
10.6
10.5
10.4
V
= 5.5 V
CC
V
= 5.5 V
= 3.0 V
CC
CC
V
CC
= 3.0 V
V
21.0
20.5
10.3
10.2
0
2
4
6
8
10 12 14 16 18 20 22 24 26
Vin (V)
0
2
4
6
8
10 12 14 16 18 20 22 24 26
Vin (V)
Figure 17. Default Slew Rate vs. Input Voltage
Figure 18. Slew Rate vs. Input Voltage
110
105
100
95
3.1
3.0
2.9
2.8
2.7
2.6
2.5
V
= 3.0 V
= 3.3 V
CC
V
CC
CC
V
= 4.5 V
= 5.5 V
90
85
80
V
CC
2.4
2.3
−80
−60
−40
−20
0
20
40
60
0
2
4
6
8
10 12 14 16 18 20 22 24 26
Vin (V)
TEMPERATURE (°C)
Figure 19. KSR vs. Temperature
Figure 20. OCP Trip Current vs. Input Voltage
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NCP45770
TYPICAL CHARACTERISTICS
36
34
32
30
28
26
24
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
V
CC
= 5.5 V
V
CC
= 3.0 V
22
20
1.0
0.5
−80
−40
0
40
80
120
160
−60 −40 −20
0
20 40 60 80 100 120 140 160
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 21. OCP Trip Current vs. Temperature
(OCP = Open)
Figure 22. SCP Trip Current vs. Temperature
120
110
100
2.10
2.05
2.00
1.95
1.90
1.85
Vin Ascending
Vin Descending
90
80
1.80
1.75
−80
−40
0
40
80
120
160
−80
−40
0
40
80
120
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 23. RBLEED vs. Temperature
Figure 24. UVLO Trip Voltage vs. Temperature
1E−2
1E−3
1E−4
1E−5
0
20
40
60
80
100
CURRENT (A)
Figure 25. Safe Operating Area Transient
Current
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NCP45770
APPLICATIONS INFORMATION
NCP45770 OCP Trip Current per R_OCP Resistance
Enable Control
The NCP45770 part enables the MOSFET in an
active−high configuration. When the EN pin is at a logic
32
28
24
20
16
12
8
high level and the V supply pin has an adequate voltage
Upper Limit
Lower Limit
CC
applied, the MOSFET will be enabled. When the EN pin is
at a logic low level, the MOSFET will be disabled. An
internal pull down resistor to ground on the EN pin ensures
that the MOSFET will be disabled when not driven.
Typical
Short−Circuit Protection
The NCP45770 device is equipped with a short−circuit
protection that helps protect the part and the system from a
sudden high−current event, such as the output, V
hard−shorted to ground.
4
0
, being
OUT
0
20
40
60
80 100 120 140 160 180 200
Once active, the circuitry monitors the voltage difference
between the V pin and the V pin. When the difference
R_OCP (kW)
IN
OUT
Figure 26. OCP Trip Current Setting
is equal to the short−circuit protection threshold voltage, the
MOSFET is turned off and the load bleed is activated. The
part remains off and is latched in the Fault state until EN is
Thermal Shutdown
The thermal shutdown of the NCP45770 device protects
the part from internally or externally generated excessive
temperatures. This circuitry is disabled when EN is not
active to reduce standby current. When an over−temperature
condition is detected, the MOSFET is turned off and the load
bleed is activated.
The part comes out of thermal shutdown when the
junction temperature decreases to a safe operating
temperature as dictated by the thermal hysteresis. Upon
exiting a thermal shutdown state, and if EN remains active,
the MOSFET will be turned on in a controlled fashion with
the normal output turn−on delay and slew rate.
toggled or V supply voltage is cycled, at which point the
CC
MOSFET will be turned on in a controlled fashion with the
normal output turn−on delay and slew rate. The short circuit
protection feature protects the device from hard shorts
(R
SHORT
< 250 mW V
to GND) for V ≤ 18 V. Hard
OUT IN
short circuit testing used a 10 mW short to ground for this
scenario. The short circuit protection circuitry remains
active regardless of the EN state to protect against enabling
into a short circuit.
Over−Current Protection
The NCP45770 device is equipped with an over−current
protection (OCP) that helps protect the part and the system
from a high current event which exceeds the expected
operational current (e.g., a soft short).
Under Voltage Lockout
The under voltage lockout of the NCP45770 device turns
the MOSFET off and activates the load bleed when the input
In the event that the current from the V pin to the V
IN
OUT
voltage, V , drops below the under voltage lockout
IN
pin exceeds the OCP threshold for longer than the blanking
time, the MOSFET will shut down and the PG pin is driven
low. Like the short−circuit protection, the part remains
threshold. This circuitry is disabled when EN is not active to
reduce standby current.
If the V voltage rises above the under voltage lockout
IN
latched in the Fault state until EN is toggled or V supply
CC
threshold, and EN remains active, the MOSFET will be
turned on in a controlled fashion with the normal output
turn−on delay and slew rate.
voltage is cycled, at which point the MOSFET will be turned
on in a controlled fashion with the normal output turn−on
delay and slew rate.
The over−current trip point is determined by the resistance
between the OCP pin and ground. If no over−current
protection is needed, then the OCP pin should be tied to
GND; if the OCP protection is disabled in this way, the
short−circuit protection will still remain active.
Power Good
The NCP45770 device has a power good output (PG) that
can be used to indicate when the gate of the MOSFET is fully
charged. The PG pin is an active−high, open−drain output
www.onsemi.com
9
NCP45770
that requires an external pull up resistor, RPG, greater than
Where I is the maximum load current, and SR is the
max typ
or equal to 100 kW to an external voltage source, VTERM,
that is compatible with input levels of all devices connected
to this pin, as shown in Figure 27.
The power good output can be used as the enable signal for
other active−high devices in the system, as shown in Figure
27. This allows for guaranteed by design power sequencing
and reduces the number of enable signals needed from the
system controller. If the power good feature is not used in the
application, the PG pin should be tied to GND.
typical default slew rate when no external load capacitor is
added to the SR pin.
OFF to ON Transition Energy Dissipation
The energy dissipation due to load current traveling from
V
IN
to V
is very low during steady state operation due
OUT
to the low R . When the EN signal is asserted high, the load
ON
switch transitions from an OFF state to an ON state. During
this time, the resistance from V to V
transitions from
IN
OUT
high impedance to R , and additional energy is dissipated
ON
in the device for a short period of time. The worst case
energy dissipated during the OFF to ON transition can be
approximated by the following equation:
ǒ
Ǔ @ dt
(eq. 3)
E + 0.5 @ VIN @ IINRUSH ) 0.8 @ ILOAD
Where V is the voltage on the V pin, I is the
INRUSH
IN
IN
inrush current caused by capacitive loading on V
, and dt
OUT
is the time it takes V
be calculated using the following equation:
to rise from 0 V to V . I
can
OUT
IN INRUSH
Figure 27. Guaranteed−by−Design Power
Sequencing Example
dv
IINRUSH
+
@ CL
(eq. 4)
dt
Slew Rate Control
The NCP45770 device is equipped with controlled output
slew rate which provides soft start functionality. This limits
the inrush current caused by capacitor charging and enables
these devices to be used in hot swapping applications.
The slew rate can be decreased with an external capacitor
added between the SR pin and ground. With an external
capacitor present, the slew rate can be determined by the
following equation:
Where dv/dt is the programmed slew rate, and C is the
L
capacitive loading on V . To prevent thermal lockout or
OUT
damage to the device, the energy dissipated during the OFF
to ON transition should be limited to E
operating ranges table.
listed in
TRANS
ecoSWITCH LAYOUT GUIDELINES
Electrical Layout Considerations
Correct physical PCB layout is important for proper low
noise accurate operation of all ecoSWITCH products.
KSR
(eq. 1)
Slew Rate +
[Vńs]
CSR
Power Planes: The ecoSWITCH is optimized for extremely
low Ron resistance, however, improper PCB layout can
substantially increase source to load series resistance by
adding PCB board parasitic resistance. Solid connections to
where K is the specified slew rate control constant, found
SR
on page 3, and C is the capacitor added between the SR pin
SR
and ground. Note that the slew rate of the device will always
be the lower of the default slew rate and the adjusted slew
the V and V
pins of the ecoSWITCH to copper planes
rate. Therefore, if the C is not large enough to decrease the
IN
OUT
SR
should be used to achieve low series resistance and good
thermal dissipation. The ecoSWITCH requires ample heat
dissipation for correct thermal lockout operation. The
internal FET dissipates load condition dependent amounts
of power in the milliseconds following the rising edge of
enable, and providing good thermal conduction from the
slew rate more than the specified default value, the slew rate
of the device will be the default value.
Capacitive Load
The peak in−rush current associated with the initial
charging of the application load capacitance needs to stay
below the specified I . C (capacitive load) should be less
max
L
packaging to the board is critical. Direct coupling of V to
IN
then C
as defined by the following equation:
max
V
OUT
should be avoided, as this will adversely affect slew
rates. The number and location of pins for specific
ecoSWITCH products may vary. This demonstrates large
Imax
SRtyp
(eq. 2)
Cmax
+
planes for both V and V
, while avoiding capacitive
OUT
IN
coupling between the two planes.
ecoSwitch is a trademark of Semiconductor Component Industries, LLC (SCILLC)
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10
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
DFN12 3x3, 0.5P
CASE 506DY
ISSUE A
1
DATE 26 OCT 2022
SCALE 2:1
GENERIC
MARKING DIAGRAM*
XXXXX
XXXXX
ALYWG
G
XXXXX = Specific Device Code
A
L
Y
W
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present. Some products
may not follow the Generic Marking.
(Note: Microdot may be in either location)
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON65584G
DFN12 3X3, 0.5P
PAGE 1 OF 1
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