NCP5500DADJR2G [ONSEMI]
500 mA LDO Voltage Regulator; 500毫安LDO稳压器
| 型号： | NCP5500DADJR2G |
| 厂家： | 
ONSEMI |
| 描述： | 500 mA LDO Voltage Regulator |
| 文件： | 总13页 (文件大小：213K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
NCP5500, NCV5500,
NCP5501, NCV5501
500 mA LDO Voltage
Regulator
These linear low drop voltage regulators provide up to 500 mA over
a user−adjustable output range of 1.25 V to 5.0 V, or at a fixed output
voltage of 1.5 V, 3.3 V or 5.0 V, with typical output voltage accuracy
better than 3%. An internal PNP pass transistor permits low dropout
voltage and operation at full load current at the minimum input
voltage. NCV versions are qualified for demanding automotive
applications that require extended temperature operation and site and
change control. NCP5500 and NCV5500 versions include an
Enable/Shutdown function and are available in a DPAK 5 and SOIC 8
packages. NCP5501 and NCV5501 versions are available in DPAK 3
for applications that do not require logical on/off control.
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MARKING DIAGRAMS
DPAK 5
1
CENTER LEAD CROP
CASE 175AA
x5500yG
ALYWW
5
Pin 1. EN
2. V
TAB,3. GND
4. V
in
1
5
out
5. NC/ADJ
This regulator family is ideal for applications that require a broad
input voltage range, and low dropout performance up to 500 mA load
using low cost ceramic capacitors. Integral protection features include
short circuit current and thermal shutdown.
4
DPAK 3
SINGLE GAUGE
CASE 369C
x5501yG
ALYWW
2
1
3
Features
Pin 1. V
1
3
in
TAB,2. GND
3. V
Output Current up to 500 mA
2.9% Output Voltage Accuracy
Low Dropout Voltage (230 mV at 500 mA)
Enable Control Pin (NCP5500 / NCV5500)
Reverse Bias Protection
Short Circuit Protection
Thermal Shutdown
Wide Operating Temperature Range
out
x
= P (NCP), V (NCV)
5500/1 = Device Code
y
= Output Voltage
= L = 1.5 V
= T = 3.3 V
= U = 5.0 V
= W = Adjustable
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
A
L
Y
WW
G
NCV5500 / NCV5501; −40C to +125C Ambient Temperature
NCP5500 / NCP5501; −40C to +85C Ambient Temperature
NCV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
Stable with Low Cost Ceramic Capacitors
These are Pb−Free Devices
8
5500x
ALYW
SOIC−8
CASE 751
8
1
G
1
Pin 1. V
in
Typical Applications
x
= Output Voltage, NCP/NCV
A = Adjustable, NCV
B = Adjustable, NCP
= Assembly Location
= Wafer Lot
2. GND
3. GND
Automotive
4. V
out
Industrial and Consumer
Post SMPS Regulation
Point of Use Regulation
A
L
5. NC/ADJ
6. GND
7. GND
8. EN
Y
= Year
W = Work Week
G
= Pb−Free Package
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 10 of this data sheet.
Semiconductor Components Industries, LLC, 2013
1
Publication Order Number:
April, 2013 − Rev. 12
NCP5500/D
NCP5500, NCV5500, NCP5501, NCV5501
NCP5500
NCV5500
NCP5501
NCV5501
V
out
V
in
Output
Input
C
10 mF
in
C
4.7 mF
out
R *
1
Enable
EN*
NC/ADJ*
R
L
GND
GND
OFF ON
R *
2
*Applicable to NCP5500/NCV5500 only.
Figure 1. Typical Application Circuit
PIN FUNCTION DESCRIPTIONS
DPAK 3
Pin No.
−
DPAK 5
Pin No.
1
SOIC−8
Pin No.
8
Pin
Name
Description
EN
Enable. This pin allows for on/off control of the regulator. High level turns on the
output. To disable the device, connect to ground. If this function is not in use, con-
nect to V .
in
1
2, Tab
3
2
1
V
Positive power supply input voltage.
in
3, Tab
2, 3, 6, 7
GND
Ground. This pin is internally connected to the Tab heat sink.
Regulated output voltage.
4
5
4
5
V
out
−
NC/ADJ
No connection (Fixed output versions).
Voltage−adjust input (Adjustable output version). Use an external voltage divider
to set the output voltage over a range of 1.25 V to 5.0 V.
V
in
V
out
Current Limit and
Saturation Sense
Error
Amplifier
Bandgap
Reference
−
+
Thermal
Shutdown
Connection for Fixed Output
Enable
Block*
EN*
GND
Connection for Adjustable Output
NC / ADJ*
*Applicable to NCP5500/NCV5500 only.
Figure 2. Block Diagram
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NCP5500, NCV5500, NCP5501, NCV5501
ABSOLUTE MAXIMUM RATINGS
Rating
Symbol
Min
−0.3 (Note 2)
−0.3
Max
+18
Unit
V
Input Voltage (Note 1)
Output, Enable Voltage
V
in
V
out
, EN
+16 or
V
V
+ 0.3
in
(Notes 2 and 5)
Maximum Junction Temperature
Storage Temperature
T
−
150
C
C
−
J
T
Stg
−55
+150
Moisture Sensitivity Level
All Packages
MSL
1
Lead Temperature Soldering
C
Reflow (SMD Styles Only), Pb−Free Versions (Note 3)
ESD Capability, Human Body Model (Note 4)
ESD Capability, Machine Model (Note 4)
T
265 Peak
sld
ESD
4000
200
−
−
−
V
V
V
HBM
ESD
MM
ESD Capability, Charged Device Model (Note 4)
ESD
1000
CDM
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
*Latchup Current Maximum Rating: 100 mA per JEDEC standard: JESD78.
1. Refer to Electrical Characteristics and Application Information for Safe Operating Area.
2. Reverse bias protection feature valid only if V − V v 7 V.
out
in
3. Pb−Free, 60 sec –150 sec above 217C, 40 sec max at peak temperature
4. This device series incorporates ESD protection and is tested by the following methods:
ESD Human Body Model tested per AEC−Q100−002 (EIA/JESD22−A114)
ESD Machine Model tested per AEC−Q100−003 (EIA/JESD22−A115)
ESD Charged Device Model tested per EIA/JES D22/C101, Field Induced Charge Model
5. Maximum = +16 V or (V + 0.3 V), whichever is lower.
in
THERMAL CHARACTERISTICS
Rating
Symbol
Min
Max
Unit
Package Dissipation
P
D
Internally Limited
W
Thermal Characteristics, DPAK 3 and DPAK 5 (Note 1)
Thermal Resistance, Junction−to−Air (Note 6)
Thermal Resistance, Junction−to−Case
C/W
C/W
R
q
60
q
JA
JC
5.2
R
Thermal Characteristics, SOIC−8 (Note 1)
Thermal Resistance, Junction−to−Air (Note 6)
Thermal Reference, Junction−to−Lead
80
22
R
R
q
JA
JL
Y
2
6. As measured using a copper heat spreading area of 650 mm , 1 oz copper thickness.
OPERATING RANGES
Rating
Operating Input Voltage (Note 1)
Symbol
Min
Max
Unit
V
in
V
out
+ V , 2.5 V
16
V
DO
(Note 7)
Adjustable Output Voltage Range (Adjustable Version Only)
V
out
1.25
5.0
V
Operating Ambient Temperature Range
NCP5500, NCP5501
T
A
C
−40
−40
85
125
NCV5500, NCV5501
7. Minimum V = 2.5 V or (V + V ), whichever is higher.
in
out
DO
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NCP5500, NCV5500, NCP5501, NCV5501
ELECTRICAL CHARACTERISTICS V = 2.5 V or V + 1.0 V (whichever is higher), C = 10 mF, C = 4.7 mF, for typical values T
in
out
in
out
A
= 25C, for min/max values T = −40C to 85C (NCP Version), T = −40C to 125C (NCV Version) unless otherwise noted (Note 13).
A
A
Characteristic
Symbol
Test Conditions
Min
Typ
Max
Unit
OUTPUT
Output Voltage (Note 14)
5 V Regulator
V
NOM
2.9%
V
V
V
3.3 V Regulator
1.5 V Regulator
ADJ Regulator
V
out
T = 25C, I = 50 mA
A out
Output Voltage (Note 8)
5 V Regulator
(−4.9%)
4.755
3.138
1.427
1.189
V
5.0
3.3
1.5
1.25
(+4.9%)
5.245
3.462
1.574
1.311
NOM
V
V
V
3.3 V Regulator
1.5 V Regulator
ADJ Regulator
V
out
1.0 mA < I < 500 mA
out
Line Regulation
REG
I
= 50 mA
−1.0
0.1
1.0
%
LINE
out
2.5 V or (V + 1.0 V) < V < 16 V
out
in
Load Regulation
REG
1.0 mA < I < 500 mA
−1.0
0.35
1.0
%
LOAD
out
Dropout Voltage (Note 9)
5.0 V Version
V
DO
mV
I
= 1.0 mA, DV = −2%
−
−
−
−
−
−
−
−
5
230
5
230
−
−
5
230
90
700
90
out
out
I
I
I
I
= 500 mA, DV = −2%
out
out
out
out
out
out
out
out
3.3 V Version
I
= 1.0 mA, DV = −2%
out
700
1073
1073
90
= 500 mA, DV = −2%
out
1.5 V Version (Note 10)
I
= 1.0 mA, DV = −2%
out
= 500 mA, DV = −2%
out
Adjustable Version (Note 11)
I
= 1.0 mA, DV = −2%
out
700
= 500 mA, DV = −2%
out
Ground Current
I
I
= 100 mA
= 500 mA
300
10
500
20
mA
mA
GND
out
I
out
Disable Current in Shutdown
(NCP5500, NCV5500)
I
Adjustable and 1.5 V versions
All other versions
30
40
50
50
mA
SD
Current Limit
I
V
= 90% of V
120 Hz
= 100 mA, 1 kHz
10 kHz
500
700
900
mA
dB
out(LIM)
out
out(nom)
Ripple Rejection Ratio (Notes 9 & 14)
RR
−
−
−
75
75
70
−
−
−
I
out
Output Noise Voltage (Notes 12 & 14)
V
n
f = 10 Hz to 100 kHz, V = 2.5 V
mVrms
in
V
= 1.25 V, I = 1.0 mA
18
35
out
out
f = 10 Hz to 100 kHz, V = 2.5 V
in
V
out
= 1.25 V, I = 100 mA
out
ENABLE (NCP5500, NCV5500 Only)
Enable Voltage
V
V
OFF (shutdown) State
ON (enabled) State
0.4
1.0
V
ENoff
ENon
2.0
Enable Pin Bias Current
ADJUST
I
V
EN
= V , I = 1.0 mA
−
−
−
mA
EN
in out
Adjust Pin Current (Note 14)
THERMAL SHUTDOWN
Thermal Shutdown Temperature (Note 14)
I
V
EN
= V , V
= 1.25 V, V = 1.25 V
60
nA
ADJ
in ADJ
out
TSD
I
= 100 mA
150
210
C
out
8. Deviation from nominal. For adjustable versions, Pin ADJ connected to V
9. See Typical Characteristics section for additional information.
.
out
10.V is constrained by the minimum input voltage of 2.5 V.
DO
11. V is set by external resistor divider to 5 V.
out
12.V for other fixed voltage versions, as well as adjustable versions set to other output voltages, can be calculated from the following formula:
n
n
V = V
* V / 1.25, where V
is the typical value from the table above.
n(x)
out
n(x)
13.Performance guaranteed over specified operating conditions by design, guard banded test limits, and/or characterization, production tested
at T = T = 25C. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as
J
A
possible.
14.Values are based on design and/or characterization.
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NCP5500, NCV5500, NCP5501, NCV5501
TYPICAL CHARACTERISTICS
3.45
3.42
5.25
5.20
5.15
5.10
5.05
5.00
4.95
4.90
V
= 13.2 V
V = 13.2 V
in
R = 1 kW
L
in
R = 1 kW
3.39
3.36
3.33
3.30
3.27
3.24
3.21
3.18
3.15
L
4.85
4.80
4.75
V
= 5 V
120
V
= 3.3 V
120
out(nom)
out(nom)
−40
0
40
80
−40
0
40
80
T , AMBIENT TEMPERATURE (C)
A
T , AMBIENT TEMPERATURE (C)
A
Figure 3. Output Voltage vs. Ambient
Temperature
Figure 4. Output Voltage vs. Ambient
Temperature
1.30
1.29
1.28
1.27
1.26
1.25
1.24
1.23
1.22
1.21
1.20
1.58
1.56
1.54
1.52
1.50
1.48
1.46
V
= 13.2 V
V
= 13.2 V
in
in
R = 1 kW
R = 1 kW
L
L
1.44
1.42
V
= 1.25 V (ADJ)
80 120
V
= 1.5 V
120
out(nom)
out(nom)
−40
0
40
80
−40
0
40
T , AMBIENT TEMPERATURE (C)
A
T , AMBIENT TEMPERATURE (C)
A
Figure 5. Output Voltage vs. Ambient
Temperature
Figure 6. Output Voltage vs. Ambient
Temperature
500
450
400
350
300
250
200
150
100
50
500
400
T = 125C
T = 125C
A
A
300
200
T = 25C
A
T = 25C
A
T = −40C
A
T = −40C
A
100
0
V
= 5 V
out(nom)
V
= 3.3 V
500 600
out(nom)
0
0
100
200
300
400
500
600
0
100
200
300
400
I
, OUTPUT CURRENT (mA)
I
out
, OUTPUT CURRENT (mA)
out
Figure 7. Dropout Voltage vs. Output Current
Figure 8. Dropout Voltage vs. Output Current
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NCP5500, NCV5500, NCP5501, NCV5501
TYPICAL CHARACTERISTICS
18
16
14
12
10
8
18
T = −40C
A
16
14
12
10
8
T = −40C
A
T = 25C
A
T = 25C
A
T = 125C
A
T = 125C
A
6
6
4
4
2
2
0
V
= 5 V
600
out(nom)
V
= 1.25 V (ADJ)
out(nom)
0
0
100
200
300
400
500
700
0
100
200
I , OUTPUT CURRENT (mA)
out
300
400
500
600
700
I
, OUTPUT CURRENT (mA)
out
Figure 9. Ground Current vs. Output Current
Figure 10. Ground Current vs. Output Current
6
5
4
3
2
1
0
6
5
4
3
2
V
= 5 V
V
= 3.3 V
out(nom)
out(nom)
R = 1 kW
R = 1 kW
L
L
1
0
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
V , INPUT VOLTAGE (V)
in
V , INPUT VOLTAGE (V)
in
Figure 11. Ground Current vs. Input Voltage
Figure 12. Ground Current vs. Input Voltage
6
5
4
3
2
1
0
6
5
4
3
2
R = 1 kW
R = 1 kW
L
V
= 1.25 V (ADJ)
L
out(nom)
V
= 1.5 V
out(nom)
1
0
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
V , INPUT VOLTAGE (V)
in
V , INPUT VOLTAGE (V)
in
Figure 13. Ground Current vs. Input Voltage
Figure 14. Ground Current vs. Input Voltage
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NCP5500, NCV5500, NCP5501, NCV5501
TYPICAL CHARACTERISTICS
90
80
70
60
50
40
30
20
90
1 mA
80
1 mA
100 mA
70
60
500 mA
500 mA
50
40
100 mA
30
V
= 6 V,
V = 6 V,
in
in
DV = 0.5 V
DV = 0.5 V
in
pp
in pp
20
10
0
10
0
V
= 1.5 V
V
= 1.25 V (ADJ)
10 100
out(nom)
out(nom)
0.01
0.1
1
10
100
0.01
0.1
1
f, FREQUENCY (kHz)
f, FREQUENCY (kHz)
Figure 15. Ripple Rejection vs. Frequency
Figure 16. Ripple Rejection vs. Frequency
12
11
10
9
10
9
8
7
8
6
Unstable Region
Stable Region
7
Unstable Region
Stable Region
6
5
5
4
4
3
3
2
2
C
= 1 mF to 10 mF
out
V
C
= 1 mF to 10 mF
out
1
0
1
= 5 V
out(nom)
V
= 3.3 V
out(nom)
0
0
50 100 150 200 250 300 350 400 450 500
, OUTPUT CURRENT (mA)
0
50 100 150 200 250 300 350 400 450 500
, OUTPUT CURRENT (mA)
I
I
out
out
Figure 17. Output Capacitor ESR Stability vs.
Output Current
Figure 18. Output Capacitor ESR Stability vs.
Output Current
10
9
8
7
6
5
4
3
2
1
0
10
9
8
7
Unstable Region
Unstable Region
6
5
4
3
Stable Region
Stable Region
2
C
= 1 mF to 10 mF
= 1.25 V (ADJ)
out
C
= 1 mF to 10 mF
out
V
V
out(nom)
1
0
= 1.5 V
out(nom)
0
50 100 150 200 250 300 350 400 450 500
, OUTPUT CURRENT (mA)
0
50 100 150 200 250 300 350 400 450 500
I
I
, OUTPUT CURRENT (mA)
out
out
Figure 19. Output Capacitor ESR Stability vs.
Output Current
Figure 20. Output Capacitor ESR Stability vs.
Output Current
NOTE: Typical characteristics were measured with the same conditions as electrical characteristics, unless otherwise noted.
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NCP5500, NCV5500, NCP5501, NCV5501
NCP5500 NCV5500
Output
I
in
I
out
Input
V
out
V
in
C
10 mF
C
in2
100 nF
in
C
out
Enable
R
L
EN
ADJ
I
I
ADJ
EN
GND
I
GND
I
Q
NCP5501 NCV5501
Output
I
in
I
out
Input
V
out
V
in
C
10 mF
C
in2
100 nF
in
C
out
R
L
GND
I
GND
I
Q
Figure 21. Measuring Circuits
Circuit Description
linear regulator: startup delay, load transient response and
loop stability. The capacitor value and type should be based
on cost, availability, size and temperature constraints. Refer
to Typical Operating Characteristics for stability regions.
The NCP5500/NCP5501/NCV5500/NCV5501 are
integrated linear regulators with a DC load current
capability of 500 mA. The output voltage is regulated by a
PNP pass transistor controlled by an error amplifier and
band gap reference. The choice of a PNP pass element
provides the lowest possible dropout voltage, particularly at
reduced load currents. Pass transistor base drive current is
controlled to prevent oversaturation. The regulator is
internally protected by both current limit and thermal
shutdown. Thermal shutdown occurs when the junction
temperature exceeds 150C. The NCV5500 includes an
enable/shutdown pin to turn off the regulator to a low current
drain standby state.
Enable Input (NCP5500, NCV5500)
The enable pin is used to turn the regulator on or off. By
holding the pin at a voltage less than 0.4 V, the output of the
regulator will be turned off to a minimal current drain state.
When the voltage at the Enable pin is greater than 2.0 V, the
output of the regulator will be enabled and rise to the
regulated output voltage. The Enable pin may be connected
directly to the input pin to provide a constant enable to the
regulator.
Active Load Protection in Shutdown (NCP5500,
NCV5500)
Regulator
The error amplifier compares the reference voltage to a
When a linear regulator is disabled (shutdown), the output
(load) voltage should be zero. However, stray PC board
leakage paths, output capacitor dielectric absorption, and
inductively coupled power sources can cause an undesirable
regulator output voltage if load current is low or zero. The
NCV5500 features a load protection network that is active
only during Shutdown mode. This network switches in a
sample of the output voltage (V ) and drives the base of a
out
PNP series pass transistor via a buffer. The reference is a
bandgap design for enhanced temperature stability.
Saturation control of the PNP pass transistor is a function of
the load current and input voltage. Oversaturation of the
output power device is prevented, and quiescent current in
the ground pin is minimized.
shunt current path (~500 mA) from V to Ground. This
out
Regulator Stability Considerations
feature also provides a controlled (“soft”) discharge path for
the output capacitor after a transition from Enable to
Shutdown.
The input capacitor is necessary to stabilize the input
impedance to reduce transient line influences. The output
capacitor helps determine three main characteristics of a
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NCP5500, NCV5500, NCP5501, NCV5501
Calculating Resistors for the ADJ Versions
The adjustable version uses feedback resistors to adjust
Ripple Rejection: The ratio of the peak−to−peak input ripple
voltage to the peak−to−peak output ripple voltage.
the output to the desired output voltage. With V connected
out
Current Limit: Peak current that can be delivered to the
output.
to ADJ, the adjustable version will regulate at 1.25 V
ꢀ4.9% (1250 ꢀ 61.25 mV).
Output voltage formula with an external resistor divider:
Calculating Power Dissipation
The maximum power dissipation for a single output
regulator (Figure 21) is:
(R @ R
(R ) R )
1
1
2
2)
(eq. 1)
@ ǒ Ǔ
V
+
1.25 V *
ƪ
60E−9 @
ƫ
ǒ
Ǔ
out
(R ) R )
R
2
ƪ
ƫI
P
D(max) + Vin(max) * Vout(min) out(max) ) Vin(max)IGND
1
2
Where
Where
R = value of the divider resistor connected between V
1
out
V
is the maximum input voltage,
is the minimum output voltage,
in(max)
and ADJ,
V
out(min)
R = value of the divider resistor connected between ADJ
2
I
I
is the maximum output current for the application,
out(max)
and GND,
is the ground current at I
.
GND
out(max)
The term “1.25 V” has a tolerance of ꢀ4.9%; the term
“60E−9” can vary in the range 15E−9 to 60E−9.
Once the value of P
is known, the maximum
D(max)
permissible value of R
can be calculated:
qJA
For values of R less than 15 KW, the term within brackets
2
ǒ
Ǔ
150 C * TA
( [ ] ) will evaluate to less than 1 mV and can be ignored. This
simplifies the output voltage formula to:
(eq. 2)
RqJA
+
PD
V
= 1.25 V * ((R1 + R2) / R2)) with a tolerance of ꢀ4.9%,
out
The value of R
can then be compared with those in the
qJA
which is the tolerance of the 1.25 V output when delivering
up to 500 mA of output current.
Thermal Characteristics table. Those packages with R
less than the calculated value in Equation 2 will keep the die
temperature below 150C.
qJA
DEFINITION OF TERMS
In some cases, none of the packages will be sufficient to
dissipate the heat generated by the IC, and an external heat
sink will be required.
Dropout Voltage: The input−to−output voltage differential
at which the circuit ceases to regulate against further
reduction input voltage. Measured when the output voltage
has dropped 2% relative to the value measured at nominal
input voltage. Dropout voltage is dependent upon load
current and junction temperature.
Heat Sinks
A heat sink effectively increases the surface area of the
package to improve the flow of heat away from the IC and
into the surrounding air.
Input Voltage: The DC voltage applied to the input
terminals with respect to ground.
Each material in the heat flow path between the IC and the
outside environment will have a thermal resistance. Like
series electrical resistances, these resistances are summed to
Line Regulation: The change in output voltage for a change
in the input voltage. The measurement is made under
conditions of low dissipation or by using pulse techniques
such that the average chip temperature is not significantly
affected.
determine the value of R
:
qJA
R
qJA + RqJC ) RqCS ) RqSA
(eq. 3)
where
Load Regulation: The change in output voltage for a change
in load current at constant chip temperature. Pulse loading
techniques are employed such that the average chip
temperature is not significantly affected.
R
qJC
R
qCS
R
qSA
is the junction−to−case thermal resistance,
is the case−to−heatsink thermal resistance,
is the heatsink−to−ambient thermal resistance.
R
qJC
appears in the Thermal Characteristics table. Like
Quiescent and Ground Current: The quiescent current is
the current which flows through the ground when the LDO
operates without a load on its output: internal IC operation,
bias, etc. When the LDO becomes loaded, this term is called
the Ground current. It is actually the difference between the
input current (measured through the LDO input pin) and the
output current.
R
, it too is a function of package type. R
and R
are
qJA
qCS
qSA
functions of the package type, heat sink and the interface
between them. These values appear in data sheets of heat
sink manufacturers.
Thermal, mounting, and heat sink considerations are
further discussed in ON Semiconductor Application Note
AN1040/D.
http://onsemi.com
9
NCP5500, NCV5500, NCP5501, NCV5501
ORDERING INFORMATION
Package
Marking
†
Device
Nominal Output Voltage*
Package
Shipping
NCP5500DT15RKG
P5500LG
DPAK 5
2500 / Tape & Reel
2500 / Tape & Reel
2500 / Tape & Reel
2500 / Tape & Reel
75 Units / Rail
(Pb−Free)
NCV5500DT15RKG**
NCP5501DT15RKG
NCV5501DT15RKG**
NCP5501DT15G
V5500LG
P5501LG
V5501LG
P5501LG
V5501LG
P5500TG
V5500TG
P5501TG
V5501TG
P5501TG
V5501TG
P5500UG
V5500UG
P5501UG
V5501UG
P5501UG
V5501UG
P5500WG
V5500WG
5500B
DPAK 5
(Pb−Free)
DPAK 3
(Pb−Free)
1.5
DPAK 3
(Pb−Free)
DPAK 3
(Pb−Free)
NCV5501DT15G**
NCP5500DT33RKG
NCV5500DT33RKG**
NCP5501DT33RKG
NCV5501DT33RKG**
NCP5501DT33G
DPAK 3
(Pb−Free)
75 Units / Rail
DPAK 5
(Pb−Free)
2500 / Tape & Reel
2500 / Tape & Reel
2500 / Tape & Reel
2500 / Tape & Reel
75 Units / Rail
DPAK 5
(Pb−Free)
DPAK 3
(Pb−Free)
3.3
DPAK 3
(Pb−Free)
DPAK 3
(Pb−Free)
NCV5501DT33G**
NCP5500DT50RKG
NCV5500DT50RKG**
NCP5501DT50RKG
NCV5501DT50RKG**
NCP5501DT50G
DPAK 3
(Pb−Free)
75 Units / Rail
DPAK 5
(Pb−Free)
2500 / Tape & Reel
2500 / Tape & Reel
2500 / Tape & Reel
2500 / Tape & Reel
75 Units / Rail
DPAK 5
(Pb−Free)
DPAK 3
(Pb−Free)
5.0
DPAK 3
(Pb−Free)
DPAK 3
(Pb−Free)
NCV5501DT50G**
NCP5500DTADJRKG
NCV5500DTADJRKG**
NCP5500DADJR2G
NCV5500DADJR2G**
DPAK 3
(Pb−Free)
75 Units / Rail
DPAK 5
(Pb−Free)
2500 / Tape & Reel
2500 / Tape & Reel
2500 / Tape & Reel
2500 / Tape & Reel
Adjustable
DPAK 5
(Pb−Free)
SO−8
(Pb−Free)
Adjustable
Adjustable
5500A
SO−8
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*Contact ON Semiconductor for other fixed voltages.
**NCV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP
Capable
http://onsemi.com
10
NCP5500, NCV5500, NCP5501, NCV5501
PACKAGE DIMENSIONS
DPAK 3 (SINGLE GAUGE)
CASE 369C
ISSUE D
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
C
A
D
2. CONTROLLING DIMENSION: INCHES.
3. THERMAL PAD CONTOUR OPTIONAL WITHIN DI-
MENSIONS b3, L3 and Z.
A
E
c2
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR BURRS. MOLD
FLASH, PROTRUSIONS, OR GATE BURRS SHALL
NOT EXCEED 0.006 INCHES PER SIDE.
5. DIMENSIONS D AND E ARE DETERMINED AT THE
OUTERMOST EXTREMES OF THE PLASTIC BODY.
6. DATUMS A AND B ARE DETERMINED AT DATUM
PLANE H.
b3
B
4
2
L3
L4
Z
H
DETAIL A
1
3
INCHES
DIM MIN MAX
0.086 0.094
A1 0.000 0.005
0.025 0.035
MILLIMETERS
MIN
2.18
0.00
0.63
0.76
4.57
0.46
0.46
5.97
6.35
MAX
2.38
0.13
0.89
1.14
5.46
0.61
0.61
6.22
6.73
A
b2
c
b
b
b2 0.030 0.045
b3 0.180 0.215
M
0.005 (0.13)
C
H
e
c
0.018 0.024
c2 0.018 0.024
GAUGE
PLANE
SEATING
PLANE
L2
C
D
E
e
0.235 0.245
0.250 0.265
0.090 BSC
2.29 BSC
9.40 10.41
1.40 1.78
2.74 REF
0.51 BSC
0.89 1.27
H
L
L1
0.370 0.410
0.055 0.070
0.108 REF
L
A1
L1
L2
0.020 BSC
DETAIL A
L3 0.035 0.050
ROTATED 905 CW
L4
Z
−−− 0.040
0.155 −−−
−−−
3.93
1.01
−−−
SOLDERING FOOTPRINT*
6.20
3.00
0.244
0.118
2.58
0.102
5.80
1.60
0.063
6.17
0.228
0.243
mm
inches
ǒ
Ǔ
SCALE 3:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
11
NCP5500, NCV5500, NCP5501, NCV5501
PACKAGE DIMENSIONS
DPAK 5, CENTER LEAD CROP
CASE 175AA
ISSUE A
NOTES:
1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
SEATING
PLANE
−T−
C
B
R
INCHES
DIM MIN MAX
MILLIMETERS
MIN
5.97
6.35
2.19
0.51
0.46
0.61
MAX
6.22
6.73
2.38
0.71
0.58
0.81
E
V
A
B
C
D
E
F
G
H
J
0.235 0.245
0.250 0.265
0.086 0.094
0.020 0.028
0.018 0.023
0.024 0.032
0.180 BSC
0.034 0.040
0.018 0.023
0.102 0.114
0.045 BSC
R1
Z
A
K
S
4.56 BSC
1 2 3 4
5
0.87
0.46
2.60
1.01
0.58
2.89
U
K
L
1.14 BSC
R
0.170 0.190
4.32
4.70
0.63
0.51
0.89
3.93
4.83
5.33
1.01
−−−
1.27
4.32
F
R1 0.185 0.210
J
S
U
V
Z
0.025 0.040
0.020 −−−
0.035 0.050
0.155 0.170
L
H
D 5 PL
M
G
0.13 (0.005)
T
SOLDERING FOOTPRINT*
6.4
0.252
2.2
0.086
0.34
0.013
5.8
0.228
5.36
0.217
10.6
0.417
0.8
0.031
mm
inches
ǒ
Ǔ
SCALE 4:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
12
NCP5500, NCV5500, NCP5501, NCV5501
PACKAGE DIMENSIONS
SOIC−8 NB
CASE 751−07
ISSUE AK
NOTES:
1. DIMENSIONING AND TOLERANCING PER
−X−
ANSI Y14.5M, 1982.
A
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
8
5
4
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. 751−01 THRU 751−06 ARE OBSOLETE. NEW
STANDARD IS 751−07.
S
M
M
B
0.25 (0.010)
Y
1
K
−Y−
MILLIMETERS
DIM MIN MAX
INCHES
G
MIN
MAX
0.197
0.157
0.069
0.020
A
B
C
D
G
H
J
K
M
N
S
4.80
3.80
1.35
0.33
5.00 0.189
4.00 0.150
1.75 0.053
0.51 0.013
C
N X 45
_
SEATING
PLANE
1.27 BSC
0.050 BSC
−Z−
0.10
0.19
0.40
0
0.25 0.004
0.25 0.007
1.27 0.016
0.010
0.010
0.050
8
0.020
0.244
0.10 (0.004)
M
J
H
D
8
0
_
_
_
_
0.25
5.80
0.50 0.010
6.20 0.228
M
S
S
X
0.25 (0.010)
Z
Y
SOLDERING FOOTPRINT*
1.52
0.060
7.0
4.0
0.275
0.155
0.6
0.024
1.270
0.050
mm
inches
ǒ
Ǔ
SCALE 6:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks,
copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC
reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any
particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without
limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications
and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC
does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for
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NCP5500/D
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