NCP5608 [ONSEMI]

Multiple LED Charge Pump Driver; 多个LED电荷泵驱动器
NCP5608
型号: NCP5608
厂家: ONSEMI    ONSEMI
描述:

Multiple LED Charge Pump Driver
多个LED电荷泵驱动器

驱动器 泵
文件: 总16页 (文件大小:191K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
NCP5608  
Multiple LED Charge Pump  
Driver  
The NCP5608 is a high efficiency boost converter operating in  
current loop, based on a charge pump multi mode, to drive White  
LED. The current mode regulation allows a uniform and  
programmable brightness of the LEDs. The chip has been optimized  
for small ceramic capacitors, capable to supply up to 2.0 W output  
power.  
http://onsemi.com  
MARKING  
DIAGRAM  
Features  
24  
1
2.7 to 5.5 V Input Voltage Range  
Up to 500 mA Output Current  
NCP  
5608  
ALYW  
G
24 PIN TQFN (4x4)  
MT SUFFIX  
CASE 511AA  
Capable to Drive 8 LED  
Multi Mode Charge Pump Based Converter  
I2C Serial Link Protocol  
A
L
Y
W
G
= Assembly Location  
= Wafer Lot  
= Year  
= Work Week  
Consistent High Efficiency  
Independently Block Programmable Output Currents  
= Pb−Free Package  
Programmable 3 or 4 Operating Backlight LED at Zero Extra  
Losses  
Constant Output Current Regulation  
Built−in Dimming Function  
PIN CONNECTIONS  
Tight Automatic LED Current Matching  
Thermal Shutdown Protection  
Low Battery Return Noise  
24 23 22 21 20 19  
1
2
18  
17  
AGND  
V
OUT  
This is a Pb−Free Device*  
IREFFL  
C1P  
Typical Applications  
IREFBK 3  
16 C1N  
LED Display Back Light Control  
Keyboard Back Light  
High Power Photo Flash  
Multiple Displays  
4
5
6
15  
14  
13  
SDA  
SCL  
LED8  
LED7  
PGND  
CCMP  
7
8
9
10 11 12  
ORDERING INFORMATION  
Device  
NCP5608MTR2G  
Package  
Shipping  
TQFN24 4000 / Tape & Reel  
(Pb−Free)  
†For information on tape and reel specifications,  
including part orientation and tape sizes, please  
refer to our Tape and Reel Packaging Specification  
Brochure, BRD8011/D.  
*For additional information on our Pb−Free strategy and soldering details, please  
downloadthe ON Semiconductor Soldering and Mounting Techniques Reference  
Manual, SOLDERRM/D.  
©
Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
June, 2006 − Rev. 1  
NCP5608/D  
NCP5608  
Vbat  
+V  
CC  
C3  
C6  
GND  
1 mF/16 V  
4.7 mF/16 V  
C5  
21  
TP2  
VOUT  
C2P  
GND  
U1  
NCP5608  
4.7 mF/16 V  
C4  
24  
19  
AVbat  
PVbat  
GND  
20  
17  
C2N  
C1P  
4.7 mF/16 V  
VOUT  
18  
VOUT  
D1  
D3  
D5  
D7  
16  
6
7
8
LED1  
LED2  
LED3  
LED1  
LED2  
CIN  
R1  
5.6 k  
R2  
5.6 k  
LWY87S  
LWY87S  
LWG6SG  
D2  
MCU  
CCMP  
SCL  
LWY87S  
5
4
3
2
9
10  
11  
12  
14  
LED3  
LED4  
LED5  
LED6  
D4  
D6  
LED4  
LED5  
LED6  
LED7  
SDA  
LWY87S  
IREFBK  
IREFFL  
IREFBK  
IREFFL  
GND  
LWG6SG  
LWG6SG  
1
R3  
R4  
7.5 k  
AGND  
PGND  
LED7  
LED8  
7.5 k  
LWG6SG D8  
13  
15  
LED8  
Z1  
GND  
GND  
Figure 1. Typical Application  
http://onsemi.com  
2
NCP5608  
C1  
C2  
C3  
16  
17  
20  
21  
22  
23  
CHARGE PUMP  
CONVERTER  
PVbat  
19  
18  
VOUT  
Vbat  
30 mA  
30 mA  
30 mA  
30 mA  
7
8
LED1  
LED2  
24  
3
AVbat  
IREFBK  
IREFFL  
BKL−A  
BKL−A  
ANALOG  
CONTROL  
2
PWFL−A  
1
AGND  
GND  
Vbat  
9
10
LED3  
LED4  
BKL  
6
5
CCMP  
SCL  
DIGITAL CONTROL  
Vbat  
4
SDA  
100 mA  
100 mA  
100 mA  
100 mA  
11
12
LED5  
LED6  
PWFL  
PWFL−A  
Vbat  
THERMAL SHUTDOWN  
17
15
13  
LED7  
LED8  
PGND  
GND  
Figure 2. NCP5608 Block Diagram  
http://onsemi.com  
3
NCP5608  
PIN FUNCTION DESCRIPTION  
Pin  
Symbol  
Type  
Description  
1
AGND  
GROUND  
This pin is the NCP5608 analog ground and shall be connected to the system ground. Care  
must be observed to minimize the total parasitic inductance between the pin and the ground  
plane.  
2
3
4
IREFFL  
IREFBK  
SDA  
OUTPUT, ANALOG This pin is used to set up the current reference for the FLASH output currents (LED5 to  
LED8). The reference current is derived from the internal bandgap voltage to ground by  
means of an external resistor. (Note 1)  
OUTPUT, ANALOG This pin is used to set up the current reference for the BACK LIGHT output currents (LED1  
to LED4). The reference current is derived from the internal bandgap voltage to ground by  
means of an external resistor. (Note 1)  
INPUT, DIGITAL  
This pin, associated with the SCL signal, carries the DATA signal to set up the selected  
output LED current.  
The DATA signal is built with a single SDA line to support the I2C protocol.  
5
6
SCL  
INPUT, DIGITAL  
ANALOG, INPUT  
This is the clock signal associated with the SDA pins. The pin carries the standard CLOCK  
signal to operate the I2C protocol.  
CCMP  
This pin is connected to the internal I2C bias network and must be either left open, or  
bypassed to ground by a 10 nF ceramic capacitor when the I2C voltage drops below 1.8 V.  
Such a capacitor compensate the voltage drop during normal operation, keeping in mind it is  
not mandatory when the I2C voltage is 1.8 V and above.  
7
8
LED1  
LED2  
LED3  
LED4  
INPUT, POWER  
INPUT, POWER  
INPUT, POWER  
INPUT, POWER  
This pin sinks to ground the current flowing into the first LED, and is intended to be used in  
backlight application. The current is limited to 30 mA max. (Note 2)  
This pin sinks to ground the current flowing into the second LED, and is intended to be used  
in backlight application. The current is limited to 30 mA max. (Note 2)  
9
This pin sinks to ground the current flowing into the third LED, and is intended to be used in  
backlight application. The current is limited to 30 mA max. (Note 2)  
10  
This pin sinks to ground the current flowing into the fourth LED, and is intended to be used  
in backlight application. The current is limited to 30 mA max. (Note 2)  
On the other hand, LED4 can be disconnected when only three LEDs are used in the  
backlight application. (Table 1)  
11  
12  
13  
LED5  
LED6  
INPUT, POWER  
INPUT, POWER  
POWER  
This pin sinks to ground the current flowing into the fifth LED (100 mA max), and is intended  
to be used in Flash application. (Note 2)  
This pin sinks to ground the current flowing into the sixth LED (100 mA max), and is  
intended to be used in Flash or high power application. (Note 2)  
PWRGND  
This pin provides the ground reference for the power elements and must be connected to  
the system ground by a heavy track. Using the ground plane technique is strongly  
recommended. Care must be observed to minimize the total parasitic inductance between  
the pin and the ground plane.  
14  
15  
LED7  
LED8  
INPUT, POWER  
INPUT, POWER  
This pin sinks to ground the current flowing into the seventh LED (100 mA max), and is  
intended to be used in flash or high power application. (Note 2)  
This pin sinks to ground the current flowing into the eighth LED (100 mA max), and is  
intended to be used in flash or high power application. (Note 2)  
16  
17  
18  
C1N  
C1P  
POWER  
POWER  
This pin is the second side of the C1 fly capacitor.  
This pin is the first side of the C1 fly capacitor.  
VOUT  
OUTPUT, POWER  
This pin provides the output power to the external LED. Since the regulation is based on a  
current loop, the voltage will varies as the output current varies in the application. The Vout  
pin must be bypassed to GND by a 4.7 mF ceramic capacitor. (Note 3)  
19  
PVBAT  
INPUT, POWER  
This pin provides the supply voltage to the charge pump converter. The pin must be  
connected to the AVbat supply source and bypassed to GND by a 10 mF/16 V ceramic  
capacitor. (Note 3) Using a power plane is recommended.  
20  
21  
22  
23  
24  
C2N  
C2P  
POWER  
POWER  
This pin is the second side of the C2 fly capacitor.  
This pin is the first side of the C2 fly capacitor.  
This pin is the second side of the C3 fly capacitor.  
This pin is the first side of the C3 fly capacitor.  
C3P  
POWER  
C3N  
AVbat  
POWER  
INPUT, POWER  
This pin provides the supply voltage to the analog and digitals blocks. The pin must be  
connected to the PVbat supply source and bypassed to GND by a 1 mF/16 V ceramic  
capacitor. (Note 3) Using a power plane is recommended.  
1. To achieve a good accuracy of the LED current, 1% tolerance resistor, with 100 ppm stability, or better, shall be used. The reference current  
is internally mirrored and sized according to the programmed value for a given external LED.  
2. Total DC−DC output current is limited to 500 mA.  
3. Ceramic X7R, ESR < 50 mW ESL < 0.5 nH, SMD types capacitors are mandatory to achieve the Iout specifications. On the other hand, care  
must be observed to take into account the DC bias impact on the capacitance value; see ceramic capacitor manufacturer data sheets.  
http://onsemi.com  
4
 
NCP5608  
MAXIMUM RATINGS  
Rating  
Symbol  
Value  
Unit  
Power Supply  
V
bat  
7.0  
V
Digital Input Voltage  
Digital Input Current  
SDA, SCL  
−0.3 v V v V  
+ 0.3  
V
in  
BAT  
1.0  
mA  
ESD Capability (Note 4)  
Human Body Model (HBM)  
Machine Model (MM)  
V
ESD  
2.0  
200  
kV  
V
QFN24 Package  
Power Dissipation @ T = +85°C (Note 5)  
Thermal Resistance, Junction−to−Air (according to JEDEC/EIA JESD51−12)  
P
250  
160  
mW  
°C/W  
A
D
JA  
R
q
Operating Ambient Temperature Range  
T
−40 to +85  
−40 to +125  
+150  
°C  
°C  
°C  
°C  
mA  
A
Operating Junction Temperature Range  
T
J
Maximum Junction Temperature  
T
Jmax  
Storage Temperature Range  
T
stg  
−65 to +150  
"100  
Latchup Current Maximum Rating (per JEDEC standard: JESD78) Class II  
Moisture Sensitivity Level (Note 6)  
MSL  
1
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the  
RecommendedOperating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect  
device reliability.  
4. This device series contains ESD protection and exceeds the following tests:  
Human Body Model (HBM): JESD22−A114.  
Machine Model (MM): JESD22−A115.  
5. The maximum package power dissipation limit must not be exceeded.  
6. Moisture Sensitivity Level (MSL): per IPC/JEDEC standard: J−STD−020A.  
http://onsemi.com  
5
 
NCP5608  
POWER SUPPLY SECTION (Typical values are referenced to T = +25°C, Min & Max values are referenced −40°C to +85°C ambient  
A
temperature, unless otherwise noted.)  
Pin  
Symbol  
Rating  
Min  
Typ  
Max  
Unit  
19, 24  
PV  
AV  
Power Supply  
2.7  
5.5  
V
bat,  
bat  
18  
18  
18  
24  
19  
I
Continuous DC Current in the Load @ V = 8xLED, V = 3.4 V  
500  
60  
mA  
mA  
V
out  
out  
bat  
Isch  
Vout  
Continuous Output Short Circuit Current  
Output Voltage Compliance (OVP)  
120  
5.5  
5.0  
4.8  
I
Standby Current, @ I = 0 mA, @ 2.7 V < Vbat < 4.2 V  
mA  
mA  
stdb  
out  
I
Operating Current, @ I > 0 mA  
out  
op  
PV = 3.6 V  
0.5  
0.8  
bat  
PV = 4.2 V  
bat  
Fpwr  
Charge Pump Operating Frequency (Any C  
Output LED to LED Current Matching,  
Capacitor Pins)  
2.0  
1.3  
2.0  
MHz  
%
FLY  
7, 8, 9, 10  
7, 8, 9, 10  
I
MAT  
@ V = 3.6 V, I  
= 20 mA, LED1 to LED4 are Identical  
"0.5  
"2.0  
"0.5  
"2.0  
bat  
LED  
I
Output Current Tolerance, LED1 to LED4  
@ V = 3.6 V, I = 20 mA  
%
%
%
ms  
TOL  
MAT  
bat  
LED  
11, 12, 14,  
15  
I
Output LED to LED Current Matching,  
@ V = 3.6 V, I = 80 mA, LED5 to LED8 are Identical  
2.0  
2.0  
bat  
LED  
11, 12, 14,  
15  
I
Output Current Tolerance, LED5 to LED8  
@ V = 3.6 V, I = 80 mA  
TOL  
bat  
LED  
18  
t
DC−DC Start Time (C = 4.7 mF )  
start  
out  
− from Vbat Operating to Full Load Operation  
150  
160  
30  
T
Thermal Shutdown Protection  
°C  
°C  
SD  
T
SDH  
Thermal Shutdown Protection Hysteresis  
ANALOG SECTION (Typical values are referenced to T = +25°C, Min & Max values are referenced −25°C to +85°C ambient  
A
temperature, unless otherwise noted.)  
Pin  
3
Symbol  
Rating  
Min  
1.0  
Typ  
Max  
100  
Unit  
mA  
I
Backlight Reference Current @ Vref = 600 mV (Notes 7, 8)  
REFBK  
3
Reference Current (I  
) to Backlight Ratio  
40  
REF  
2
I
Flash Reference Current @ Vref = 600 mV (Notes 7, 8)  
Reference Current (I ) to Flash Ratio  
1.0  
100  
mA  
REFFL  
2
40  
REF  
4, 5  
C
in  
Input Capacitance (Parameter not tested, guaranteed by design)  
10  
pF  
7. The overall output current tolerance depends upon the accuracy of the external resistor. Using 1% or better resistor is recommended.  
8. The external circuit must not force the I pin voltage either higher or lower than the 600 mV specified.  
REF  
DIGITAL PARAMETERS SECTION @ 2.70 V v V v 5.5 V (T = −25°C to +85°C unless otherwise noted.)  
CC  
A
Note: Digital inputs undershoot v −0.30 V to ground. Digital inputs overshoot v 0.30 V to V  
.
CC  
Pin  
5
Symbol  
Rating  
Min  
Typ  
Max  
400  
Unit  
kHz  
V
F
CLK  
Input I2C Clock, Duty Cycle = 50%  
4, 5  
4, 5  
V
IH  
Positive−Going Input High Voltage Threshold (SDA, SCL)  
Negative−Going Input High Voltage Threshold (SDA, SCL)  
0.7   V  
V
cc  
+ 0.5 V  
0.4  
CC  
V
IL  
0
V
9. The V Bias pins can be either left open, or biased by the same voltage as the external MCU power supply source. An external 10 nF capacitor  
CC  
might be necessary to improve the I2C function when operating with SDA and SCL signal amplitude below 1.8 V.  
10.Expernal pullup resistors shall be connected to properly bias the SDA and SCL logic levels according to the I2C specifications.  
http://onsemi.com  
6
 
NCP5608  
APPLICATIONS INFORMATION  
DC−DC OPERATION  
5.0 V. The converter resumes normal operation when the  
voltage drops below 5.0 V (no latch−up mechanism).  
Consequently, the chip can operate with no load during any  
test procedures, but in the case of special applications, it is  
recommended to connect the unused LED driver either to  
The converter is based on a charge pump technique to  
generate a DC voltage capable to supply the white LED  
load. The system regulates the current flowing into each  
LED by means of internal current mirrors associated with  
the white diodes. Consequently, the output voltage will be  
equal to the Vf of the LED, plus the 300 mV (typical)  
developed across the internal NMOS mirror. Typically,  
assuming a standard white LED forward biased at 10 mA,  
the output voltage will be 3.2 V.  
The third external capacitor makes possible the 1.33X  
extra mode of operation, with a significant efficiency  
improvement of the converter over the normal battery  
voltage span. The threshold levels have been defined to  
optimize this range of operating voltages, assuming a high  
efficiency is not relevant when the system is connected to  
a battery charger (i.e. Vbat > 4.5 V).  
the V  
supply to avoid any uncontrolled operation.  
OUT  
The structure is built with power MOS devices to  
accommodate the modes selected by the analog functions.  
The current flowing into each LED is continuously  
regulated according to the value defined by the  
programming message. The total current is limited to  
500 mA DC.  
The system runs with two cycles:  
− Cycle#1  
Fly capacitors are charged from the battery.  
− Cycle#2  
Energy accumulated into the fly capacitors is  
transferred to the load.  
The built−in OVP circuit continuously monitors each  
output and stops the converter when the voltage is above  
Li−Ion  
2.90 V − 4.10 V  
PIN 19  
GND  
Q1  
Q3  
Q6  
Q7  
Q10  
C3N  
Q11  
C1N  
C1 C1P  
Q5  
C2N  
C2 C2P  
PIN 21  
Q9  
C3 C3P  
PIN 16  
PIN 17  
PIN 20  
PIN 23  
PIN 22  
Q2  
Q4  
Q8  
Q12  
V
OUT  
PIN 18  
CURRENT CONTROL  
LEDx  
GND  
PWRGND  
PIN 13  
GND  
Figure 3. Basic DC−DC NCP5608 Converter Structure  
http://onsemi.com  
7
NCP5608  
LOAD CURRENT CALCULATION  
The load current is derived from the 600 mV reference  
voltage provided by the internal band gap associated to the  
Vbat  
V
OUT  
PIN 18  
external resistor connected across the I  
and I  
REFFL  
REFBK  
pins and GND (see Figure 4). In any case, no voltage shall  
be forced at I or I pins, either downward or  
REFBK  
REFFL  
upward. The backlight block, LED1 − LED4, is powered by  
the current reference defined at the I pin. The output  
REFBK  
LEDx  
current can be dimmed by means of a dynamic modulation  
of the I pin.  
+
600 mV  
REFBK  
The I  
reference current is multiplied by the  
REFBK  
PWRGND  
PIN 13  
constant ka to yield the output backlight LED load current.  
Since the reference voltage is based on a temperature  
compensated bandgap, a tight tolerance resistor will  
provide a very accurate load current.  
The ka parameter is derived from the constant 40  
multiplied by the binary defined in the PWRLED_BK  
register. Consequently, ka varies from 40 (1.0 mA  
output/LED) to 1200 to support the full output current  
range. The resistor is calculated from the Ohm’s law  
ANALOG  
CONTROL  
PIN 3  
I
REFBK  
R1  
GND  
Figure 4. Typical Backlight  
Reference Current Operation  
(Similar Circuit Applies for Power Flash Section)  
GND  
(R = Vref/I ) and a more practical equation can be  
arranged to define the resistor value for a given output  
current:  
REF  
Note: Due to relative high impedance connected at the  
reference current pins, cares must be observed to minimize  
the noise pick−up and stray current present at PCB level.  
Multi layer layout, with dedicated ground screen, is  
mandatory.  
Let Iout = 4*I  
, then:  
LED  
R
+ (Vref * ka * 30)ńI  
BK  
BK  
BK  
out  
(eq. 1)  
R
R
+ (0.6 * 1200)ńI  
out  
+ 720ńI  
out  
SERIAL LINK I2C PROTOCOL  
Consequently, the resistor value will range between  
The chip is remotely controlled by means of a byte  
transferred along a serial link between the MCU and the  
NCP5608. The industrial standard I2C protocol is used,  
although one can drive the SCL and SDA signal from  
standard MCU I/O pins . Two dedicated internal registers  
are used to decode the SDA content and to store the output  
currents.  
R
R
= 720/(30 mA*4) = 6000 W and  
= 720/(0.5 mA*4) = 360 kW for the low power block.  
BK  
BK  
Similarly, the PowerFlash block, LED5−LED8, is  
powered by the current reference defined at the I  
pin. The same calculation as before applies, assuming  
kb = 40, the maximum output current being 100 mA/LED:  
REFFL  
Let Iout = 4*I , then:  
LED  
The I2C message carries three bytes within the same  
frame:  
R
+ (Vref * kb * 100)ńI  
FL  
FL  
FL  
out  
(eq. 2)  
R
R
+ (0.6 * 4000)ńI  
out  
Byte #1:  
+ 2400ńI  
out  
The content of this byte is the physical address  
of the NCP5608 in the I2C bus.  
Finally, the resistor value will range between  
= 2400/(100 mA*4) = 6000 W and  
= 2400/(1 mA*4) = 600 kW for the High Power Flash  
block.  
On the other hand, the output currents can be dimmed by  
means of a dynamic modulation of their respective  
/I pins current references. Obviously, the  
tolerance of such resistors must be 1% or better, with a  
100 ppm thermal coefficient, to get the expected overall  
tolerance.  
R
R
FL  
Byte #2:  
FL  
The content of this byte contains the address  
of the selected block.  
Byte #3:  
I
This byte contains the output current value to  
set up the selected block.  
REFBK REFFL  
http://onsemi.com  
8
 
NCP5608  
In order to improve the efficiency of the back light block  
when three LED only are used, one can disconnect the  
fourth LED by setting B6 = Low simultaneously with the  
third byte (see Table 1).  
Table 1. Programming Table  
Byte  
B7  
0
B6  
1
B5  
1
B4  
1
B3  
0
B2  
0
B1  
1
B0  
0
Comments  
This is the I2C address  
Byte #1  
Byte #2  
Byte #2  
Byte #3  
0
0
0
0
0
0
0
1
$01 = Select the Back Light internal register  
$02 = Select the Power Flash internal register  
0
0
0
0
0
0
1
0
1
0
0
X
X
X
X
X
Assuming Byte #2 = $01, then:  
Bits[0..4] = Back Light output current  
Bit[5..6] = shall be Low  
Bit[7]  
= control the fourth LED in the Back Light Block:  
th  
B7 = 0 ³ LED 4 disconnect  
th  
B7 = 1³ LED 4 connected  
Byte #3  
0
X
X
X
X
X
X
X
Assuming Byte #2 = $02, then:  
Bits[0..6] = Power Flash output current  
Bit[7] = shall be Low  
LED CURRENT CONTROL REGISTERS  
The eight LED are split in two blocks:  
Back Light Block:  
Flash or High Power Block:  
LED1 to LED4, current limited to 30 mA per  
LED  
LED5 to LED8, current limited to 100 mA per  
LED  
The programmed value of a given bank of LED is memorized into the appropriate registers. There is one register for each  
set of LED:  
PWRLED_BK[0..4]  
Stores the Back Light output current.  
PWRLED_FL[0..6]  
Stores the Power Flash output current.  
The total output current is limited to 500 mA, whatever be the configuration.  
Table 2. Internal LED Current Control Register  
Internal LEDs registers  
Bit  
Unit  
B7  
B6  
B5  
B4  
B3  
B2  
B1  
B0  
BLED4  
(Note 12)  
RFU  
(Note 11)  
RFU  
(Note 11)  
16  
8.0  
4.0  
2.0  
1.0  
mA  
mA  
PWRLED_BK[7..0]  
PWRLED_FL[7..0]  
RFU  
(Note 11)  
64  
32  
16  
8.0  
4.0  
2.0  
1.0  
11. Reserved for future use.  
12.Activates/deactivates LED4.  
http://onsemi.com  
9
 
NCP5608  
OUTPUT LED PROGRAMMING SEQUENCE  
2. Calculate the reference current (Irefbk and Ireffl ):  
Irefbk = ILED−BK/1200 and  
Ireffl = ILED−FL/4000  
3. Calculate the external resistor value  
RBK = 0.6/Irefbk  
Once the maximum output current has been set up by the  
external resistor (see Load Current Calculation paragraph  
above), the I2C protocol can be used to dynamically adjust  
the brightness of the selected block.  
At this point, the dimming of each block depends upon  
the content of the appropriate register (PWRLD_BK[4..0]  
or PWRLED_FL[6..0]). The LED current can be  
calculated according to the digital value stored into the  
registers.  
RFL = 0.6/Ireffl  
4. The dimming of flash and backlight LED will be  
now achieved by changing the PWRLD_BK[4..0]  
and PWRLED_FL[6..0] registers content to get the  
operating LED current along the curves 0 mA to  
ILED−BK−MAX mA and 0 mA to ILED−FL mA:  
BK−NSteps = number of steps stored into the  
PWRLD_BK register (value, in decimal, of the  
PWRLD_BK[4..0] register)  
The LED can be programmed in four steps:  
1. Define the maximum ILEDBK−MAX and  
ILEDFL−MAX currents requested by the Back  
Light and Flash applications (set by external  
resistors). This is the maximum current that will  
be reached when the registers will be at their  
respective full range (PWRLD_BK[4..0] = $1F =  
31 Decimal, PWRLED_FL[6..0] = $7F= 127  
decimal).  
FL−NSteps = number of steps stored into the  
PWRLED_FL register (value, in decimal, of the  
PWRLD_FL[6..0] register)  
ILEDBK = (ILEDBK−MAX/31) * BK−NSteps  
ILEDFL = (ILEDFL−MAX/127) * FL−NSteps  
PHYSICAL ADDRESS  
The physical I2C address dedicated to the NCP5608 to support the I2C protocol is: 0111 001X $72. The external  
controller must fulfill the I2C protocol to drive the chip: see I2C−BUS SPECIFICATION, Version 2.1. The NCP5608  
operates as a Slave only and never takes over the I2C control.  
Table 3. NCP5608 Operation Truth Table  
PWRLED_BK (0−7)  
PWRLED_FL (0−7)  
Output Voltage  
Forced to zero  
Vfbk + Vsense  
Vfbk + Vsense  
Comments  
$00  
>$80  
>$00  
$00  
X
DC−DC = OFF  
DC−DC = ON, LED1 to LED4 active  
X
DC−DC = ON, LED1 to LED3 active  
LED4 deactivated  
X
>$00  
Vffl + Vsense  
DC−DC = ON  
The I2C protocol is based on the standard format defined  
in the industry. Basically, the DATA is transferred from the  
MCU to the NCP5608 registers by means of the SDA  
message associated to the SCL clock. The MCU presents  
the 8 bits during the low state of the SCK signal and the  
peripheral device ( in our case, the NCP5608) shall reads  
the bits during the high state of the same clock. The transfer  
is MSB first as depicted in Figure 5.  
MPU send bit  
PHYSICALADDRESS FRAME  
MPU enables clock  
DATA FRAME  
B7  
B6  
B5  
B4  
B3  
B2  
B1  
B0  
ACK B7  
B6  
B5  
B4  
B3  
B2  
B1  
B0  
ACK  
CLOCK  
DATA  
The NCP5608 reads one bit  
Stop  
Start  
The NCP5608 send ACK  
NOTE: See I2C−BUS SPECIFICATION, Version 2.1, January 2000, for further timing details.  
Figure 5. Basic I2C Timings  
http://onsemi.com  
10  
 
NCP5608  
The three bytes, defined to program the chip, must be  
will be updated on the last I2C clock positive going slope  
of the third byte, the DATA being transferred to the  
appropriate latchup register as defined by the content of the  
second byte.  
The DC−DC charge pump is deactivated when both  
registers are set to zero as depicted in Table 3.  
sent during the same transaction as depicted in Figure 6 and  
Figure 7. Leaving aside the ACK signal, the NCP5608  
does not provide any digital feedback. The selected  
PWRLED−BK or PWRLED−FL register described above  
will be updated according to the content of the third byte  
serially sent to the chip. Finally, the selected bank of LED  
Figure 6. Typical Transaction I2C Sequence:  
I2C Address  
Figure 7. Typical Full I2C Data Transfer  
http://onsemi.com  
11  
NCP5608  
TYPICAL OPERATING CHARACTERISTICS  
90  
90  
I
= 40 mA  
out  
I
= 60 mA  
I
= 80 mA  
I
out  
out  
I
= 120 mA  
I
= 80 mA  
= 40 mA  
out  
out  
out  
I
= 200 mA  
85 out  
85  
80  
75  
I
= 100 mA  
out  
80  
75  
70  
65  
60  
70  
65  
60  
I
= 20 mA  
out  
55  
50  
55  
50  
45  
4.4  
45  
4.4  
4.2  
4.0  
3.8  
3.6  
3.4  
3.2  
3.0  
4.2  
4.0  
3.8  
3.6  
3.4  
3.2  
3.0  
Vbat (V)  
Vbat (V)  
Figure 8. Back Light Efficiency vs. Battery Voltage  
(LED1 to LED4)  
Figure 9. Power Flash Efficiency vs. Battery Voltage  
(LED5 to LED8)  
Vbat = 4.2 V  
80  
6
I
= 300 mA  
out  
75  
70  
65  
60  
55  
50  
45  
−40°C  
4
2
I
= 400 mA  
out  
85°C  
0
−2  
−4  
−6  
25°C  
0
20  
40  
60  
80  
Iout (mA)  
100  
120  
140  
160  
4.4  
4.2  
4.0  
3.8  
3.6  
3.4  
3.2  
3.0  
Vbat (V)  
Figure 10. Power Flash Efficiency vs. Battery Voltage  
(LED5 to LED8) at Full Power  
Figure 11. Back Light Output Current Tolerance  
(LED1 to LED4)  
http://onsemi.com  
12  
NCP5608  
TYPICAL OPERATING WAVEFORMS  
Vbat = 4.2 V  
6
4
2
0
25°C  
−2  
−4  
−6  
0
50 100 150 200 250 300 350 400 450  
Iout (mA)  
Figure 12. Power Flash Output Current Tolerance  
(LED5 to LED8)  
Figure 13. Typical Powerup Response  
Vbat  
+V  
CC  
C3  
C6  
GND  
1 mF/16 V  
4.7 mF/16 V  
C5  
21  
TP2  
VOUT  
C2P  
GND  
U1  
NCP5608  
4.7 mF/16 V  
C4  
24  
19  
AVbat  
PVbat  
GND  
20  
17  
C2N  
C1P  
4.7 mF/16 V  
VOUT  
18  
VOUT  
D1  
D3  
D5  
D7  
16  
6
7
8
LED1  
LED1  
LED2  
CIN  
R1  
5.6 k  
R2  
5.6 k  
LWY87S  
LWY87S  
LWG6SG  
D2  
LED2  
LED3  
MCU  
CCMP  
SCL  
LWY87S  
5
4
3
2
9
10  
11  
12  
LED3  
LED4  
LED5  
LED6  
D4  
D6  
LED4  
LED5  
LED6  
LED7  
SDA  
LWY87S  
IREFBK  
IREFFL  
IREFBK  
IREFFL  
GND  
LWG6SG  
LWG6SG  
1
14  
15  
R3  
R4  
6.2 k  
AGND  
PGND  
LED7  
LED8  
6.2 k  
LWG6SG D8  
13  
LED8  
Z1  
GND  
GND  
Figure 14. Typical Application  
http://onsemi.com  
13  
NCP5608  
Table 4. Recommended Passive Parts  
Part  
Manufacturer  
Description  
Footprint 0805  
Part Number  
C2012X5R1C105MT  
C3216X5R1C475MT  
C3216X5R1C106MT  
Ceramic Cap. 1 μF/16 V  
Ceramic Cap. 4.7 μF/6.3 V  
Ceramic Cap. 10 μF/6.3 V  
TDK  
TDK  
TDK  
Footprint 1206  
Footprint 1206  
TYPICAL LEDS LOAD MAPPING  
C5  
C5  
GND  
GND  
4.7 mF  
4.7 mF  
Vout  
Vout  
LED1  
LED2  
LED3  
LED4  
LED5  
LED6  
LED7  
LED8  
GND  
LED1  
LED2  
LED3  
LED4  
LED5  
LED6  
LED7  
LED8  
GND  
GND  
GND  
Figure 15. Examples of Possible LED Connections  
C5  
C5  
C5  
GND  
GND  
GND  
4.7 mF  
4.7 mF  
4.7 mF  
Vout  
Vout  
Vout  
LED1  
LED2  
LED3  
LED4  
LED5  
LED6  
LED7  
LED8  
GND  
LED1  
LED2  
LED3  
LED4  
LED5  
LED6  
LED7  
LED8  
LED1  
LED2  
LED3  
LED4  
LED5  
LED6  
LED7  
LED8  
GND  
GND  
GND  
GND  
GND  
Figure 16. Examples of Possible LED Arrangements  
http://onsemi.com  
14  
NCP5608  
V
CC  
J1  
1
2
GND  
C2  
+C1  
220 mF/10 V  
PWR  
1 mF/6.3 V  
C5  
21  
TP1  
VOUT  
C2P  
GND  
C6  
4.7 mF/16 V  
GND  
4.7 mF/10 V  
U1  
NCP5608  
24  
19  
AVbat  
PVbat  
GND  
20  
17  
C2N  
C1P  
VOUT  
18  
VOUT  
VCC  
D1  
D2  
16  
6
7
8
LED1  
LED2  
LED3  
LED1  
LED2  
CIN  
J2  
LWY87S  
D3  
1
2
4
6
8
10  
CCMP  
3
5
7
9
LWY87S  
SCL  
5
4
3
2
1
9
10  
11  
12  
SCL  
LED3  
LED4  
LED5  
LED6  
LWY87S  
D4  
SDA  
IREFFL  
IREFBK  
LED4  
LED5  
LED6  
LED7  
SDA  
LWY87S  
DIGITAL  
PORT  
IREFBK  
IREFFL  
GND  
D5  
14  
15  
LWW5SG  
GOLDEN DRAGON  
AGND  
PGND  
LED7  
LED8  
13  
LED8  
Z1  
GND  
GND  
Figure 17. Demo Board Schematic Diagram  
ABBREVIATIONS  
FB  
FeedBack  
POR  
I2C  
Power On Reset: internal pulse to reset the chip when the power supply is applied  
Inter Integrated Chip Communication  
SDA  
SCL  
REGBL  
REGFL  
Serial DATA, Bidirectional line, associated to the I2C protocol  
Serial Clock, associated to the I2C protocol  
Register Back Light  
Register Flash  
http://onsemi.com  
15  
NCP5608  
PACKAGE DIMENSIONS  
24 PIN TQFN, 4X4  
CASE 511AA−01  
ISSUE O  
NOTES:  
D
A
1. DIMENSIONING AND TOLERANCING PER  
ASME Y14.5M, 1994.  
B
E
PIN ONE  
REFERENCE  
2. CONTROLLING DIMENSION: MILLIMETERS.  
3. DIMENSION b APPLIES TO PLATED  
TERMINAL AND IS MEASURED BETWEEN  
0.25 AND 0.30 MM FROM TERMINAL.  
4. COPLANARITY APPLIES TO THE EXPOSED  
PAD AS WELL AS THE TERMINALS.  
MILLIMETERS  
2X  
DIM  
A
A1  
A3  
b
D
D2  
E
MIN  
0.70  
0.00  
NOM  
0.75  
0.03  
MAX  
0.80  
0.05  
0.15  
C
0.20 REF  
0.25  
4.00 BSC  
2.50  
4.00 BSC  
2.50  
2X  
0.15  
C
0.18  
2.40  
2.40  
0.30  
2.60  
2.60  
A3  
E2  
e
0.10  
C
0.50 BSC  
K
L
0.20  
0.30  
−−−  
0.40  
−−−  
0.50  
A
SEATING  
PLANE  
0.08  
C
A1  
C
D2  
20X  
e
L
7
12  
13  
6
1
E2  
e/2  
18  
24  
19  
K
24X b  
0.10 C A B  
NOTE 3  
0.05 C  
ON Semiconductor and  
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice  
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any  
liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental  
damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over  
time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under  
its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body,  
or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death  
may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees,  
subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of  
personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part.  
SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.  
PUBLICATION ORDERING INFORMATION  
LITERATURE FULFILLMENT:  
N. American Technical Support: 800−282−9855 Toll Free  
USA/Canada  
ON Semiconductor Website: http://onsemi.com  
Order Literature: http://www.onsemi.com/litorder  
Literature Distribution Center for ON Semiconductor  
P.O. Box 61312, Phoenix, Arizona 85082−1312 USA  
Phone: 480−829−7710 or 800−344−3860 Toll Free USA/Canada  
Fax: 480−829−7709 or 800−344−3867 Toll Free USA/Canada  
Email: orderlit@onsemi.com  
Japan: ON Semiconductor, Japan Customer Focus Center  
2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051  
Phone: 81−3−5773−3850  
For additional information, please contact your  
local Sales Representative.  
NCP5608/D  

相关型号:

NCP5608MTR2G

Multiple LED Charge Pump Driver
ONSEMI

NCP561

150 mA CMOS Low Iq Low-Dropout Voltage Regulator
ONSEMI

NCP561/D

150 mA CMOS Low Iq Low-Dropout Voltage Regulator
ETC

NCP5612

High Efficiency Ultra Small Thinnest White LED Driver
ONSEMI

NCP5612MUTBG

High Efficiency Ultra Small Thinnest White LED Driver
ONSEMI

NCP561SN15T1

150 mA CMOS Low Iq Low-Dropout Voltage Regulator
ONSEMI

NCP561SN15T1

1.5V FIXED POSITIVE LDO REGULATOR, 0.5V DROPOUT, PDSO5, TSOP-5
ROCHESTER

NCP561SN15T1G

150 mA CMOS Low Iq Low-Dropout Voltage Regulator
ONSEMI

NCP561SN15T1G

1.5V FIXED POSITIVE LDO REGULATOR, 0.5V DROPOUT, PDSO5, TSOP-5
ROCHESTER

NCP561SN18T1

150 mA CMOS Low Iq Low-Dropout Voltage Regulator
ONSEMI

NCP561SN18T1

1.8V FIXED POSITIVE LDO REGULATOR, 0.36V DROPOUT, PDSO5, TSOP-5
ROCHESTER

NCP561SN18T1G

150 mA CMOS Low Iq Low-Dropout Voltage Regulator
ONSEMI