NCP561SN28T1G [ONSEMI]
150 mA CMOS Low Iq Low-Dropout Voltage Regulator; 150毫安CMOS低Iq低压差稳压器
| 型号： | NCP561SN28T1G |
| 厂家： | 
ONSEMI |
| 描述： | 150 mA CMOS Low Iq Low-Dropout Voltage Regulator |
| 文件： | 总10页 (文件大小：74K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
NCP561
150 mA CMOS Low Iq
Low−Dropout Voltage
Regulator
The NCP561 series of fixed output low dropout linear regulators are
designed for handheld communication equipment and portable battery
powered applications which require low quiescent. The NCP561
series features an ultralow quiescent current of 3.0 m A. Each device
contains a voltage reference unit, an error amplifier, a PMOS power
transistor, resistors for setting output voltage, current limit, and
temperature limit protection circuits.
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The NCP561 has been designed to be used with low cost ceramic
capacitors and requires a minimum output capacitor of 1.0 m F. The
device is housed in the micro−miniature TSOP−5 surface mount
package. Standard voltage versions are 1.5 V, 1.8 V, 2.5 V, 2.7 V,
2.8 V, 3.0 V, 3.3 V and 5.0 V.
TSOP−5
SN SUFFIX
CASE 483
PIN CONNECTIONS AND
MARKING DIAGRAM
Features
• Low Quiescent Current of 3.0 m A Typical
• Low Dropout Voltage of 170 mV at 150 mA
• Low Output Voltage Option
V
1
2
5
V
OUT
IN
GND
• Output Voltage Accuracy of 2.0%
• Industrial Temperature Range of −40°C to 85°C
• Pb−Free Packages are Available
Enable
3
4
N/C
(Top View)
xxx = Specific Device Code
Typical Applications
Y
W
= Year
= Work Week
• Battery Powered Instruments
• Hand−Held Instruments
• Camcorders and Cameras
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 9 of this data sheet.
V
IN
V
OUT
1
5
Driver w/
Current
Limit
Thermal
Shutdown
Enable
ON
3
OFF
2
GND
This device contains 28 active transistors
Figure 1. Representative Block Diagram
Semiconductor Components Industries, LLC, 2004
1
Publication Order Number:
July, 2004 − Rev. 4
NCP561/D
NCP561
PIN FUNCTION DESCRIPTION
Pin No.
Pin Name
Description
1
2
3
V
Positive power supply input voltage.
Power supply ground.
IN
GND
Enable
This input is used to place the device into low−power standby. When this input is pulled low, the device is
disabled. If this function is not used, Enable should be connected to V
.
IN
4
5
N/C
No internal connection.
V
OUT
Regulated output voltage.
MAXIMUM RATINGS
Rating
Symbol
Value
Unit
V
Input Voltage
Enable Voltage
Output Voltage
V
IN
6.0
Enable
−0.3 to V +0.3
V
IN
V
OUT
−0.3 to V +0.3
V
IN
Power Dissipation and Thermal Characteristics
Power Dissipation
Thermal Resistance, Junction−to−Ambient
P
Internally Limited
250
W
°C/W
D
R
q
JA
Operating Junction Temperature
Operating Ambient Temperature
Storage Temperature
T
+125
°C
°C
°C
J
T
A
−40 to +85
−55 to +150
T
stg
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
1. This device series contains ESD protection and exceeds the following tests:
Human Body Model 2000 V per MIL−STD−883, Method 3015
Machine Model Method 200 V
2. Latchup capability (85°C) "100 mA DC with trigger voltage.
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NCP561
ELECTRICAL CHARACTERISTICS (V = V
+ 1.0 V, V
= V , C = 1.0 m F, C
= 1.0 m F, T = 25°C,
OUT J
IN
OUT(nom)
enable
IN
IN
unless otherwise noted.)
Characteristic
Symbol
Min
Typ
Max
Unit
Output Voltage (TA = 25°C, I
= 1.0 mA)
V
OUT
V
OUT
1.5 V
1.8 V
2.5 V
2.7 V
2.8 V
3.0 V
3.3 V
5.0 V
1.455
1.746
2.425
2.646
2.744
2.940
2.234
4.90
1.5
1.8
2.5
2.7
2.8
3.0
3.3
5.0
1.545
1.854
2.575
2.754
2.856
3.060
3.366
5.10
Line Regulation
Reg
mV
line
1.5 V−4.4 V (V = V
+ 1.0 V to 6.0 V)
−
−
10
10
20
20
IN
o(nom)
4.5 V−5.0 V (V = 5.5 V to 6.0 V)
IN
Load Regulation (I
= 10 mA to 150 mA)
Reg
−
30
60
mV
mA
OUT
load
Output Current (V
= (V
at I = 150 mA) −3.0%)
I
OUT
OUT
out
o(nom)
1.5 V to 3.9 V (V = V
+ 2.0 V)
150
150
−
−
−
−
IN
o(nom)
4.0 V to 5.0 V (V = 6.0 V)
IN
Dropout Voltage (TA = −40°C to 85°C, I
= 150 mA,
V
IN
−V
OUT
mV
OUT
Measured at V
1.5 V − 1.7 V
1.8 V − 2.4 V
2.5 V − 2.7 V
2.8 V − 3.2 V
3.3 V − 4.9 V
5.0 V
− 3.0%)
OUT
−
−
−
−
−
−
330
240
150
140
130
120
500
360
250
230
200
190
Quiescent Current
(Enable Input = 0 V)
(Enable Input = V , I
I
Q
m
A
−
−
0.1
4.0
1.0
8.0
= 1.0 mA to I
)
IN OUT
o(nom)
Output Short Circuit Current
1.5 V to 3.9 V (V = V
I
mA
OUT(max)
+ 2.0 V)
o(nom)
160
160
400
400
800
800
IN
4.0 V to 5.0 V (V = 6.0 V)
IN
Output Voltage Noise
V
n
−
60
−
m
V
r
m
s
(f = 20 Hz to 100 kHz, V
= 3.0, V I
= 1.0 V)
OUT
OUT
Enable Input Threshold Voltage
V
th(en)
V
(Voltage Increasing, Output Turns On, Logic High)
(Voltage Decreasing, Output Turns Off, Logic Low)
1.3
−
−
−
−
0.2
Output Voltage Temperature Coefficient
T
C
−
"100
−
ppm/°C
3. Maximum package power dissipation limits must be observed.
T
*T
A
qJA
J(max)
PD +
R
4. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.
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NCP561
TYPICAL CHARACTERISTICS
180
3.015
V
= 3.0 V
I
= 10 mA
OUT
OUT
160
140
120
100
3.010
3.005
V
IN
= 6.0 V
150 mA Load
100 mA Load
50 mA Load
3.000
2.995
2.990
2.985
2.980
2.975
V
IN
= 4.0 V
80
60
40
20
0
−50
−25
0
25
50
75
100
125
−50
0
50
100
TEMPERATURE (C°)
TEMPERATURE (C°)
Figure 2. Dropout Voltage vs. Temperature
Figure 3. Output Voltages vs. Temperature
4.75
4.50
4.25
4.00
3.75
3.50
3.25
3.00
4.5
4.0
3.5
3.0
2.5
2.0
1.5
I
V
= 10 mA
= 4.0 V
V
= 3.0 V
= 0 mA
OUT
OUT
I
IN
OUT
T = 25°C
A
−50
0
50
100
0
1
2
3
4
5
6
TEMPERATURE (C°)
TEMPERATURE (C°)
Figure 4. Quiescent Current vs. Temperature
Figure 5. Quiescent Current vs. Input Voltage
4.0
5.0
4.5
4.0
V
= 3.0 V
= 50 mA
OUT
3.5
3.0
I
OUT
T = 25°C
A
2.5
2.0
3.5
1.0 mA
3.0
2.5
2.0
1.5
1.0
150 mA
0.5
0
1.5
10
100
1 k
10 k
100 k 1000 k
0
1
2
3
4
5
6
V
IN
, INPUT VOLTAGE (V)
NOISE CHARACTERIZATION
Figure 7. Output Noise Voltage
Figure 6. Ground Current vs. Input Voltage
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NCP561
TYPICAL CHARACTERISTICS
60
0
50
40
V
V
= 4.0 V
= 3.0 V
−50
−100
−150
IN
OUT
C
C
= 1.0 m F
IN
= 10 m F
OUT
Al. Elec. Surface Mount
I
C
= 10 mA
400
OUT
−200
−250
= 1.0 m F
OUT
200
0
150
100
50
0
−200
−400
0
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
0
200
400
600
800
1000
1200
TIME (m s)
TIME (m s)
Figure 8. Line Transient Response
Figure 9. Load Transient Response
4
2
0
0
−50
V
V
C
C
= 4.0 V
= 3.0 V
= 1.0 m F
IN
OUT
−100
IN
−150
−200
−250
= 10 m F
OUT
Tantalum
3
2
C
C
= 1.0 m F
= 1.0 m F
IN
150
OUT
I
= 10 mA
OUT
100
50
0
1
0
0
200
400
600
800
1000
1200
0
200 400 600 800 1000 1200 1400 1600
TIME (m s)
TIME (m s)
Figure 10. Load Transient Response
Figure 11. Turn−On Response
3.5
3.0
2.5
2.0
C
C
= 1.0 m F
= 1.0 m F
IN
OUT
T = 25°C
A
V
= V
IN
ENABLE
1.5
1.0
0.5
0
0
1
2
3
4
5
6
V
IN
, INPUT VOLTAGE (V)
Figure 12. Output Voltage vs. Input Voltage
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NCP561
DEFINITIONS
Load Regulation
Line Regulation
The change in output voltage for a change in output
current at a constant temperature.
The change in output voltage for a change in input voltage.
The measurement is made under conditions of low
dissipation or by using pulse technique such that the average
chip temperature is not significantly affected.
Dropout Voltage
The input/output differential at which the regulator output
no longer maintains regulation against further reductions in
input voltage. Measured when the output drops 3.0% below
its nominal. The junction temperature, load current, and
minimum input supply requirements affect the dropout level.
Line Transient Response
Typical over and undershoot response when input voltage
is excited with a given slope.
Thermal Protection
Internal thermal shutdown circuitry is provided to protect
the integrated circuit in the event that the maximum junction
temperature is exceeded. When activated at typically 160°C,
the regulator turns off. This feature is provided to prevent
failures from accidental overheating.
Maximum Power Dissipation
The maximum total dissipation for which the regulator
will operate within its specifications.
Quiescent Current
The quiescent current is the current which flows through
the ground when the LDO operates without a load on its
output: internal IC operation, bias, etc. When the LDO
becomes loaded, this term is called the Ground current. It is
actually the difference between the input current (measured
through the LDO input pin) and the output current.
Maximum Package Power Dissipation
The maximum power package dissipation is the power
dissipation level at which the junction temperature reaches
its maximum operating value, i.e. 125°C. Depending on the
ambient power dissipation and thus the maximum available
output current.
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NCP561
APPLICATIONS INFORMATION
Thermal
A typical application circuit for the NCP561 series is
shown in Figure 13.
As power across the NCP561 increases, it might become
necessary to provide some thermal relief. The maximum
power dissipation supported by the device is dependent
upon board design and layout. Mounting pad configuration
on the PCB, the board material and also the ambient
temperature effect the rate of temperature rise for the part.
This is stating that when the NCP561 has good thermal
conductivity through the PCB, the junction temperature will
be relatively low with high power dissipation applications.
The maximum dissipation the package can handle is
given by:
Input Decoupling (C1)
A 1.0 m F capacitor either ceramic or tantalum is
recommended and should be connected close to the NCP561
package. Higher values and lower ESR will improve the
overall line transient response.
TDK capacitor: C2012X5R1C105K, or C1608X5R1A105K
Output Decoupling (C2)
The NCP561 is a stable Regulator and does not require
any specific Equivalent Series Resistance (ESR) or a
minimum output current. Capacitors exhibiting ESRs
ranging from a few mW up to 3.0 W can thus safely be used.
The minimum decoupling value is 1.0 m F and can be
augmented to fulfill stringent load transient requirements.
The regulator accepts ceramic chip capacitors as well as
tantalum devices. Larger values improve noise rejection and
load regulation transient response.
T
*T
A
qJA
J(max)
PD +
R
If junction temperature is not allowed above the
maximum 125°C, then the NCP561 can dissipate up to
400 mW @ 25°C.
The power dissipated by the NCP561 can be calculated
from the following equation:
TDK capacitor: C2012X5R1C105K, or C1608X5R1A105K,
or C3216X7R1C105K
[
]
(I ) ) V * V
in gnd out in
[
]
P
+ V * I
* I
tot
out out
or
Enable Operation
)
*
I
P
V
TOT
OUT OUT
) I
V
+
The enable pin will turn on the regulator when pulled high
and turn off the regulator when pulled low. These limits of
threshold are covered in the electrical specification section
of this data sheet. If the enable is not used then the pin should
INMAX
I
GND
OUT
If a 150 mA output current is needed then the ground
current from the data sheet is 4.0 m A. For an
NCP561SN30T1 (3.0 V), the maximum input voltage will
then be 5.6 V.
be connected to V .
IN
Hints
Battery or
Unregulated
Voltage
V
Please be sure the V and GND lines are sufficiently
OUT
IN
1
2
3
5
4
+
wide. When the impedance of these lines is high, there is a
chance to pick up noise or cause the regulator to
malfunction.
C1
+
C2
Set external components, especially the output capacitor,
as close as possible to the circuit, and make leads a short as
possible.
ON
OFF
Figure 13. Typical Application Circuit
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NCP561
APPLICATION CIRCUITS
Input
Input
R1
R2
Q1
Q1
Q2
R3
R
Output
Output
1
2
3
5
4
1
2
3
5
4
1.0 m F
1.0 m F
1.0 m F
1.0 m F
Figure 14. Current Boost Regulator
Figure 15. Current Boost Regulator
with Short Circuit Limit
The NCP561 series can be current boosted with a PNP transis-
tor. Resistor R in conjunction with V of the PNP determines
when the pass transistor begins conducting; this circuit is not
short circuit proof. Input/Output differential voltage minimum is
BE
Short circuit current limit is essentially set by the V of Q2 and
BE
R1. I = ((V
− ib * R2) / R1) + I
SC
BEQ2
O(max) Regulator
increased by V of the pass resistor.
BE
Input
Output
1
1.0 m F
2
5
1.0 m F
Enable
3
4
5
Input
Output
Q1
1
2
5
4
Output
1
1.0 m F
2
1.0 m F
R
1.0 m F
1.0 m F
3
5.6 V
3
4
R
C
Figure 16. Delayed Turn−on
Figure 17. Input Voltages Greater than 6.0 V
If a delayed turn−on is needed during power up of several volt-
ages then the above schematic can be used. Resistor R, and
capacitor C, will delay the turn−on of the bottom regulator.
A regulated output can be achieved with input voltages that
exceed the 6.0 V maximum rating of the NCP561 series with
the addition of a simple pre−regulator circuit. Care must be
taken to prevent Q1 from overheating when the regulated
output (V ) is shorted to GND.
OUT
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NCP561
ORDERING INFORMATION
Nominal
Output Voltage
†
Device
NCP561SN15T1
NCP561SN18T1
NCP561SN25T1
NCP561SN25T1G
Marking
LDA
Package
TSOP−5
TSOP−5
TSOP−5
Shipping
1.5
1.8
2.5
2.5
LEV
LDC
LDC
TSOP−5
(Pb−Free)
NCP561SN27T1
NCP561SN28T1
NCP561SN28T1G
2.7
2.8
2.8
LEX
LDD
LDD
TSOP−5
TSOP−5
3000 / 7″ Tape & Reel
TSOP−5
(Pb−Free)
NCP561SN30T1
NCP561SN33T1
NCP561SN50T1
3.0
3.3
5.0
LDE
LDF
LDH
TSOP−5
TSOP−5
TSOP−5
NOTE: Additional voltages are available upon request by contacting your ON Semiconductor representative.
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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NCP561
PACKAGE DIMENSIONS
TSOP−5
(SOT23−5, SC59−5)
SN SUFFIX
PLASTIC PACKAGE
CASE 483−02
ISSUE C
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. MAXIMUM LEAD THICKNESS INCLUDES
LEAD FINISH THICKNESS. MINIMUM LEAD
THICKNESS IS THE MINIMUM THICKNESS
OF BASE MATERIAL.
D
5
4
3
B
C
S
4. A AND B DIMENSIONS DO NOT INCLUDE
MOLD FLASH, PROTRUSIONS, OR GATE
BURRS.
1
2
L
MILLIMETERS
DIM MIN MAX
INCHES
MIN MAX
G
A
B
C
D
G
H
J
K
L
M
S
2.90
1.30
0.90
0.25
0.85
3.10 0.1142 0.1220
1.70 0.0512 0.0669
1.10 0.0354 0.0433
0.50 0.0098 0.0197
1.05 0.0335 0.0413
A
J
0.013 0.100 0.0005 0.0040
0.05 (0.002)
0.10
0.20
1.25
0
0.26 0.0040 0.0102
0.60 0.0079 0.0236
1.55 0.0493 0.0610
H
M
K
10
0
10
_
_
_
_
2.50
3.00 0.0985 0.1181
SOLDERING FOOTPRINT*
1.9
0.074
0.95
0.037
2.4
0.094
1.0
0.039
0.7
0.028
mm
inches
ǒ
Ǔ
SCALE 10:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
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Order Literature: http://www.onsemi.com/litorder
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Phone: 81−3−5773−3850
For additional information, please contact your
local Sales Representative.
NCP561/D
相关型号：
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