NCP703SN19T1G [ONSEMI]
300 mA, Ultra-Low Quiescent Current, IQ 12 A, Ultra-Low Noise, LDO Voltage Regulator;
| 型号： | NCP703SN19T1G |
| 厂家： | 
ONSEMI |
| 描述： | 300 mA, Ultra-Low Quiescent Current, IQ 12 A, Ultra-Low Noise, LDO Voltage Regulator |
| 文件： | 总18页 (文件大小：947K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
NCP703
300 mA, Ultra-Low Quiescent
Current, IQ 12 mA, Ultra-Low
Noise, LDO Voltage Regulator
Noise sensitive RF applications such as Power Amplifiers in
satellite radios, infotainment equipment, and precision
instrumentation require very clean power supplies. The NCP703 is
300 mA LDO that provides the engineer with a very stable, accurate
voltage with ultra low noise and very high Power Supply Rejection
Ratio (PSRR) suitable for RF applications. The device doesn’t require
any additional noise bypass capacitor to achieve ultra−low noise
performance. In order to optimize performance for battery operated
portable applications, the NCP703 employs dynamic Iq management
for ultra−low quiescent current consumption at light−load conditions
and great dynamic performance.
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5
1
1
TSOP−5
XDFN6
SN SUFFIX
CASE 483
MX SUFFIX
CASE 711AE
MARKING DIAGRAMS
Features
5
1
• Operating Input Voltage Range: 2.0 V to 5.5 V
1
XXXAYW
X M
G
• Available in Fixed Voltage Options: 0.8 to 3.5 V
G
Contact Factory for Other Voltage Options
• Ultra−Low Quiescent Current of Typ. 12 mA
• Ultra−Low Noise: 13 mV
from 100 Hz to 100 kHz
X, XXX = Specific Device Code
RMS
M
A
Y
W
G
= Date Code
• Very Low Dropout: 180 mV Typical at 300 mA
2% Accuracy Over Load/Line/Temperature
= Assembly Location
= Year
= Work Week
= Pb−Free Package
•
• High PSRR: 68 dB at 1 kHz
• Internal Soft−Start to Limit the Turn−On Inrush Current
• Thermal Shutdown and Current Limit Protections
• Stable with a 1 mF Ceramic Output Capacitor
• Available in TSOP−5 and XDFN 1.5 x 1.5 mm Package
• Active Output Discharge for Fast Turn−Off
• These are Pb−Free Devices
PIN CONNECTIONS
1
IN
OUT
GND
EN
N/C
Typical Applicaitons
5−Pin TSOP−5
(Top View)
• PDAs, Mobile Phones, GPS, Smartphones
• Wireless Handsets, Wireless LAN, Bluetooth, Zigbee
• Portable Medical Equipment
1
OUT
IN
N/C
N/C
EN
• Other Battery Powered Applications
GND
V
IN
V
OUT
6−Pin XDFN 1.5 x 1.5 mm
(Top View)
IN
OUT
NCP703
1 mF
Ceramic
C
1 mF
IN
EN
C
OUT
ON
GND
ORDERING INFORMATION
See detailed ordering and shipping information in the package
OFF
dimensions section on page 16 of this data sheet.
Figure 1. Typical Application Schematic
© Semiconductor Components Industries, LLC, 2016
1
Publication Order Number:
May, 2016 − Rev. 3
NCP703/D
NCP703
IN
ENABLE
LOGIC
THERMAL
SHUTDOWN
UVLO
EN
BANDGAP
REFERENCE
MOSFET
DRIVER WITH
CURRENT LIMIT
INTEGRATED
SOFT−START
AUTO LOW
POWER MODE
OUT
ACTIVE
DISCHARGE
EN
GND
Figure 2. Simplified Schematic Block Diagram
Table 1. PIN FUNCTION DESCRIPTION
Pin No.
XDFN6
Pin No.
TSOP−5
Pin
Name
Description
1
5
OUT
Regulated output voltage pin. A small 1 mF ceramic capacitor is needed from this pin to ground
to assure stability.
2
3
4
2
N/C
Not connected.
GND
Power supply ground. Connected to the die through the lead frame. Soldered to the copper
plane allows for effective heat dissipation.
4
3
EN
Enable pin. Driving EN over 0.9 V turns on the regulator. Driving EN below 0.4 V puts the regu-
lator into shutdown mode.
5
6
N/C
IN
Not connected. This pin can be tied to ground to improve thermal dissipation.
Input pin. A small capacitor is needed from this pin to ground to assure stability.
1
Table 2. ABSOLUTE MAXIMUM RATINGS
Rating
Symbol
Value
Unit
V
Input Voltage (Note 1)
V
IN
−0.3 V to 6 V
Output Voltage
V
OUT
−0.3 V to V + 0.3 V
V
IN
Enable Input
V
EN
−0.3 V to V + 0.3 V
V
IN
Output Short Circuit Duration
Maximum Junction Temperature
Storage Temperature
t
Indefinite
150
s
SC
T
°C
°C
V
J(MAX)
T
STG
−55 to 150
2000
ESD Capability, Human Body Model (Note 2)
ESD Capability, Machine Model (Note 2)
ESD
HBM
ESD
200
V
MM
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area.
2. This device series incorporates ESD protection and is tested by the following methods:
ESD Human Body Model tested per AEC−Q100−002 (EIA/JESD22−A114)
ESD Machine Model tested per AEC−Q100−003 (EIA/JESD22−A115)
Latchup Current Maximum Rating tested per JEDEC standard: JESD78.
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2
NCP703
Table 3. THERMAL CHARACTERISTICS (Note 3)
Rating
Symbol
Value
Unit
Thermal Characteristics, TSOP−5,
Thermal Resistance, Junction−to−Air
Thermal Characterization Parameter, Junction−to−Lead (Pin 2)
°C/W
q
y
241
129
JA
JL
Thermal Characteristics, XDFN6 1.5 x 1.5 mm
Thermal Resistance, Junction−to−Air
Thermal Characterization Parameter, Junction−to−Board
°C/W
q
y
146
77
JA
JB
2
3. Single component mounted on 1 oz, FR4 PCB with 645 mm Cu area.
Table 4. ELECTRICAL CHARACTERISTICS
−40°C ≤ T ≤ 125°C; V = V
+ 0.5 V or 2.0 V, whichever is greater; V = 0.9 V, I
= 10 mA, C = C
= 1 mF unless
J
IN
OUT(NOM)
EN
OUT
IN
OUT
otherwise noted. Typical values are at T = +25°C. (Note 4)
J
Parameter
Operating Input Voltage
Undervoltage Lock−out
Output Voltage Accuracy
Line Regulation
Test Conditions
Symbol
Min
Typ
Max
5.5
1.9
+2
Unit
V
V
IN
2.0
1.2
−2
V
V
V
V
rising
UVLO
1.6
V
IN
+ 0.5 V ≤ V ≤ 5.5 V, I
= 0 − 300 mA
= 10 mA
V
OUT
%
OUT
OUT
OUT
IN
OUT
OUT
OUT
+ 0.5 V ≤ V ≤ 4.5 V, I
Reg
450
600
20
mV/V
mV/V
mV/mA
mV
IN
LINE
LINE
+ 0.5 V ≤ V ≤ 5.5 V, I
= 10 mA
Reg
IN
Load Regulation
Load Transient
I
I
= 0 mA to 300 mA
Reg
OUT
LOAD
LOAD
= 1 mA to 300 mA or 300 mA to 1 mA in
= 1 mF
Tran
−100/
+150
OUT
1 ms, C
OUT
Dropout Voltage (Note 5)
Output Current Limit
Quiescent Current
Ground Current
I
= 300 mA, V
= 2.5 V
V
180
450
12
300
750
20
mV
mA
mA
mA
mA
mA
V
OUT
OUT(nom)
OUT(nom)
DO
V
= 90% V
I
CL
310
OUT
I
I
= 0 mA
I
Q
OUT
OUT
= 300 mA
I
200
0.12
0.55
GND
Shutdown Current
V
≤ 0.4 V, T = +25°C
I
EN
EN
J
DIS
DIS
V
≤ 0 V, V = 2.0 to 4.5 V, T = −40 to +85°C
I
2
IN
J
EN Pin Threshold Voltage
High Threshold
V
V
Voltage increasing
Voltage decreasing
V
EN_HI
0.9
EN
Low Threshold
V
0.4
EN
EN_LO
EN Pin Input Current
Turn−On Time
V
= 5.5 V
I
100
200
500
nA
EN
EN
C
= 1.0 mF, from assertion EN pin to 98%
t
ms
OUT
ON
V
OUT(nom)
Power Supply Rejection Ratio
Output Noise Voltage
V
= 3 V, V
= 2.5 V
f = 100 Hz
f = 1 kHz
f = 10 kHz
PSRR
70
68
53
dB
IN
OUT
I
= 300 mA
OUT
V
OUT
= 2.5 V, V = 3 V, I
= 300 mA
V
N
13
mV
rms
IN
OUT
f = 100 Hz to 100 kHz
Thermal Shutdown Temperature
Thermal Shutdown Hysteresis
Temperature increasing from T = +25°C
T
160
20
°C
°C
J
SD
Temperature falling from T
T
SDH
−
−
SD
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Performance guaranteed over the indicated operating temperature range by design and/or characterization. Production tested at T = T
J
A
= 25_C. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.
5. Characterized when V
falls 100 mV below the regulated voltage at V = V
+ 0.5 V.
OUT
IN
OUT(NOM)
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3
NCP703
TYPICAL CHARACTERISTICS
10
1
RMS Output Noise (mV)
10 Hz − 100 kHz 100 Hz − 100 kHz
18.45 17.77
I
= 10 mA
OUT
I
OUT
0.1
1 mA
10 mA
300 mA
17.18
14.14
16.43
13.11
V
V
C
= 2.0 V
IN
I
= 1 mA
OUT
= 0.8 V
= C = 1 mF
OUT
0.01
IN
OUT
MLCC, X7R,
1206 size
I
= 300 mA
100 1000
OUT
0.001
0.01
0.1
1
10
FREQUENCY (kHz)
Figure 3. Output Voltage Noise Spectral Density for VOUT = 0.8 V, COUT = 1 mF
10
1
RMS Output Noise (mV)
10 Hz − 100 kHz 100 Hz − 100 kHz
14.07 13.14
I
OUT
I
= 300 mA
0.1
OUT
1 mA
10 mA
300 mA
V
V
C
C
= 2.0 V
16.59
15.46
15.83
14.53
IN
= 0.8 V
I
= 10 mA
OUT
OUT
= 1 mF
IN
0.01
= 4.7 mF
OUT
MLCC, X7R,
1206 size
I
= 1 mA
100
OUT
0.001
0.01
0.1
1
10
1000
FREQUENCY (kHz)
Figure 4. Output Voltage Noise Spectral Density for VOUT = 0.8 V, COUT = 4.7 mF
10
1
RMS Output Noise (mV)
10 Hz − 100 kHz 100 Hz − 100 kHz
20.29 17.06
I
OUT
I
= 10 mA
OUT
0.1
1 mA
10 mA
300 mA
19.76
18.74
16.11
15.46
V
V
C
= 3.8 V
IN
= 3.3 V
OUT
0.01
I
= 1 mA
OUT
= C
= 1 mF
IN
OUT
MLCC, X7R,
1206 size
I
= 300 mA
OUT
0.001
0.01
0.1
1
10
100
1000
FREQUENCY (kHz)
Figure 5. Output Voltage Noise Spectral Density for VOUT = 3.3 V, COUT = 1 mF
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4
NCP703
TYPICAL CHARACTERISTICS
10
1
RMS Output Noise (mV)
10 Hz − 100 kHz 100 Hz − 100 kHz
17.64 13.52
I
= 300 mA
OUT
I
OUT
0.1
1 mA
10 mA
300 mA
V
V
C
C
= 3.8 V
IN
19.54
21.50
15.96
18.71
= 3.3 V
= 1 mF
OUT
IN
I
= 10 mA
OUT
0.01
= 4.7 mF
OUT
MLCC, X7R,
1206 size
I
= 1 mA
OUT
0.001
0.01
0.1
1
10
100
1000
FREQUENCY (kHz)
Figure 6. Output Voltage Noise Spectral Density for VOUT = 3.3 V, COUT = 4.7 mF
160
350
315
280
245
210
175
140
105
70
V
= 0.8 V
OUT
140
120
100
80
V
OUT
= 3.3 V
V
= 2.5 V
= 0.8 V
+ 0.5 V
OUT
V
= 3.3 V
OUT
V
= 2.5 V
OUT
V
OUT
V
IN
= V
OUT
V
C
C
= V
OUT
= 1 mF
+ 0.5 V
60
IN
C
C
= 1 mF
IN
IN
40
= 1 mF
= 1 mF
OUT
OUT
MLCC, X7R,
1206 size
MLCC, X7R,
1206 size
20
0
35
0
0
50
100
150
200
250
300
0
0.25 0.50 0.75 1.00 1.25 1.50 1.75 2.00
, OUTPUT CURRENT (mA)
I
, OUTPUT CURRENT (mA)
I
OUT
OUT
Figure 7. Ground Current vs. Output Current
Figure 8. Ground Current vs. Output Current
from 0 mA to 2 mA
270
240
160
140
T = 125°C
J
T = 25°C
J
210
180
150
120
90
T = 25°C
120
100
80
J
T = −40°C
J
T = −40°C
J
T = 125°C
J
60
V
IN
= V
+ 0.5 V
V
IN
= V
= 1 mF
= 1 mF
+ 0.5 V
OUT
OUT
C
C
= 1 mF
C
C
IN
IN
40
= 1 mF
60
OUT
OUT
MLCC, X7R,
1206 size
MLCC, X7R,
1206 size
20
0
30
0
0
30 60
90 120 150 180 210 240 270 300
, OUTPUT CURRENT (mA)
0
0.25 0.50 0.75 1.00 1.25 1.50 1.75 2.00
I
I , OUTPUT CURRENT (mA)
OUT
OUT
Figure 9. Ground Current vs. Output Current
at Temperatures
Figure 10. Ground Current vs. Output Current
0 mA to 2 mA at Temperatures
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NCP703
TYPICAL CHARACTERISTICS
40
14.0
13.5
C
C
V
= 1 mF
= 1 mF
V
OUT
= 0.8 V
IN
OUT
13.0
12.5
12.0
11.5
11.0
10.5
10.0
= 3.3 V
30
20
OUT
V
= 3.3 V
MLCC, X7R
1206 size
OUT
V
= 2.5 V
OUT
V
C
C
= V
= 1 mF
+ 0.5 V
IN
OUT
IN
10
0
= 1 mF
OUT
MLCC, X7R
1206 size
9.5
9.0
−40 −20
0
20
40
60
80
100 120 140
2
3
4
5
6
T , JUNCTION TEMPERATURE (°C)
J
V , INPUT VOLTAGE (V)
IN
Figure 11. Quiescent Current vs. Temperature
Figure 12. Quiescent Current vs. Input Voltage
3.5
3.0
0.805
0.804
0.803
C
C
= 1 mF
V
V
C
C
= 2 V
IN
IN
V
= 3.3 V
= 2.5 V
OUT
= 1 mF
= 0.8 V
= 1 mF
OUT
OUT
MLCC, X7R
1206 size
IN
2.5
2.0
1.5
1.0
0.802
0.801
0.800
0.799
0.798
0.797
= 1 mF
OUT
V
OUT
V
= 0.8 V
OUT
0.5
0
0.796
0.795
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
, INPUT VOLTAGE (V)
−40 −20
0
20
40
60
80 100 120 140
V
IN
T , JUNCTION TEMPERATURE (°C)
J
Figure 13. Output Voltage vs. Input Voltage
Figure 14. Output Voltage vs. Temperature –
0.8 V
2.5035
2.5025
2.5015
2.5005
2.4995
3.3050
3.3025
3.3000
3.2975
3.2950
3.2925
3.2900
V
V
C
C
= V
+ 0.5 V
IN
OUT
= 2.5 V
OUT
= 1 mF
IN
= 1 mF
OUT
V
V
= V
+ 0.5 V
IN
OUT
= 3.3 V
OUT
2.4985
C
C
= 1 mF
IN
= 1 mF
OUT
2.4975
2.4965
3.2875
3.2850
−40 −20
0
20
40
60
80 100 120 140
−40 −20
0
20
40
60
80 100 120 140
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 15. Output Voltage vs. Temperature –
2.5 V
Figure 16. Output Voltage vs. Temperature –
3.3 V
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NCP703
TYPICAL CHARACTERISTICS
1000
900
800
700
600
500
400
300
200
1000
900
800
700
600
500
400
300
200
V
V
= 2.8 V
= 3.3 to 5.5 V
= 1 mF
= 1 mF
= 10 mA
V
V
= 1.8 V
= 2.3 to 5.5 V
= 1 mF
= 1 mF
= 10 mA
OUT
OUT
IN
IN
C
C
I
C
C
I
IN
OUT
IN
OUT
OUT
100
0
100
0
OUT
−40 −20
0
20
40
60
80 100 120 140
−40 −20
0
20
40
60
80
100 120 140
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 17. Line Regulation vs. Temperature −
1.8 V
Figure 18. Line Regulation vs. Temperature –
2.8 V
1200
1000
800
20
18
16
V
V
C
C
= 1.8 V
= 2.3 V
= 1 mF
= 1 mF
OUT
IN
IN
14
12
10
8
OUT
I
= 0 mA to 300 mA
OUT
600
V
V
C
C
= 3.3 V
= 3.8 to 5.5 V
= 1 mF
= 1 mF
OUT
400
IN
6
IN
4
OUT
200
0
I
= 10 mA
OUT
2
0
−40 −20
0
20
40
60
80 100 120 140
−40 −20
0
20
40
60
80 100 120 140
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 19. Line Regulation vs. Temperature –
3.3 V
Figure 20. Load Regulation vs. Temperature –
1.8 V
20
18
16
14
12
10
8
20
18
16
14
12
10
8
V
V
= 2.8 V
= 3.3 V
= 1 mF
= 1 mF
V
V
= 3.3 V
= 3.8 V
= 1 mF
= 1 mF
OUT
OUT
IN
IN
C
C
I
C
C
I
IN
IN
OUT
OUT
= 0 mA to 300 mA
= 0 mA to 300 mA
OUT
OUT
6
6
4
4
2
0
2
0
−40 −20
0
20
40
60
80 100 120 140
−40 −20
0
20
40
60
80 100 120 140
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 21. Load Regulation vs. Temperature –
2.8 V
Figure 22. Load Regulation vs. Temperature –
3.3 V
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NCP703
TYPICAL CHARACTERISTICS
250
200
150
100
250
T = 25°C
J
V
C
C
= 2.5 V
= 1 mF
= 1 mF
OUT
225
200
175
150
125
100
75
I
I
= 300 mA
= 200 mA
= 100 mA
V
C
C
= 2.5 V
= 1 mF
= 1 mF
OUT
OUT
IN
IN
OUT
T = 125°C
J
OUT
OUT
T = −40°C
J
I
OUT
50
0
50
25
0
−40 −20
0
50
100
150
200
250
300
0
20
40
60
80 100 120 140
I , OUTPUT CURRENT (mA)
OUT
T , JUNCTION TEMPERATURE (°C)
J
Figure 23. Dropout vs. Output Current – 2.5 V
Figure 24. Dropout vs. Temperature – 2.5 V
750
725
700
675
650
625
600
750
725
700
675
650
625
600
V
V
C
C
= 3.3 V
= 3.8 V
= 1 mF
= 1 mF
V
= 3.3 V
OUT
OUT
V = 3.8 V
IN
IN
C
C
= 1 mF
IN
IN
= 1 mF
OUT
OUT
I
= 10 mA
I
= 10 mA
OUT
OUT
575
550
575
550
−40 −20
0
20
40
60
80 100 120 140
−40 −20
0
20
40
60
80 100 120 140
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 25. Enable Threshold − High
Figure 26. Enable Threshold − Low
600
600
550
500
450
400
550
500
450
400
V
V
C
C
= 2.3 V
V
V
C
C
= 2.3 V
IN
IN
= 1.8 V
= 1 mF
= 1.8 V
= 1 mF
OUT
OUT
IN
IN
= 1 mF
= 1 mF
OUT
OUT
350
300
350
300
MLCC, X7R,
size 1206
MLCC, X7R,
size 1206
−40 −20
0
20
40
60
80 100 120 140
−40 −20
0
20
40
60
80 100 120 140
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 27. Output Current Limit
Figure 28. Short Circuit Limit
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NCP703
TYPICAL CHARACTERISTICS
100
90
100
Iout = 1 mA
Iout = 1 mA
90
80
70
60
50
40
30
20
Iout = 10 mA
Iout = 100 mA
Iout = 200 mA
Iout = 300 mA
Iout = 10 mA
Iout = 100 mA
Iout = 200 mA
Iout = 300 mA
80
70
60
50
40
30
20
V
V
C
C
= 2.3 V
IN
V
V
C
C
= 3.0 V
IN
= 1.8 V
= none
OUT
= 2.5 V
= none
OUT
IN
IN
= 1 mF
OUT
= 1 mF
OUT
MLCC, X7R,
1206 size
MLCC, X7R,
1206 size
10
0
10
0
0.01
0.1
1
10
100
1000
10,000
10,000
10,000
0.01
0.1
1
10
100
1000 10,000
F, FREQUENCY (kHz)
F, FREQUENCY (kHz)
Figure 29. Power Supply Rejection Ratio,
OUT = 1.8 V
Figure 30. Power Supply Rejection Ratio,
VOUT = 2.5 V
V
100
90
80
70
60
50
40
30
20
100
90
80
70
60
50
40
30
20
Iout = 1 mA
Cout = 1mF
Cout = 4.7m
Cout = 10m
Iout = 10 mA
Iout = 100 mA
Iout = 200 mA
Iout = 300 mA
V
V
C
C
= 3.8 V
IN
V
V
C
= 3.8 V
IN
= 3.3 V
OUT
= 3.3 V
= none
OUT
= none
IN
IN
= 1 mF
OUT
MLCC, X7R,
1206 size
MLCC, X7R,
1206 size
10
0
10
0
0.01
0.1
1
10
100
1000
0.01
0.1
1
10
100
1000 10,000
F, FREQUENCY (kHz)
F, FREQUENCY (kHz)
Figure 31. Power Supply Rejection Ratio,
Figure 32. Power Supply Rejection Ratio,
VOUT = 3.3 V, IOUT = 10 mA
V
OUT = 3.3 V
10
100
90
Cout = 1mF
Cout = 4.7m
Cout = 10m
80
70
60
50
40
30
20
Unstable Region
V
= 3.3 V
= 0.8 V
OUT
1
V
OUT
V
V
C
= 3.8 V
IN
= 3.3 V
= none
OUT
Stable Region
IN
MLCC, X7R,
1206 size
V
IN
= 5.5 V
C
= C
= 1 mF
IN
OUT
10
0
MLCC, X7R, 1206 size
50 100
, OUTPUT CURRENT (mA)
0.1
0
150
200
250
300
0.01
0.1
1
10
100
1000
I
F, FREQUENCY (kHz)
OUT
Figure 33. Power Supply Rejection Ratio,
OUT = 3.3 V, IOUT = 300 mA
Figure 34. Output Capacitor ESR vs. Output
Current
V
www.onsemi.com
9
NCP703
TYPICAL CHARACTERISTICS
V
V
V
I
= 3.8 V
V
V
V
I
= 3.8 V
IN
IN
= 3.3 V
= 3.3 V
OUT
OUT
= 0.9 V
= 0.9 V
EN
EN
V
EN
V
EN
= 10 mA
= 10 mA
OUT
OUT
C
C
= 1 mF
= 1 mF
C
C
= 1 mF
= 4.7 mF
IN
OUT
IN
OUT
I
I
INRUSH
INRUSH
V
OUT
V
OUT
100 ms / div
100 ms / div
Figure 35. Enable Turn−on Response −
OUT = 1 mF
Figure 36. Enable Turn−on Response –
C
COUT = 4.7 mF
V
V
V
= 3.8 V
IN
V
I
V
V
V
= 3.8 V
EN
IN
= 3.3 V
V
OUT
= 3.3 V
EN
OUT
= 0.9 V
EN
= 0.9 V
EN
I
= 10 mA
OUT
I
= 10 mA
= 1 mF
OUT
C
C
= 1 mF
IN
OUT
C
IN
= 1 mF
OUT
I
INRUSH
V
OUT
C
C
= 4.7 mF
= 1 mF
OUT
OUT
V
OUT
100 ms / div
1 ms / div
Figure 37. Enable Turn−on Response –
Figure 38. Enable Turn−off Response
C
OUT = 10 mF
V
IN
t
= 1 ms
FALL
V
V
= 3.8 V to 4.8 V
IN
V
IN
t
= 1 ms
rise
= 3.3 V
OUT
I
C
C
= 10 mA
= 1 mF
OUT
V
V
= 3.8 V to 4.8 V
IN
IN
= 3.3 V
OUT
= 1 mF
OUT
I
= 10 mA
OUT
C
C
= 1 mF
IN
= 1 mF
OUT
V
OUT
V
OUT
2 ms / div
2 ms / div
Figure 39. Line Transient Response – Rising
Edge, VOUT = 3.3 V
Figure 40. Line Transient Response – Falling
Edge, VOUT = 3.3 V
www.onsemi.com
10
NCP703
TYPICAL CHARACTERISTICS
I
V
V
= 2 V
OUT
IN
= 0.8 V
V
V
= 2 V
OUT
IN
C
= 1 mF (MLCC)
= 0.8 V
IN
OUT
C
= 1 mF (MLCC)
IN
I
OUT
C
= 1 mF
OUT
V
OUT
C
= 4.7 mF
OUT
C
= 4.7 mF
OUT
V
OUT
C
= 1 mF
OUT
20 ms / div
50 ms / div
Figure 41. Load Transient Response − Rising
Edge, VOUT = 0.8 V, IOUT = 1 mA to 300 mA,
Figure 42. Load Transient Response – Falling
Edge, VOUT = 0.8 V, IOUT = 1 mA to 300 mA,
C
OUT = 1 mF, 4.7 mF
COUT = 1 mF, 4.7 mF
V
V
= 2 V
V
V
= 3.8 V
IN
IN
= 0.8 V
= 3.3 V
OUT
OUT
C
C
= 1 mF (MLCC)
= 1 mF (MLCC)
IN
C
= 1 mF (MLCC)
I
I
OUT
IN
OUT
out
V
OUT
V
OUT
t
= 10 ms
rise
C
= 4.7 mF
OUT
t
= 1 ms
rise
C
= 1 mF
OUT
20 ms / div
10 ms / div
Figure 43. Load Transient Response − Rising
Edge, VOUT = 0.8 V, IOUT = 1 mA to 300 mA,
Figure 44. Load Transient Response – Rising
Edge, VOUT = 3.3 V, IOUT = 1 mA to 300 mA,
t
RISE = 1 ms, 10 ms
C
OUT = 1 mF, 4.7 mF
V
V
= 3.8 V
IN
I
OUT
= 3.3 V
V
IN
= 3.8 V
OUT
V
OUT
= 3.3 V
C
= 1 mF (MLCC)
IN
C
C
= 1 mF (MLCC)
= 1 mF (MLCC)
IN
I
OUT
out
V
OUT
C
= 1 mF
OUT
t
= 1 ms
rise
C
= 4.7 mF
OUT
V
OUT
t
= 10 ms
rise
50 ms / div
10 ms / div
Figure 45. Load Transient Response – Falling
Edge, VOUT = 3.3 V, IOUT = 1 mA to 300 mA,
Figure 46. Load Transient Response – Rising
Edge, VOUT = 3.3 V, IOUT = 1 mA to 300 mA,
C
OUT = 1 mF, 4.7 mF
tRISE = 1 ms, 10 ms
www.onsemi.com
11
NCP703
TYPICAL CHARACTERISTICS
= 3.3 V
V
I
V
V
= 3.8 V
OUT
V
OUT
IN
= 1 mA
= 3.3 V
OUT
OUT
C
C
= 1 mF (MLCC)
= 1 mF (MLCC)
C
C
= 1 mF (MLCC)
= 1 mF (MLCC)
IN
IN
Thermal Shutdown
out
out
Short Circuit
V
IN
V
OUT
I
OUT
10 ms / div
5 ms / div
Figure 47. Turn−on/off − Slow Rising VIN
Figure 48. Short Circuit and Thermal
Shutdown
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12
NCP703
APPLICATIONS INFORMATION
General
The NCP703 is a high performance 300 mA Low Dropout
Linear Regulator. This device delivers excellent noise and
dynamic performance. Thanks to its adaptive ground current
feature the device consumes only 12 mA of quiescent current
at no−load condition. The regulator features ultra−low noise
of 13 mVRMS, PSRR of 68 dB at 1 kHz and very good
load/line transient performance. Such excellent dynamic
parameters and small package size make the device an ideal
choice for powering the precision analog and noise sensitive
circuitry in portable applications. The LDO achieves this
ultra low noise level output without the need for a noise
bypass capacitor. A logic EN input provides ON/OFF control
of the output voltage. When the EN is low the device consumes
as low as typ. 120 nA from the IN pin. The device is fully
protected in case of output overload, output short circuit
condition and overheating, assuring a very robust design.
Figure 49. Capacitance Change vs. DC Bias
There is no requirement for the minimum value of
Equivalent Series Resistance (ESR) for the C
but the
OUT
maximum value of ESR should be less than 900 mΩ. Larger
output capacitors and lower ESR could improve the load
transient response or high frequency PSRR as shown in
typical characteristics. It is not recommended to use
tantalum capacitors on theoutput due to their large ESR. The
equivalent series resistance of tantalum capacitors is also
strongly dependent on the temperature, increasing at low
temperature. The tantalum capacitors are generally more
costly than ceramic capacitors.
Input Capacitor Selection (CIN)
It is recommended to connect a minimum of 1 mF Ceramic
X5R or X7R capacitor close to the IN pin of the device. This
capacitor will provide a low impedance path for unwanted
AC signals or noise modulated onto constant input voltage.
There is no requirement for the min. /max. ESR of the input
capacitor but it is recommended to use ceramic capacitors
for their low ESR and ESL. A good input capacitor will limit
the influence of input trace inductance and source resistance
during sudden load current changes. Larger input capacitor
may be necessary if fast and large load transients are
encountered in the application.
No−load Operation
The regulator remains stable and regulates the output
voltage properly within the 2% tolerance limits even with
no external load applied to the output.
Output Decoupling (COUT)
Enable Operation
The NCP703 requires an output capacitor connected as
close as possible to the output pin of the regulator. The
recommended capacitor value is 1 mF and X7R or X5R
dielectric due to its low capacitance variations over the
specified temperature range. The NCP703 is designed to
remain stable with minimum effective capacitance of 0.1 mF
to account for changes with temperature, DC bias and
package size. Especially for small package size capacitors
such as 0402 the effective capacitance drops rapidly with the
applied DC bias. Refer to the Figure 49, for the capacitance
vs. package size and DC bias voltage dependence.
The EN pin is used to enable/disable the LDO and to
deactivate/activate the active discharge function.
If the EN pin voltage is <0.4 V the device is guaranteed to
be disabled. The pass transistor is turned−off so that there is
virtually no current flow between the IN and OUT. The
active discharge transistor is active so that the output voltage
V
OUT
is pulled to GND through a 320 Ω resistor. In the
disable state the device consumes as low as typ. 120 nA from
the V .
IN
If the EN pin voltage >0.9 V the device is guaranteed to
be enabled. The NCP703 regulates the output voltage and
the active discharge transistor is turned−off.
www.onsemi.com
13
NCP703
APPLICATIONS INFORMATION
Thermal Shutdown
When the die temperature exceeds the Thermal Shutdown
The EN pin has internal pull−down current source with
typ. value of 110 nA which assures that the device is
turned−off when the EN pin is not connected. Build in 2 mV
hysteresis into the EN prevents from periodic on/off
oscillations that can occur due to noise.
threshold (T − 160°C typical), Thermal Shutdown event
SD
is detected and the device is disabled. The IC will remain in
this state until the die temperature decreases below the
Thermal Shutdown Reset threshold (T
− 140°C typical).
In the case where the EN function isn’t required the EN
should be tied directly to IN.
SDU
Once the IC temperature falls below the 140°C the LDO is
enabled again. The thermal shutdown feature provides the
protection from a catastrophic device failure due to
accidental overheating. This protection is not intended to be
used as a substitute for proper heat sinking. For reliable
operation junction temperature should be limited to +125°C
maximum.
Undervoltage Lockout
The internal UVLO circuitry assures that the device
becomes disabled when the V falls below typ. 1.5 V. When
IN
the V voltage ramps−up the NCP703 becomes enabled, if
IN
V
IN
rises above typ. 1.6 V. The 100 mV hysteresis prevents
from on/off oscillations that can occur due to noise on V
line.
IN
Power Dissipation
As power dissipated in the NCP703 increases, it might
become necessary to provide some thermal relief. The
maximum power dissipation supported by the device is
dependent upon board design and layout. Mounting pad
configuration on the PCB, the board material, and the
ambient temperature affect the rate of junction temperature
rise for the part.
Output Current Limit
Output Current is internally limited within the IC to a
typical 490 mA. The NCP703 will source this amount of
current if the output voltage drops down to 90% of the
nominal V . When the Output Voltage is directly shorted
OUT
to ground (V
= 0 V), the short circuit protection will
OUT
limit the output current to 520 mA (typ). The current limit
and short circuit protection will work properly up to V
The maximum power dissipation the NCP703 can handle
is given by:
=
IN
5.5 V at T = 25°C. There is no limitation for the short circuit
A
o
ƪ
ƫ
) 125 C * TA
duration.
(eq. 1)
PD(MAX)
+
qJA
Internal Soft−Start circuit
The power dissipated by the NCP703 for given
application conditions can be calculated from the following
equations:
NCP703 contains an internal soft−start circuitry to protect
against large inrush currents which could otherwise flow
during the start−up of the regulator. Soft−start feature
protects against power bus disturbances and assures a
controlled and monotonic rise of the output voltage.
ǒ
Ǔ
ǒ
Ǔ
(eq. 2)
PD [ VIN IGND@IOUT ) IOUT VIN * VOUT
450
0.50
P , T = 25°C, 2 OZ Cu
D(MAX) A
400
350
300
250
200
150
0.45
0.40
0.35
0.30
P
, T = 25°C, 1 OZ Cu
A
D(MAX)
q
q
, 1 OZ Cu
JA
JA
, 2 OZ Cu
500
0.25
0.20
0
100
200
300
400
600
700
2
PCB Copper Area (mm )
Figure 50. qJA and PD(MAX) vs. Copper Area (TSOP−5)
www.onsemi.com
14
NCP703
APPLICATIONS INFORMATION
400
350
300
250
200
150
100
0.90
0.80
0.70
0.60
0.50
P
, T = 25°C, 2 OZ Cu
A
D(MAX)
P
, T = 25°C, 1 OZ Cu
D(MAX) A
q
, 1 OZ Cu
700
JA
0.40
0.30
q
, 2 OZ Cu
JA
0
100
200
300
400
500
600
800
2
PCB Copper Area (mm )
Figure 51. qJA vs. Copper Area (XDFN6)
Reverse Current
Output Noise
The PMOS pass transistor has an inherent body diode
which will be forward biased in the case that V > V .
The IC is designed for ultra−low noise output voltage
without external noise filter capacitor (C ). Figures 3 − 6
OUT
IN
nr
Due to this fact in cases, where the extended reverse current
condition can be anticipated the device may require
additional external protection.
shows NCP703 noise performance. Generally the noise
performance in the indicated frequency range improves with
increasing output current.
Although even at I
= 1 mA the noise levels are below
OUT
Load Regulation
20 mV
.
RMS
The NCP703 features very good load regulation of
typically 6 mV in 0 mA to 300 mA range. In order to achieve
this very good load regulation a special attention to PCB
design is necessary. The trace resistance from the OUT pin
to the point of load can easily approach 100 mΩ which will
cause 30 mV voltage drop at full load current, deteriorating
the excellent load regulation.
Turn−On Time
The turn−on time is defined as the time period from EN
assertion to the point in which V will reach 98% of its
nominal value. This time is dependent on various
application conditions such as V , C , T .
OUT
OUT(NOM) OUT
A
PCB Layout Recommendations
Line Regulation
The IC features very good line regulation of 0.6 mV/V
To obtain good transient performance and good regulation
characteristics place C and C capacitors close to the
IN
OUT
measured from V = V
operated applications it may be important that the line
+ 0.5 V to 5.5 V. For battery
device pins and make the PCB traces wide. In order to
minimize the solution size, use 0402 capacitors. Larger
copper area connected to the pins will also improve the
device thermal resistance. The actual power dissipation can
be calculated from Equation 2.
IN
OUT
regulation from V = V
+ 0.5 V up to 4.5 V is only
IN
OUT
0.45 mV/V.
Power Supply Rejection Ratio
The NCP703 features very good Power Supply Rejection
ratio. If desired the PSRR at higher frequencies in the range
100 kHz – 10 MHz can be tuned by the selection of C
capacitor and proper PCB layout.
OUT
www.onsemi.com
15
NCP703
ORDERING INFORMATION
Device
†
Voltage Option
1.8 V
Marking
Package
Shipping
NCP703MX18TCG
NCP703MX28TCG
NCP703MX30TCG
NCP703MX33TCG
NCP703SN18T1G
NCP703SN19T1G
NCP703SN28T1G
NCP703SN30T1G
NCP703SN33T1G
NCP703SN35T1G
J
2.8 V
K
XDFN6
3000 / Tape & Reel
3.0 V
L
3.3 V
P
1.8 V
AEC
AEG
AED
AEE
AEF
AEH
1.9 V
2.8 V
TSOP5
3000 / Tape & Reel
3.0 V
3.3 V
3.5 V
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
www.onsemi.com
16
NCP703
PACKAGE DIMENSIONS
XDFN6 1.5x1.5, 0.5P
CASE 711AE
ISSUE B
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.10 AND 0.20mm FROM TERMINAL TIP.
L
D
A
B
L1
DETAIL A
MILLIMETERS
ALTERNATE TERMINAL
CONSTRUCTIONS
DIM
A
MIN
0.35
0.00
MAX
0.45
0.05
E
PIN ONE
A1
A3
b
REFERENCE
0.13 REF
EXPOSED Cu
MOLD CMPD
0.20
0.30
2X
0.10
C
1.50 BSC
D
E
1.50 BSC
0.50 BSC
e
2X
0.10
C
L
0.40
---
0.60
0.15
0.70
TOP VIEW
L1
L2
DETAIL B
0.50
ALTERNATE
A
DETAIL B
CONSTRUCTIONS
0.05
0.05
C
C
A3
A1
RECOMMENDED
MOUNTING FOOTPRINT*
5X
0.73
SEATING
PLANE
C
6X
SIDE VIEW
0.35
DETAIL A
1
e
5X
L
1.80
3
L2
0.50
PITCH
0.83
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
6
4
6X b
0.10
0.05
C
C
A
B
NOTE 3
BOTTOM VIEW
www.onsemi.com
17
NCP703
PACKAGE DIMENSIONS
TSOP−5
CASE 483
ISSUE M
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
NOTE 5
5X
D
2. CONTROLLING DIMENSION: MILLIMETERS.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH
THICKNESS. MINIMUM LEAD THICKNESS IS THE
MINIMUM THICKNESS OF BASE MATERIAL.
4. DIMENSIONS A AND B DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR GATE BURRS. MOLD
FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT
EXCEED 0.15 PER SIDE. DIMENSION A.
5. OPTIONAL CONSTRUCTION: AN ADDITIONAL
TRIMMED LEAD IS ALLOWED IN THIS LOCATION.
TRIMMED LEAD NOT TO EXTEND MORE THAN 0.2
FROM BODY.
0.20 C A B
2X
0.10
T
M
5
4
3
2X
0.20
T
B
S
1
2
K
B
A
DETAIL Z
G
A
MILLIMETERS
TOP VIEW
DIM
A
B
C
D
G
H
J
K
M
S
MIN
2.85
1.35
0.90
0.25
MAX
3.15
1.65
1.10
0.50
DETAIL Z
J
0.95 BSC
C
0.01
0.10
0.20
0
0.10
0.26
0.60
0.05
H
SEATING
PLANE
END VIEW
C
10
3.00
_
_
SIDE VIEW
2.50
SOLDERING FOOTPRINT*
1.9
0.074
0.95
0.037
2.4
0.094
1.0
0.039
0.7
0.028
mm
inches
ǒ
Ǔ
SCALE 10:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
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coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
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