NCS2552SNT1G [ONSEMI]
750 MHz Voltage Feedback Operational Amplifier w/ Fast Disable;
| 型号： | NCS2552SNT1G |
| 厂家： | 
ONSEMI |
| 描述： | 750 MHz Voltage Feedback Operational Amplifier w/ Fast Disable 放大器 光电二极管 |
| 文件： | 总14页 (文件大小：361K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
NCS2552
750 MHz Voltage
Feedback Op Amp with
Fast Enable Feature
NCS2552 is a 750 MHz voltage feedback monolithic operational
amplifier featuring high slew rate and low differential gain and phase
error. The voltage feedback architecture allows for a superior
bandwidth and low power consumption. This device features an
enable pin.
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MARKING
DIAGRAM
Features
6
SOT23−6
(TSOP−6)
• −3.0 dB Small Signal BW (A = +2.0, V = 0.5 V ) 750 MHz Typ
V
O
p−p
YF2AYW
6
• Slew Rate 1700 V/ms
• Fast Enable Time 5.0 ns
• Supply Current 13 mA
• Input Referred Voltage Noise 5.0 nV/ Hz
• THD −64 dBc (f = 5.0 MHz, V = 2.0 V
• Output Current 100 mA
• Pin Compatible with EL5157, AD8057
• This is a Pb−Free Device
G
SN SUFFIX
1
CASE 318G
1
Ǹ
YF2, N2552 = NCS2552
A
Y
W
G
= Assembly Location
= Year
= Work Week
= Pb−Free Package
)
p−p
O
Applications
SOT23−6 PINOUT
• Line Drivers
• Radar/Communication Receivers
OUT
1
2
6
5
4
V
CC
V
EN
EE
−
3
0
+IN
3
−IN
(Top View)
V
= 2.0 V
PP
OUT
−3
−6
−9
V
= 1.0 V
PP
OUT
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 12 of this data sheet.
V
= 0.5 V
PP
OUT
Gain = +2
V
R
= ±5V
= 150W
S
−12
−15
F
R = 150W
L
1k
10k
100k
1M
10M 100M
1G
10G
FREQUENCY (Hz)
Figure 1. Frequency Response:
Gain (dB) vs. Frequency Av = +2.0
©
Semiconductor Components Industries, LLC, 2006
1
Publication Order Number:
May, 2006 − Rev. 1
NCS2552/D
NCS2552
PIN FUNCTION DESCRIPTION
Pin
(SOT23/SC70)
Symbol
Function
Equivalent Circuit
V
V
1
OUT
Output
CC
ESD
OUT
EE
2
3
V
Negative Power Supply
EE
V
+IN
Non−inverted Input
CC
ESD
ESD
−IN
+IN
V
EE
4
6
5
−IN
Inverted Input
Positive Power Supply
Enable
See Above
V
CC
V
EN
CC
ESD
EN
V
EE
ENABLE PIN TRUTH TABLE
High
Low*
Enable
Disabled
Enabled
*Default open state
V
CC
−IN
+IN
OUT
C
C
V
EE
Figure 2. Simplified Device Schematic
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2
NCS2552
ATTRIBUTES
Characteristics
Value
ESD
Human Body Model
Machine Model
Charged Device Model
2.0 kV
200 V
1.0 kV
Moisture Sensitivity (Note 1)
Level 1
Flammability Rating
Oxygen Index: 28 to 34
UL 94 V−0 @ 0.125 in
1. For additional information, see Application Note AND8003/D.
MAXIMUM RATINGS
Parameter
Symbol
Rating
Unit
Vdc
Vdc
Vdc
mA
°C
Power Supply Voltage
Input Voltage Range
V
11
S
V
vV
vV
I
S
S
Input Differential Voltage Range
Output Current
V
ID
O
I
100
150
Maximum Junction Temperature (Note 2)
Operating Ambient Temperature
Storage Temperature Range
Power Dissipation
T
J
T
A
−40 to +85
−60 to +150
(See Graph)
158
°C
T
stg
°C
P
mW
°C/W
D
Thermal Resistance, Junction−to−Air
R
q
JA
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
2. Power dissipation must be considered to ensure maximum junction temperature (T ) is not exceeded.
J
MAXIMUM POWER DISSIPATION
The maximum power that can be safely dissipated is
1400
limited by the associated rise in junction temperature. For
the plastic packages, the maximum safe junction
1200
temperature is 150°C. If the maximum is exceeded
momentarily, proper circuit operation will be restored as
soon as the die temperature is reduced. Leaving the device
in the “overheated’’ condition for an extended period can
result in device damage.
1000
800
600
400
200
0
−50 −25
0
25
50
75 100 125
15
AMBIENT TEMPERATURE (°C)
Figure 3. Power Dissipation vs. Temperature
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3
NCS2552
AC ELECTRICAL CHARACTERISTICS (V = +5.0 V, V = −5.0 V, T = −40°C to +85°C, R = 150 W to GND, R = 150 W,
CC
EE
A
L
F
A
V
= +2.0, Enable is left open, unless otherwise specified).
Symbol
Characteristic
Conditions
Min
Typ
Max
Unit
FREQUENCY DOMAIN PERFORMANCE
BW
Bandwidth
MHz
3.0 dB Small Signal
3.0 dB Large Signal
A
A
V
= +2.0, V = 0.5 V
750
350
V
O
p−p
p−p
= +2.0, V = 2.0 V
O
GF
0.1 dB Gain Flatness
Bandwidth
A
V
= +2.0
40
MHz
0.1dB
dG
dP
Differential Gain
A
= +2.0, R = 150 W, f = 3.58 MHz
0.07
0.01
%
V
L
Differential Phase
A
V
= +2.0, R = 150 W, f = 3.58 MHz
°
L
TIME DOMAIN RESPONSE
SR
Slew Rate
A
= +2.0, V
= +2.0, V
= 2.0 V
= 2.0 V
1700
V/ms
V
step
t
Settling Time
0.1%
ns
s
A
V
10
2.0
5.0
15
step
t t
Rise and Fall Time
Turn−on Time
(10%−90%) A = +2.0, V = 2.0 V
step
ns
ns
ns
r
f
V
t
ON
t
Turn−off Time
OFF
HARMONIC/NOISE PERFORMANCE
THD
HD2
HD3
IP3
Total Harmonic Distortion
2nd Harmonic Distortion
3rd Harmonic Distortion
Third−Order Intercept
f = 5.0 MHz, V = 2.0 V
−64
−65
−75
40
dB
dBc
dBc
dBm
dBc
O
p−p
p−p
p−p
p−p
p−p
f = 5.0 MHz, V = 2.0 V
O
f = 5.0 MHz, V = 2.0 V
O
f = 10 MHz, V = 1.0 V
O
SFDR
Spurious−Free Dynamic
f = 5.0 MHz, V = 2.0 V
55
O
Range
e
i
Input Referred Voltage Noise
Input Referred Current Noise
f = 1.0 MHz
f = 1.0 MHz
5.0
4.0
Ǹ
N
nVń Hz
Ǹ
N
pAń Hz
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4
NCS2552
DC ELECTRICAL CHARACTERISTICS (V = +5.0 V, V = −5.0 V, T = −40°C to +85°C, R = 150 W to GND, R = 150 W,
CC
EE
A
L
F
A
V
= +2.0, Enable is left open, unless otherwise specified).Closed Loop
Open Loop
Symbol
Characteristic
Conditions
Min
Typ
Max
Unit
DC PERFORMANCE
V
Input Offset Voltage
−10
0
+10
mV
IO
DV /DT
Input Offset Voltage
6.0
mV/°C
IO
Temperature Coefficient
I
Input Bias Current
V
V
= 0 V
= 0 V
"3.2
"40
"20
mA
IB
O
O
DI /DT
IB
Input Bias Current
nA/°C
Temperature Coefficient
V
Input High Voltage (Enable)
(Note 3)
3.0
V
V
IH
V
Input Low Voltage (Enable)
(Note 3)
1.0
IL
INPUT CHARACTERISTICS
V
Input Common Mode Voltage
Range (Note 3)
"3.0
"3.2
50
V
CM
CMRR
Common Mode Rejection
Ratio
(See Graph)
40
dB
MW
pF
R
C
Input Resistance
4.5
IN
Differential Input
Capacitance
1.0
IN
OUTPUT CHARACTERISTICS
R
OUT
Output Resistance
Closed Loop
Open Loop
0.1
13
W
V
Output Voltage Range
Output Current
"3.0
"50
"4.0
V
O
I
"100
mA
O
POWER SUPPLY
V
Operating Voltage Supply
10
13
V
S
I
Power Supply Current −
Enabled
5.0
40
17
mA
S,ON
I
Power Supply Current −
Disabled
0.5
56
0.8
mA
dB
S,OFF
PSRR
Power Supply Rejection
Ratio
(See Graph)
3. Guaranteed by design and/or characterization.
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5
NCS2552
AC ELECTRICAL CHARACTERISTICS (V = +2.5 V, V = −2.5 V, T = −40°C to +85°C, R = 150 W to GND, R = 150 W,
CC
EE
A
L
F
A
V
= +2.0, Enable is left open, unless otherwise specified).
Symbol
Characteristic
Conditions
Min
Typ
Max
Unit
FREQUENCY DOMAIN PERFORMANCE
BW
Bandwidth
MHz
3.0 dB Small Signal
3.0 dB Large Signal
A
A
V
= +2.0, V = 0.5 V
550
200
V
O
p−p
p−p
= +2.0, V = 1.0 V
O
GF
0.1 dB Gain Flatness
Bandwidth
A
V
= +2.0
35
MHz
0.1dB
dG
dP
Differential Gain
A
= +2.0, R = 150 W, f = 3.58 MHz
0.07
0.02
%
V
L
Differential Phase
A
V
= +2.0, R = 150 W, f = 3.58 MHz
°
L
TIME DOMAIN RESPONSE
SR
Slew Rate
A
= +2.0, V
= +2.0, V
= 1.0 V
= 1.0 V
900
V/ms
V
step
t
Settling Time
0.1%
ns
s
A
V
10
1.7
5.0
15
step
t t
Rise and Fall Time
Turn−on Time
(10%−90%) A = +2.0, V = 1.0 V
step
ns
ns
ns
r
f
V
t
ON
t
Turn−off Time
OFF
HARMONIC/NOISE PERFORMANCE
THD
HD2
HD3
IP3
Total Harmonic Distortion
2nd Harmonic Distortion
3rd Harmonic Distortion
Third−Order Intercept
f = 5.0 MHz, V = 1.0 V
−60
−65
−63
35
dB
dBc
dBc
dBm
dBc
O
p−p
p−p
p−p
p−p
p−p
f = 5.0 MHz, V = 1.0 V
O
f = 5.0 MHz, V = 1.0 V
O
f = 10 MHz, V = 0.5 V
O
SFDR
Spurious−Free Dynamic
f = 5.0 MHz, V = 1.0 V
63
O
Range
e
i
Input Referred Voltage Noise
Input Referred Current Noise
f = 1.0 MHz
f = 1.0 MHz
5.0
4.0
Ǹ
N
nVń Hz
Ǹ
N
pAń Hz
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6
NCS2552
DC ELECTRICAL CHARACTERISTICS (V = +2.5 V, V = −2.5 V, T = −40°C to +85°C, R = 150 W to GND, R = 150 W,
CC
EE
A
L
F
A
V
= +2.0, Enable is left open, unless otherwise specified).
Symbol
Characteristic
Conditions
Min
Typ
Max
Unit
DC PERFORMANCE
V
Input Offset Voltage
−10
0
+10
mV
IO
DV /DT
Input Offset Voltage
6.0
mV/°C
IO
Temperature Coefficient
I
Input Bias Current
V
V
= 0 V
= 0 V
"3.2
"40
"20
mA
IB
O
O
DI /DT
IB
Input Bias Current
nA/°C
Temperature Coefficient
V
Input High Voltage (Enable)
(Note 3)
1.5
V
V
IH
V
Input Low Voltage (Enable)
(Note 3)
0.5
IL
INPUT CHARACTERISTICS
V
Input Common Mode Voltage
Range (Note 3)
"1.1
"1.6
50
V
CM
CMRR
Common Mode Rejection
Ratio
(See Graph)
40
dB
MW
pF
R
C
Input Resistance
4.5
IN
Differential Input
Capacitance
1.0
IN
OUTPUT CHARACTERISTICS
R
OUT
Output Resistance
Closed Loop
Open Loop
0.1
13
W
V
Output Voltage Range
Output Current
"1.1
"50
"1.6
V
O
I
"100
mA
O
POWER SUPPLY
V
Operating Voltage Supply
5.0
V
S
I
Power Supply Current −
Enabled
5.0
40
11.5
17
mA
S,ON
I
Power Supply Current −
Disabled
0.5
56
0.8
mA
dB
S,OFF
PSRR
Power Supply Rejection
Ratio
(See Graph)
4. Guaranteed by design and/or characterization.
V
+
−
IN
V
OUT
R
L
R
F
R
F
Figure 4. Typical Test Setup
(AV = +2.0, RF = 1.0 kW, RL = 100 W)
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7
NCS2552
3
12
9
V
= 0.5 V
PP
OUT
0
6
V
= 2.0 V
PP
OUT
3
−3
0
V
= 1.0 V
PP
OUT
−6
−9
−3
−6
−9
−12
V
= 0.5 V
PP
OUT
V
= 1.0 V
PP
OUT
Gain = +2
Gain = +1
V
= ±5V
V
= ±5V
S
S
V
= 0.7 V
OUT PP
−12
−15
R
F
= 150W
R
F
= 150W
−15
−18
10k
R = 150W
L
R = 150W
L
1k
10k
100k
1M
10M 100M
1G
10G
100k
1M
10M
100M
1G
10G
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 5. Frequency Response:
Gain (dB) vs. Frequency
Av = +2.0
Figure 6. Frequency Response:
Gain (dB) vs. Frequency
Av = +1.0
6
3
12
9
Gain = +1
V
= 1.0 V
OUT
PP
6
3
Gain = +1
0
Gain = +2
= 1.0 V
0
−3
−6
−9
V
OUT
PP
−3
−6
−9
Gain = +2
= 2.0 V
V
OUT
PP
V
V
= 0.5 V
PP
= ±5V
OUT
Gain = +2
100M
V
R
= ±5V
= 150W
S
S
−12
−15
−18
−12
−15
R = 150W
R = 150W
F
F
R = 150W
L
L
100k
1M
10M
FREQUENCY (Hz)
100M
1G
10k
100k
1M
10M
1G
10G
FREQUENCY (Hz)
Figure 7. Large Signal Frequency Response
Gain (dB) vs. Frequency
Figure 8. Small Signal Frequency Response
Gain (dB) vs. Frequency
V
= ±5V
V = ±5V
S
S
Figure 9. Small Signal Step Response
Vertical: 20 mV/div
Figure 10. Large Signal Step Response
Vertical: 1 V/div
Horizontal: 3 ns/div
Horizontal: 3 ns/div
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8
NCS2552
−40
−45
−40
−45
Gain = +2
Gain = +2
Freq = 5 MHz
V
V
= 2 V
= ±5V
OUT
PP
V
= ±5V
S
S
−50
−55
−60
−65
−70
−50
−55
−60
−65
R
F
= 150W
R
F
= 150W
R = 150W
L
R = 150W
L
THD
THD
HD2
HD3
HD2
−70
−75
−80
−75
−80
HD3
3
0
0.5
1
1.5
2
2.5
(V
3.5
4
4.5
1
10
FREQUENCY (MHz)
100
V
)
OUT
PP
Figure 12. THD, HD2, HD3 vs. Output Voltage
Figure 11. THD, HD2, HD3 vs. Frequency
50
40
30
20
10
0
−20
−25
−30
−35
−40
−45
V
= ±5V
V
= ±5V
S
S
−50
−55
10
100
1k
10k
1M
10k
100k
1M
10M
100M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 13. Input Referred Voltage Noise vs.
Frequency
Figure 14. CMRR vs. Frequency
0.08
0.06
0.04
0.02
0
0
20MHz
V
= ±5V
Gain = +2
= ±5V
S
−10
V
S
10MHz
R
F
= 150W
−20
−30
−40
−50
R = 150W
L
3.58MHz
4.43MHz
−0.02
−0.04
−60
−70
−0.06
−0.08
10k
100k
1M
10M
100M
−0.8 −0.6 −0.4 −0.2
0
0.2
0.4
0.6 0.8
OFFSET VOLTAGE (V)
FREQUENCY (Hz)
Figure 15. PSRR vs. Frequency
Figure 16. Differential Gain
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9
NCS2552
14
13
0.03
0.02
20MHz
85°C
25°C
12
11
10MHz
−40°C
0.01
0
3.58MHz
10
9
4.43MHz
−0.01
Gain = +2
8
V
= ±5V
S
−0.02
−0.03
R
F
= 150W
7
R = 150W
L
6
−0.8 −0.6 −0.4 −0.2
0
0.2
0.4
0.6
0.8
4
5
6
7
8
9
10
11
OFFSET VOLTAGE (V)
POWER SUPPLY VOLTAGE (V)
Figure 17. Differential Phase
Figure 18. Supply Current vs. Power Supply
(Enabled)
0.5
0.45
0.4
8
7
85°C
25°C
85°C
25°C
6
5
−40°C
0.35
−40°C
0.3
0.25
0.2
4
3
2
4
5
6
7
8
9
10
11
4
5
6
7
8
9
10
11
POWER SUPPLY VOLTAGE (V)
CURRENT (mA)
Figure 19. Supply Current (Disabled)
Figure 20. Output Voltage Swing vs. Supply
Voltage
12
9
100
10
1
V
= ±5V
10pF
S
6
3
0
100pF
−3
−6
−9
−12
Gain = +2
V
V
= 0.5 V
= ±5V
OUT
PP
0.1
S
47pF
R
F
= 150W
R = 150W
L
0.01
10k
100k
1M
10M
100M
1G
10G
10k
100k
1M
10M
100M
1G
10G
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 21. Closed Loop Output Resistance vs.
Frequency
Figure 22. Frequency Response vs. Capacitive
Load
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NCS2552
Output waveform: Squarewave, 32 MHz, 600 mV
PP
EN
V
= ±5V
S
EN
OUT
OUT
V
= ±5V
Output waveform: Squarewave, 32 MHz, 600 mV
S
PP
Figure 23. Turn ON Time Delay
Figure 24. Turn OFF Time Delay
Vertical: 500 mV/div (Enable), 200 mV/div (Output)
Vertical: 500 mV/div (Enable), 200 mV/div (Output)
Horizontal: 5 ns/div
Horizontal: 5 ns/div
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11
NCS2552
Printed Circuit Board Layout Techniques
to input overdrive voltages above the supplies. The ESD
diodes can support high input currents with current limiting
series resistors. Keep these resistor values as low as possible
since high values degrade both noise performance and
frequency response. Under closed−loop operation, the ESD
diodes have no effect on circuit performance. However,
under certain conditions the ESD diodes will be evident. If
the device is driven into a slewing condition, the ESD diodes
will clamp large differential voltages until the feedback loop
restores closed−loop operation. Also, if the device is
powered down and a large input signal is applied, the ESD
diodes will conduct.
Proper high speed PCB design rules should be used for all
wideband amplifiers as the PCB parasitics can affect the
overall performance. Most important are stray capacitances
at the output and inverting input nodes as it can effect
peaking and bandwidth. A space (3/16″ is plenty) should be
left around the signal lines to minimize coupling. Also,
signal lines connecting the feedback and gain resistors
should be short enough so that their associated inductance
does not cause high frequency gain errors. Line lengths less
than 1/4″ are recommended.
Video Performance
NOTE: Human Body Model for +IN and –IN pins are
rated at 0.8kV while all other pins are rated at
2.0kV.
This device designed to provide good performance with
NTSC, PAL, and HDTV video signals. Best performance is
obtained with back terminated loads as performance is
degraded as the load is increased. The back termination
reduces reflections from the transmission line and
effectively masks transmission line and other parasitic
capacitances from the amplifier output stage.
V
CC
Internal
Circuitry
External
Pin
ESD Protection
All device pins have limited ESD protection using internal
diodes to power supplies as specified in the attributes table
(see Figure 25). These diodes provide moderate protection
V
EE
Figure 25. Internal ESD Protection
ORDERING INFORMATION
†
Device
Package
Shipping
NCS2552SNT1G
SOT23−6 (TSOP−6)
(Pb−Free)
3000 Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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12
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
TSOP−6
CASE 318G−02
ISSUE V
1
DATE 12 JUN 2012
SCALE 2:1
NOTES:
D
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
H
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH. MINIMUM
LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL.
4. DIMENSIONS D AND E1 DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRUSIONS, OR
GATE BURRS SHALL NOT EXCEED 0.15 PER SIDE. DIMENSIONS D
AND E1 ARE DETERMINED AT DATUM H.
6
1
5
4
L2
GAUGE
PLANE
E1
E
5. PIN ONE INDICATOR MUST BE LOCATED IN THE INDICATED ZONE.
2
3
L
MILLIMETERS
SEATING
M
C
NOTE 5
DIM
A
A1
b
c
D
E
E1
e
MIN
0.90
0.01
0.25
0.10
2.90
2.50
1.30
0.85
0.20
NOM
1.00
MAX
1.10
0.10
0.50
0.26
3.10
3.00
1.70
1.05
0.60
PLANE
b
DETAIL Z
e
0.06
0.38
0.18
3.00
c
2.75
A
0.05
1.50
0.95
L
0.40
A1
L2
M
0.25 BSC
−
DETAIL Z
0°
10°
STYLE 1:
STYLE 2:
PIN 1. EMITTER 2
2. BASE 1
STYLE 3:
PIN 1. ENABLE
2. N/C
STYLE 4:
PIN 1. N/C
2. V in
STYLE 5:
PIN 1. EMITTER 2
2. BASE 2
STYLE 6:
PIN 1. DRAIN
2. DRAIN
3. GATE
PIN 1. COLLECTOR
2. COLLECTOR
3. BASE
3. COLLECTOR 1
4. EMITTER 1
5. BASE 2
3. R BOOST
4. Vz
5. V in
6. V out
3. NOT USED
3. COLLECTOR 1
4. EMITTER 1
5. BASE 1
4. SOURCE
5. DRAIN
6. DRAIN
4. GROUND
5. ENABLE
6. LOAD
4. EMITTER
5. COLLECTOR
6. COLLECTOR
6. COLLECTOR 2
6. COLLECTOR 2
STYLE 7:
STYLE 8:
PIN 1. Vbus
2. D(in)
STYLE 9:
STYLE 10:
PIN 1. D(OUT)+
2. GND
STYLE 11:
STYLE 12:
PIN 1. I/O
2. GROUND
3. I/O
PIN 1. COLLECTOR
2. COLLECTOR
3. BASE
PIN 1. LOW VOLTAGE GATE
2. DRAIN
PIN 1. SOURCE 1
2. DRAIN 2
3. D(in)+
4. D(out)+
5. D(out)
6. GND
3. SOURCE
3. D(OUT)−
4. D(IN)−
5. VBUS
6. D(IN)+
3. DRAIN 2
4. N/C
5. COLLECTOR
6. EMITTER
4. DRAIN
4. SOURCE 2
5. GATE 1
4. I/O
5. DRAIN
5. VCC
6. I/O
6. HIGH VOLTAGE GATE
6. DRAIN 1/GATE 2
STYLE 13:
STYLE 14:
STYLE 15:
PIN 1. ANODE
2. SOURCE
3. GATE
STYLE 16:
STYLE 17:
PIN 1. EMITTER
2. BASE
PIN 1. GATE 1
2. SOURCE 2
3. GATE 2
PIN 1. ANODE
2. SOURCE
PIN 1. ANODE/CATHODE
2. BASE
3. GATE
3. EMITTER
3. ANODE/CATHODE
4. ANODE
5. CATHODE
6. COLLECTOR
4. DRAIN 2
5. SOURCE 1
6. DRAIN 1
4. CATHODE/DRAIN
5. CATHODE/DRAIN
6. CATHODE/DRAIN
4. DRAIN
4. COLLECTOR
5. ANODE
5. N/C
6. CATHODE
6. CATHODE
GENERIC
MARKING DIAGRAM*
RECOMMENDED
SOLDERING FOOTPRINT*
6X
0.60
XXXAYWG
XXX MG
G
G
1
1
6X
0.95
3.20
IC
STANDARD
XXX = Specific Device Code
XXX = Specific Device Code
A
Y
W
G
=Assembly Location
= Year
= Work Week
M
G
= Date Code
= Pb−Free Package
0.95
= Pb−Free Package
PITCH
DIMENSIONS: MILLIMETERS
*This information is generic. Please refer to device data
sheet for actual part marking. Pb−Free indicator, “G”
or microdot “G”, may or may not be present. Some
products may not follow the Generic Marking.
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98ASB14888C
TSOP−6
PAGE 1 OF 1
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