NCS29001 [ONSEMI]
LED Backlight Driver; LED背光驱动器
| 型号： | NCS29001 |
| 厂家： | 
ONSEMI |
| 描述： | LED Backlight Driver |
| 文件： | 总16页 (文件大小：208K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
NCS29001
LED Backlight Driver
The NCS29001 is an integrated LED driver used in LCD display
backlighting applications. A configurable bill of materials allows the
designer to create a highly efficient solution for a variety of LCD
screen sizes. The NCS29001 uses a boost type converter to deliver
constant current in a string of LEDs. High accuracy PWM dimming is
supported for a frequency up to 500 Hz . The integrated soft start
function provides excellent control during the power up sequence to
avoid current overshoot. The device protects against output
overvoltage, open / short LED, and thermal overload. The NCS29001
is offered in the cost effective SOIC−14 package.
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MARKING
DIAGRAM
14
14
1
NCS29001G
AWLYWW
Features
SOIC−14 NB
CASE 751A
• 8.5 V to 18 V Input Voltage Range
1
•
1% Vref Voltage Accuracy to set LED Current
• PWM Controlled Dimming
• Soft Start Limits In−Rush Current
• Open Feedback Protection
• Open LED Protection
NCS29001= Specific Device Code
A
WL
Y
= Assembly Location
= Wafer Lot
= Year
WW
G
= Work Week
= Pb−Free Package
• Short LED Protection
• LED String Cathode Short to ground Protection
• Max Duty Cycle Above 90%
• SOIC−14 Package
PIN CONNECTIONS
VIN
GATE
1
14
• This is a Pb−Free Device
Vref
GND
PWMin
RT
2
3
4
5
6
7
13 CS
Typical Application
• TFT−LCD TV Panels
• LCD Monitor Panels
PGND
12
11
NCS29001
PWMout
10 FBN
FBP
9
8
COMP
OVP
STBY
ORDERING INFORMATION
See detailed ordering and shipping information on page 15 of
this data sheet.
© Semiconductor Components Industries, LLC, 2013
1
Publication Order Number:
October, 2013 − Rev. 1
NCS29001/D
NCS29001
Figure 1. Block Diagram
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2
NCS29001
PINOUT ASSIGNMENT
VIN
Vref
1
2
3
14
13
12
GATE
CS
GND
PGND
PWMin
RT
4
5
6
7
NCS29001
11
10
9
PMWout
FBN
FBP
COMP
OVP
STBY
8
Figure 2. NSC29001 Pinout
PIN DESCRIPTION
Pin #
Symbol
VIN
Type
Input
Description
1
2
VIN supply input. Small 1.0 mF low ESR bypass capacitor required from VIN to GND.
VREF
Output
5 V / 10 mA reference voltage. Small 1.0 mF low ESR bypass capacitor required from VREF to
GND.
3
4
5
6
GND
PWMin
RT
Ground
Output
Output
Input
Analog ground.
PWM dimming control input.
The resistor connected between RT and GND sets the switching frequency
FBP
The reference voltage for the feedback (FBN). Reference level can be adjusted from 0.5 V up to
3.0 V using an external voltage divider.
7
STBY
Input
The converter enters in standby mode when STBY is floating or pulled high. When STBY goes
from low to high the circuit will discharge the capacitors on the COMP pin and keep PWMout high
to discharge the output capacitor. STBY must remain high for 50 ms before the part enters
standby mode.
8
OVP
Output
This pin provides the overvoltage protection for the converter. When the voltage at this pin
exceeds 1.2 V, the boost converter stops immediately and the device enters standby mode.
9
COMP
FBN
Power
Input
Loop compensation pin
10
Feedback pin and LED cathode connection. External resistor from FBN to GND sets the LED
current.
11
12
13
PWMout
PGND
CS
Output
Ground
Power
PWM dimming output driver.
Power ground.
This pin is used to sense the drain current of the external power MOSFET. It includes a built−in
blanking time.
14
GATE
Output
This pin is the output GATE driver for an external N−channel power MOSFET
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3
NCS29001
ATTRIBUTES
Characteristics
Values
ESD protection (all pins)
Human Body Model (HBM) (Note 1)
Machine Model (MM)
2 kV
150 V
Moisture sensitivity (Note 2)
Level 1
Flammability Rating Oxygen Index: 28 to 34
UL 94 V−0 @ 0.125 in
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latch−up Test
1. Human Body Model (HBM), R = 1500 W, C = 100 pF.
2. For additional information, see Application Note AND8003/D.
ABSOLUTE MAXIMUM RATINGS
Rating
V
V
Unit
V
MIN
MAX
V
IN
−0.3
−0.3
−0.3
−0.3
−0.3
−0.3
−0.3
30
PWMin
STBY
FBP
5.5
5.5
5.5
5.5
5.5
5.5
V
V
V
FBN
V
OVP
CS
V
V
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may
affect device reliability.
OPERATING CONDITIONS (T = +25°C)
A
Rating
Min
Typ
Max
18
1
Unit
V
V
IN
8.5
12
VIL_PWMin: PWMin input low voltage
VIH_PWMin: PWMin input high voltage
FBP
V
2
V
0.5
3.0
1
V
VIL_STBY: STBY input low voltage
VIH_STBY: STBY input high voltage
RT clock frequency resistor (Note 3)
Fdim dimming frequency (5 V amplitude)
Ddim dimming duty−cycle
V
2
20
100
3
V
140
300
95
kW
Hz
%
NOTE: With respect to the GND pin.
3. Choose RT to keep clock frequency between 100 kHz and 500 kHz.
THERMAL RATINGS
Parameter
Symbol
Rating
150
Unit
°C/W
°C
Junction to ambient thermal impedance (Note 4)
Maximum Junction Temperature (Note 5)
Operating Ambient Temperature
Storage temperature
R
q
JA
T
J
+150
T
A
−40 to +85
−65 to +150
°C
T
stg
°C
4. Power dissipation must be considered to ensure maximum junction temperature (qJA) is not exceeded.
5. Thermal Pad attached to PCB, 0 lfm airflow, and 76 mm x 76 mm copper area.
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NCS29001
ELECTRICAL SPECIFICATIONS V = 12 V, T
= –40°C to 85°C; typical values are at 25°C
IN
AMB
Symbol
Parameter
Condition
Min
Typ
Max
Unit
VIN (VIN Pin)
I
Operating Supply Current
V
IN
= 12 V; PWMin = 5 V; no load,
STBY = 5 V
5
mA
uA
VIN
I
Shutdown Mode Supply Current
PWMin = GND
Ambient temperature 25°C
STBY = 5 V
12
SHUTDOWN
UVLO
Under Voltage Lockout
Threshold
VIN Rising
7.5
8
8.5
V
DUVLO
UVLO Hysteresis
Startup time
475
mV
ms
T
Time from standby falling edge to
steady−state V operation with 30%
100
startup
boost
dimming pattern − (Note 6)
VREF (VREF Pin)
VREF
Vref voltage
REF bypassed with a 1 mF capacitor to
4.95
5
5.05
V
GND
Line_Reg
Load_Reg
Line Regulation
Load Regulation
Iref output current
V
= 8.5 V to 24 V at I_REF = 10 mA
0.08
0.20
0.6
10
%
mV/mA
mA
IN
0 mA < I_REF < 10 mA at VIN = 12 V
I
(Vref)
VREF bypassed with a 1 mF capacitor
CC
to GND
GATE (GATE, RT Pins)
V
GATE output high voltage
GATE short circuit current
GATE sinking current
V
= 12 V
7.5
10
0.33
0.33
40
15
V
A
OH_GATE
SOURCE
IN
I
0.45
0.45
I
A
SINK
T
RISE
GATE output rise time
Output voltage rise−time @ C = 1 nF,
10−90% of output signal (Note 6)
−
−
ns
L
T
FALL
GATE output fall time
Output voltage fall−time @ C = 1 nF,
90−10% of output signal (Note 6)
20
ns
L
R
Source resistance
Sink resistance
13
6.0
95
W
W
OH
R
OL
LSS_MAX
D
Maximum Duty Cycle
(Note 6)
93
%
F
OSC
Boost Switching Frequency
range
100
500
kHz
DF
Frequency Accuracy
RT pin output voltage
−10
+10
%
V
OSC
V
RT
0.85
1
1.15
PWM DIMMING (PWMin, PWMout Pins)
V
PWMout output high voltage
V
IN
= 12 V
7.5
10
1
15
V
OH_PWMout
DD_DIM
PWMout/PWMin Duty cycle
Tolerance
0.98
1.02
%
T
PWMout output rise time
Output voltage rise−time @ C = 1 nF,
−
−
−
−
2
2
us
us
RISE
FALL
L
10−90% of output signal
T
PWMout output fall time
Output voltage fall−time @ C = 1 nF,
L
90−10% of output signal
I
PWMout short circuit current
PWMout sinking current
Source resistance
15
15
20
20
mA
mA
W
SOURCE
I
SINK
R
270
230
OH
R
Sink resistance
W
OL
6. Guaranteed by characterization and design
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NCS29001
ELECTRICAL SPECIFICATIONS V = 12 V, T
= –40°C to 85°C; typical values are at 25°C
IN
AMB
Symbol
Parameter
Condition
Min
Typ
Max
Unit
CURRENT SENSE (CS Pin)
V
CS
Reference voltage threshold for
current clamp monitoring OCP
comparator
0.5
0.6
V
I
Slope compensation ramp
130
A/s
RAMP
PROTECTION (OVP, FBP, FBN Pins)
V
Output Overvoltage Protection
on OVP pin
1.2
75
75
1.3
V
OVP
V
Short Circuit Protection on OVP
pin
60
60
mV
mV
SCP
V
UVPfb
Output Undervoltage Protection
on FBN
T
Thermal Shutdown
TSD hytheresis
(Note 6)
(Note 6)
140
150
15
160
°C
°C
SD
DT
SD
STANDBY (STBY Pin)
Standby mode delay
T
(Note 6)
50
ms
STANDBY
6. Guaranteed by characterization and design
APPLICATION DIAGRAM
VIN
D1
Inductor
L
V
IN
VIN
IC
C
OUT
NCS29001
R
R
OVP1
OVP2
Q1
1
VIN
GATE
CS
14
13
12
R
sc
2
3
Vref
GND
PGND
RCS
4
5
6
7
PWMin
RT
PWMout
FBN
11
10
9
Rref1
Rref2
Q1
Q2
R
T
FBP
COMP
OVP
R
comp
STBY
8
Backlight O
Standby
C
C
comp2
comp
Figure 3. Application Schematic
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NCS29001
APPLICATION CONDITIONS
Symbol
VIN
Parameter
VIN pin voltage
Condition
Min
8.5
8.5
50
Typ
Max
18
Unit
12
V
IC
VIN
Inductor input voltage
Output voltage range
80
Inductor
V
OUT
V
/VIN Max = 5
Inductor
240
V
OUT
VIN
= 8.5 to 24 V | V
= 50 to 80 V
= 80 to 130 V
= 130 to 240 V
Inductor
Inductor
Inductor
OUT
VIN
= 24 to 50 V | V
OUT
OUT
VIN
= 50 to 80 V | V
h
Peak efficiency
VIN = 12 V, V
= 130 V, I
= 240 V, I
= 200 mA
= 200 mA
95
95
%
%
IC
OUT
OUT
OUT
OUT
VIN = 12 V, V
IC
Dς
Output Voltage Accuracy
including voltage ripple, from −40°C to 85°C,
−2
2
ΟΥΤ
VIN = 8.5 V to 18 V
IC
POWER UP SEQUENCE
Standby
VIN
UVLO
PWMin
Vcomp
PWMout
GATE
Figure 4. Soft Start Power Up from Standby
For the device to begin the soft start sequence the VIN pin voltage needs to be above the UVLO threshold and the OVP pin
voltage needs to be above the V threshold. From standby mode soft start will begin when STBY pin goes low and PWMin
SCP
pin goes high and lasts for a fixed number of clock cycles. This ensures that smooth start up if the device is powered on from
standby with a PWM input.
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NCS29001
STANDBY ON AND OFF SEQUENCE
Discharging the
output capacitor
Vout
Standby
VIN
UVLO
Vin IC
PWMin
Vfb & I(LED)
PWMout
GATE
Figure 5. Entering Standby Mode
The STBY pin contains an internal 5 MW pull−up resistor to VREF. This resistor limits current consumption when the device
is in standby mode and also ensures the device will remain in standby if the STBY pin is left floating.
When the STBY goes high the boost converter will stop switching and the PWMout pin will switch, or remain high for 50 ms.
This allows the output capacitor to discharge and the LED current to fall to zero. The device will be in a low power standby
mode and can begin soft start from the next enable sequence.
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NCS29001
VCC > UVLO
POR
Control logic,
V1,V2,V4,Vref
Oscilator enabled
STBY falling
edge?
STBY rising
edge?
Y
N
STBY,10 uA
SCP&D1 Open?
N
OVP
Soft Start,
charging Rc,Cc
throug Iss
PWM Hi
Y
N
PWMO high
Y
VFBN surpass
VFBP?
FUVP?
Y
Y, Fault1
N
Delay 100uS Max
during Soft start,
and reduced delay
time for normal
operation
OTA take
control
PWM Dimming
‘
N
Fault 2
DRV goes low immediately,
PWMDout keeps high
discharging the output
capacitor,
DRV goes low immediately,
PWMDout goes low
immediately
Cc being discharged,
Delay 50 ms
STBY rising
edge?
DRV grouded, PWMO
grounded
Y
Figure 6. Power Up State Machine
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NCS29001
SOFT START WITH PWM INPUT
Figure 7 below shows an example of a soft start when the device is powered up from standby with a PWM input. The PWM
signal here is at 100 Hz with a duty cycle of 30%. In this case the LED reaches 100% of its programmed value in 100 ms. This
time can be decreased if the PWM signal runs at a higher duty cycle.
Soft start with PWM dimming active
100ms with 30% dimming duty cycle,
100Hz
PWMin and PWMout
Vfbn & LED
current
LED current reaches 100%
when Vfbn crosses Vfbp
Vfbp
Vcomp is kept during
dimming off
Back light LED brightness gradually
rise to the set value
Figure 7. Soft Start with PWM Input
GATE AND PWMOUT PIN DRIVER CIRCUIT
Since external transistors are required for the boost converter and PWM dimming functions, the device contains an internal
10 V regulator to drive the gate of these transistors. In the case of the PWM transistor this also functions as a level translator
for the PWMin input pin. When selecting external components it is important that the transistor has enough gate drive to ensure
low R
for the expected current.
DS(on)
It should be noted that the internal 10 V regulator will start to drop when the VIN voltage is sufficiently low. When the V
voltage is 8.5 V the gate drivers will be limited to around 7.7 V.
IN
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NCS29001
VREF REFERENCE VOLTAGE
The device contains an accurate 5 V reference that can supply up to 10 mA and can be accessed through the VREF pin. It
can be used to program the LED feedback voltage by using a resistor divider on the FBP pin. This reference is only active when
STBY = low. When the device is in standby mode the VREF pin voltage will drop to 4.2 V typical with a minimum of 3.5 V.
The VREF will return to 5 V immediately when STBY is driven high.
MINIMUM ON & OFF TIME
If the steady state duty cycle and switching frequency combine to generate short Ton times (low VOUT/VIN converter ratio),
the converter will skip some cycles to regulate V
which will increase output voltage ripple. The timing limit is set by the
OUT
intrinsic loop propagation delay and the switching frequency will be limited by the minimum ON time and OFF time.
THE INDUCTOR SELECTION
For a given application, it is necessary to know the input voltage at the inductor (VIN
), the output current (I
)
INDUCTOR
OUT
set by RFBN and the voltage on the FBP pin, and the switching frequency (F ). The inductor can be chosen using the formula
sw
below:
2
VIN
1
(eq. 1)
ǒV Ǔ
OUT * VIN
ǒ Ǔ
L
max t
2 Fsw IOUT
VOUT
The minimal inductor value is determined with the desired peak current flowing through the inductor. Using the chosen
inductor value the steady state duty cycle and peak inductor current can be calculated:
Ǹ
ǒV
Ǔ
OUT * VIN
2 L Fsw IOUT
(eq. 2)
D +
VIN
And the inductor peak current is now:
2 IOUT (VOUT * VIN)
L Fsw
VIN D
L Fsw
(eq. 3)
+ Ǹ
Ipeak
+
THE CURRENT SENSE RESISTOR
Set a current limit between 2 and 2.5 times the peak inductor current to account for inductor tolerance:
I
limit + 2.5 Ipeak
(eq. 4)
The current limit reference fixed on the over-current protection comparator is V = 0.5 V and the resistance can be calculated
CS
using following the equation:
VCS
RCS
+
(eq. 5)
2.5 Ipeak
SLOPE COMPENSATION
After the current sense resistor is calculated additional calculations are needed for the external slope compensation ramp. Using
the R value the typical slope of the compensation ramp can be calculated:
SENSE
V
OUT * VIN
1
(eq. 6)
Mramp + RSENSE
2
L
Using the typical value for , the external compensation resistor can be calculated as follows:
MRAMP
(eq. 7)
RSC
+
IRAMP
The slope compensation ramp has an offset current, , which is used to calculate the peak ramp current and finally the adjusted
current sense resistor.
IRAMP
(eq. 8)
I
RAMP,peak + IOFF ) D
RSW
CS * RCS IRAMP,peak
V
(eq. 9)
RCS
+
I
limit ) IRAMP,peak
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NCS29001
OUTPUT CAPACITOR and OUTPUT VOLTAGE RIPPLE
Calculating the output voltage ripple will size the output capacitor value. The output voltage ripple equation below takes
into account the parasitic impedance (ESR) of this output capacitor:
ǒ
Ǔ
IOUT 1 * D2
(eq. 10)
DVCOUT
+
) ESR IOUT
COUT Fsw
Ipeak L Fsw
VOUT * VIN
IOUT
(eq. 11)
DVCOUT
+
ǒ
1 *
Ǔ
) ESR IOUT
COUT Fsw
Without taking into account the ESR, the output capacitor becomes:
Ipeak L Fsw
IOUT
(eq. 12)
C
OUT u
ǒ
1 *
Ǔ
DVOUT Fsw
VOUT * VIN
If the ESR value of the selected output capacitor is high, the voltage ripple will increase. The error due to the ESR can be
estimated follow the equation below:
DVOUTESR + ESR Ipeak
(eq. 13)
SIZING THE COMP PIN CAPACITOR
The transistor Q1 is turned ON (reset of the duty cycle) when the Vf of the output current amplifier reaches the control output
voltage V . The control voltage V is simply a reduced voltage out of the follower servicing the voltage on the COMP pin.
c
c
In steady state, at DT , the voltage at the current amplifier output is represented by the equation below:
sw
V
C + Ipeak RCS Gi
(eq. 14)
V
comp + VC ) VOS
(eq. 15)
V
comp
= COMP pin output voltage
V = Voltage Control of the transconductance amplifier
c
V = voltage offset of the transconductance amplifier
os
VIN D RCS Gi
L Fsw
(eq. 16)
Vf +
iEA trise
iEA trise
Vc ) Vos
dv
(eq. 17)
i + C
å Ccomp
+
+
dt
Vcomp
i
t
= 4 mA error amplifier output current capability
= soft start time
EA
rise
V = 0.9 V voltage offset due to the follower
os
So
iEA trise
(eq. 18)
C
comp t
V
C ) VOS
iEA 30 ms
C
comp + 0.7
V
(eq. 19)
D R
G
IN
CS
sw
L ) VOS
L F
During the soft start and with the dimming function activated, the COMP pin voltage is rising during 30 ms within the 100 ms
soft start time so V holds for another during 70 ms afterwards. Attention needs to be brought to the DC voltage rating. As
comp
the capacitor value decreases and the DC voltage increases, the value chosen needs to be
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NCS29001
SIZING THE Rcomp RESISTOR for the LOOP STABILITY
Combining Equations 2 and 16 gives the following expression for I
:
OUT
2
Vf L Fsw
IOUT
+
(eq. 20)
2 ǒV
Ǔ
ǒ
Ǔ2
OUT * VIN RCS Gi
To obtain the small signal equation, partial derivates of the output current are calculated with respect to the control voltage Vc
and the output voltage V
.
OUT
IOUT
VC L Fsw
∂
+
(eq. 21)
V
∂
OUT
ǒV
Ǔ
ǒR G Ǔ2
OUT * VIN
CS
i
2
IOUT
VC L Fsw
IOUT
∂
+
+
(eq. 22)
Ǔ2
ǒ
Ǔ2
V
V
OUT * VIN
∂
OUT
2 ǒV
OUT * VIN RCS Gi
From the AC model below the control to output transfer function can be calculated:
Figure 8. Control to Output Transfer Function
V
OUT(s)
VOUT(s)
IOUT(s)
VC(s)
H(s) +
+
(eq. 23)
(eq. 24)
VC(s)
I(s)
I
OUT(s)
VC(s)
H(s) + ZOUT(s)
1
ǒ
ǒ
Ǔ
Ǔ
ESR ) sC
ESR ) sC
Req
) Req
1 ) s ESR COUT
OUT
(eq. 25)
ZOUT(s) +
+ Req
ǒ
Ǔ
1 ) s COUT ESR ) Req
1
OUT
Where
Rac R1
Rac R1
Req
+
2 ǒV
Ǔ2
ǒ
Ǔ2
OUT * VIN Rcs Gi
V
OUT * VIN
1
R1 +
+
+
(eq. 26)
I
(s)
(s)
2
IOUT
Vc Fsw L
OUT
V
OUT
The dynamic resistance r
is evaluated using the LED specification.
AC(LED)
RAC + Rsense ) rAC(LED) nbLED
(eq. 27)
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NCS29001
Theory
The control to output transfer function is expressed following the formula below:
s
1 ) w
z
H(s) + H0
(eq. 28)
s
1 ) s
p
Where
I
VC L Fsw
RAC R1
∂
OUT
Ho +
Req
+
(eq. 29)
∂
RAC ) R1
VC
ǒV
Ǔ
ǒR G Ǔ2
OUT * VIN
CS
I
2 IOUT L Fsw
RAC R1
1
Ho +
(eq. 30)
(eq. 31)
Ǹ
RCS Gi RAC ) R1
ǒV
Ǔ
OUT * VIN
1
fp +
ǒ
Ǔ
2p ESR ) Req COUT
There is also a right half plane zero:
1
fz +
(eq. 32)
2p ESR COUT
As the boost converter also operates in DCM, there is also a right half plane zero regulated to high frequency:
2 fsw
(eq. 33)
frhpz
+
2p D
Type II compensation is used to compensate the two dominant poles f of the control to output transfer function.
p
The compensator zero has to be placer at the f frequency of the transfer function.
p
1
1
fp +
+ fz +
(eq. 34)
2p (ESR ) Req) COUT
2p Rcomp Ccomp
(ESR ) Req) COUT
(eq. 35)
(eq. 36)
Rcomp
+
Ccomp
The dominant pole is expressed following the equation:
1
fp1
+
2p REA Ccomp
COMP
−
9
Cpad
Ccomp2
equivalent
+
gm
Rcomp
With Cpad=10pF
Cbw =
Cpad+Comp2
Type II
Ccomp
Compensation
Figure 9. Slope Compensation Network
The natural second pole is expressed following the equation:
1
fp2
+
(eq. 37)
(eq. 38)
2p Rcomp Cbw
The zero is expressed following the equation:
1
fz +
2p Rcomp Ccomp
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NCS29001
OSCILLATOR FREQUENCY SETTING
The simplified equation to set the switching frequency using resistor R :
T
13750
fsw
+
(eq. 39)
RT ) 5
Where:
R is expressed in kW.
T
f
us expressed in kHz
sw
FBP OPTIONS
The FBP pin is used to program the feedback voltage that sets the LED current. Typically a resistor divider is used from VREF
to set the voltage between 0.5 V and 3.0 V. Additionally, to save component costs, the feedback voltage can be programmed
with internal 0.8 V ( 1.5%) by tying the FBP pin to ground.
FAULT DETECTION:
• Overvoltage Protection: A resistor divider from VOUT can be used to set the overvoltage protection on the OVP pin.
When the OVP pin rises above 1.2 V the converter will shut off immediately and PWMout will be held high for 50 ms
to discharge the output capacitor. After this time the device will enter standby mode requires a high to low transition on
the STBY pin to restart.
• Short Circuit Protection: A resistor divider from VOUT can be used to set the short circuit protection on the OVP pin.
When the OVP pin drops below 75 mV the converter will shut off immediately and enter standby mode. A high to low
transition on the STBY pin is required to restart the device.
• Under Voltage Lockout (UVLO): The converter will immediately shut off and enter standby when the VIN pin voltage
drops below 7.5 V. When the UVLO condition is cleared, a high to low transition on the STBY pin is required to restart
the device.
• Temperature Shutdown: When the internal die temperature reaches 150°C, the device will behave the same as in the
overvoltage condition.
Layout Guidance
In switching converters it is important to use wide, short traces for components in the main switching path. Resistor RCS,
which is in the main switching path through transistor Q1, should be connected to power ground (PGND). Compensation
network components, resistor dividers, and bypass capacitors should be referenced to quiet ground (GND). Bypass capacitors
should be connected as close to the IC as possible.
ORDERING INFORMATION
†
Device
Package
Shipping
NCS29001DR2G
SOIC−14
(Pb−Free)
3000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
http://onsemi.com
15
NCS29001
PACKAGE DIMENSIONS
SOIC−14 NB
CASE 751A−03
ISSUE K
NOTES:
D
A
B
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE PROTRUSION
SHALL BE 0.13 TOTAL IN EXCESS OF AT
MAXIMUM MATERIAL CONDITION.
4. DIMENSIONS D AND E DO NOT INCLUDE
MOLD PROTRUSIONS.
14
8
7
A3
E
H
5. MAXIMUM MOLD PROTRUSION 0.15 PER
SIDE.
L
DETAIL A
1
MILLIMETERS
DIM MIN MAX
INCHES
MIN MAX
13X b
M
M
B
0.25
A
A1
A3
b
D
E
1.35
0.10
0.19
0.35
8.55
3.80
1.75 0.054 0.068
0.25 0.004 0.010
0.25 0.008 0.010
0.49 0.014 0.019
8.75 0.337 0.344
4.00 0.150 0.157
M
S
S
B
0.25
C A
DETAIL A
h
A
X 45
_
e
H
h
L
1.27 BSC
0.050 BSC
6.20 0.228 0.244
0.50 0.010 0.019
1.25 0.016 0.049
5.80
0.25
0.40
0
M
A1
e
M
7
0
7
_
_
_
_
SEATING
PLANE
C
SOLDERING FOOTPRINT*
6.50
14X
1.18
1
1.27
PITCH
14X
0.58
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks,
copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC
reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any
particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without
limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications
and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC
does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for
surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where
personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and
its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly,
any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture
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PUBLICATION ORDERING INFORMATION
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NCS29001/D
相关型号：
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