NCS5650 [ONSEMI]

2 Amp PLC Line Driver; 2安培PLC线路驱动器
NCS5650
型号: NCS5650
厂家: ONSEMI    ONSEMI
描述:

2 Amp PLC Line Driver
2安培PLC线路驱动器

驱动器
文件: 总9页 (文件大小:156K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
NCS5650  
2 Amp PLC Line Driver  
The NCS5650 is a high efficiency, Class A/B, low distortion power  
line driver. Its design is optimized to accept a signal from a Power Line  
Carrier modem. The output stage is designed to drive up to 2 A peak  
into an isolation transformer or simple coil coupling to the mains. At  
output current of 1.5 A, the output voltage is guaranteed to swing  
within 1 V or less of either rail giving the user improved SNR. Power  
supply options are singlesided 6 V to 12 V and dual balanced  
$3.0 V to $6.0 V. The input stage contains an operational amplifier  
which can be configured as a unity gain follower buffer or used to  
provide the first stage of a 4pole low pass filter. In addition the  
NCS5650 offers a current limit programmable with a single resistor,  
http://onsemi.com  
MARKING  
DIAGRAM  
20  
1
NCS  
5650  
ALYWG  
G
20  
1
QFN20  
CASE 485E  
R−  
, together with a current limit flag.  
Limit  
The device provides two independent thermal flags with hysteresis:  
a thermal warning flag to let the user know the internal junction  
temperature has reached a user programmable thermal warning  
threshold and a thermal error flag that indicates the internal junction  
temperature has exceeded 150°C. In shutdown mode the NCS5650  
output goes into a highimpedance state. The NCS5650 comes in a 20  
lead QFN package (4x4x1mm) with an exposed thermal pad for  
enhanced thermal reliability.  
A
L
Y
W
G
= Assembly Location  
= Wafer Lot  
= Year  
= Work Week  
= PbFree Package  
(Note: Microdot may be in either location)  
Features  
ORDERING INFORMATION  
RailtoRail Drop of Only $1 V with I = 1.5 A  
out  
Device  
Package  
Shipping  
V : SingleSided (6 V to 12 V) or DualBalanced $6.0 V  
CC  
NCS5650MNTXG  
QFN20 3000 / Tape & Reel  
(PbFree)  
Flexible 4thOrder Filtering  
CurrentLimit Set with One Resistor  
†For information on tape and reel specifications,  
including part or orientation and tape sizes, please  
refer to our Tape and Reel Packaging Specifications  
Brochure, BRD8011/D.  
Diagnostic Flags Level Shifted to V_c to Simplify Interface with  
External MCU  
Thermal Warning Flag with Flexible Threshold Setting  
Thermal Error flag and Shutdown  
Overcurrent Flag  
Enable/Shutdown Control  
Extended Junction Temperature Range: 40°C to +125°C  
Small Package: 20pin 4x4x1mm QFN with Exposed Thermal Pad  
Optimized for Operation in the Cenelec A to D Frequency Band  
This is a PbFree Device  
Typical Applications  
Power Line Communication Driver in AMM and AMR Metering  
Systems  
Valve, Actuator, and Motor Driver  
Audio  
© Semiconductor Components Industries, LLC, 2010  
1
Publication Order Number:  
May, 2010 Rev. 0  
NCS5650/D  
NCS5650  
Exposed  
Pad  
20 19 18 17 16  
1
2
3
4
5
15  
14  
13  
12  
11  
NCS5650  
6
7
8
9 10  
(Top View)  
NOTE: The Exposed Pad (EP) on package bottom must be attached to a heatsinking  
conduit. The Exposed Pad must be electrically connected to V  
.
EE  
Figure 1. Pin Connections  
V
WARN  
V
CC  
V
COM  
V
C  
Amp A (+)  
Amp A_Out  
Amp A ()  
T
T
W
SD  
LIM  
Enable  
I
Amp B (+)  
Amp B_Out  
Amp B ()  
GND  
V
EE  
R
LIM  
FLAG  
C
Figure 2. NCS5650 Block Diagram  
http://onsemi.com  
2
NCS5650  
PIN DESCRIPTION  
Pin#  
1
Symbol  
Enable  
Pin Function  
Enable/ Shutdown Input (Low = Enable)  
2
V
com  
Virtual Common at (V V )/2 (See Note 1 Below)  
CC EE  
3
Amp A (+)  
Amp A ()  
Amp A Out  
Positive (+) Input of Op Amp A  
4
Negative () Input of Op Amp A  
5
Output of Op Amp A  
6
V
CC  
V
CC  
Positive supply for amplifiers  
7
Positive supply for amplifiers  
8
Amp B Out  
Amp B Out  
Output of Op Amp B  
9
Output of Op Amp B  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
V
V
Negative supply for amplifiers  
EE  
EE  
Negative supply for amplifiers  
Amp B ()  
Amp B (+)  
VWarn  
Negative () Input of Op Amp B  
Positive (+) Input of Op Amp B  
Thermal Warming Temp is set by a voltage determined by the ratio of two resistors (see Figure 6).  
Output B Current Limit Set Resistor (RLimit) to Pin 10  
Current Limit Flag (High indicates Output Current w limit set by RLimit)  
Thermal Shutdown Flag (High indicates Junction Temperature w 150°C)  
Thermal Warning Flag (High indicates Junction Temperature w threshold set by VWarn)  
Digital supply for logic flag thresholds  
RLimit  
I
flag  
LIM  
TSD flag  
TW flag  
V_c  
GND_c  
Exposed Pad  
Digital ground for logic flag thresholds  
The exposed pad should be connected to the lowest voltage potential in the circuit.  
1. The principal purpose of pin 2 is to facilitate the implementation of the 4thorder lowpass filter when operating on singlesided supply  
by providing a virtual common at midsupply. When operating on dual balanced supplies, Pin 2 must be left floating and the external  
common of the dual supplies should be used for the filter implementation.  
MAXIMUM RATINGS  
Symbol  
Rating  
Value  
Unit  
V
V
S
Supply Voltage (V to V )  
EE  
13.2  
CC  
V
ICR  
Input Common Mode Voltage Range  
(V 0.3V, V + 0.3V)  
V
EE  
CC  
T
Maximum Junction Temperature (Operating Range 40°C to 125°C)  
Storage Temperature  
160  
°C  
°C  
J
T
stg  
65 to 150  
260  
Mounting Temperature (Infrared or Convection 30 sec)  
Moisture Sensitivity Level  
MSL  
Level 1  
33  
Thermal Resistance  
20Pin QFN with Exposed Thermal Pad  
°C/W  
JA  
2
(With exposed thermal pad soldered to 9 in of 2 oz Cu PCB area (62 mil thick  
board) using 14 vias each with an 18 mil diameter and 1.5 mils Cu walls. See  
Application Information.)  
Logic control pins  
Enable, R , I , TSD, TW, Vc  
LIMIT LIM  
5.5  
V
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the  
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect  
device reliability.  
http://onsemi.com  
3
 
NCS5650  
ELECTRICAL CHARACTERISTICS V = 12 V All limits apply over the temperature range, T = –40°C to +125°C, unless  
S
J
otherwise noted. Total supply V = V V  
.
S
CC  
EE  
NCS5650  
Typ  
Min  
Max  
Parameter  
Symbol  
Condition  
Units  
INPUT OPERATIONAL AMPLIFIER (Op Amp A)  
Offset Voltage  
Input Offset Voltage  
V
V
= +12 V, V = 0 V  
3
10  
150  
mV  
uV/V  
nA  
OS  
CC  
EE  
Offset vs Power Supply  
Input Bias Current (Note 2)  
Input Voltage Noise Density  
PSRR  
V
CC  
= +6 V, V = 6 V  
25  
EE  
I
B
e
f = 1 kHz, V = GND,  
250  
nV/Hz  
n
IN  
BW = 131 kHz  
Input Voltage Range  
CommonMode Voltage Range  
V
CM  
V
V
CC  
3
V
EE  
0.1  
CommonMode Rejection Ratio  
Input Impedance  
CMRR  
V
EE  
0.1 v V  
v V 3  
70  
85  
dB  
CM  
CC  
Differential  
0.2 | 1.5  
0.2 | 3  
100  
G| pF  
G| pF  
dB  
CommonMode  
OpenLoop Gain (Note 2)  
Frequency Response  
Gain Bandwidth Product  
Full Power Bandwidth (Note 2)  
Slew Rate  
R = 500 ꢃ  
80  
L
GBW  
80  
1.5  
MHz  
MHz  
V/s  
%
G = +5, V = 11 V  
200  
out  
PP  
SR  
60  
Total Harmonic Distortion + Noise  
THD+N  
G = +1, R = 500 , V = 8 V , f =  
0.015  
L
in  
O
PP  
1 kHz, C = 220 F, C = 330 F  
out  
G = +1, R = 50 , V = 8 V , f =  
0.023  
L
O
PP  
100 kHz, C = 220 F, C = 330 F  
in  
out  
Output  
Voltage Output Swing from Rail  
From Positive Rail  
From Negative Rail  
ShortCircuit Current  
Output Impedance  
Capacitive Load Drive  
V
= +12 V, V = 0 V  
CC EE  
V
R = 500 ꢃ ꢄꢅ V ꢆꢇ  
0.3  
0.3  
1
1
V
V
OH  
L
CC  
V
R = 500 ꢃ ꢄꢅ V ꢆꢇ  
L CC  
OL  
SC  
I
280  
0.25  
100  
mA  
Z0  
Closed Loop G = +4, f = 100 kHz  
C
pF  
LOAD  
OUTPUT OPERATIONAL AMPLIFIER (Op Amp B)  
Offset Voltage  
Input Offset Voltage  
V
V
V
= +12 V, V = 0 V  
3
10  
mV  
V/V  
nA  
OS  
CC  
EE  
Offset vs Power Supply  
Input Bias Current (Note 2)  
Input Voltage Noise Density  
PSRR  
= +12 V, V = 0 V  
25  
150  
1
CC  
EE  
I
B
e
f = 1 kHz, V = GND,  
125  
85  
nV/Hz  
n
IN  
BW = 131 kHz  
Input Voltage Range  
CommonMode Voltage Range  
V
CM  
V
V
V
EE  
CC  
3
0.1  
CommonMode Rejection Ratio  
CMRR  
V
0.1 v V  
v V 3  
70  
dB  
EE  
CM  
CC  
2. Guaranteed by characterization or design.  
3. Formula accuracy requires a resistor with $1% tolerance.  
http://onsemi.com  
4
NCS5650  
ELECTRICAL CHARACTERISTICS V = 12 V All limits apply over the temperature range, T = –40°C to +125°C, unless  
S
J
otherwise noted. Total supply V = V V  
.
S
CC  
EE  
NCS5650  
Typ  
Min  
Max  
Parameter  
Symbol  
Condition  
Units  
OUTPUT OPERATIONAL AMPLIFIER (Op Amp B)  
Input Impedance  
Differential  
0.2 | 11  
0.2 | 22  
100  
G| pF  
G| pF  
dB  
CommonMode  
OpenLoop Gain (Note 2)  
Frequency Response  
R = 5 ꢃ  
L
80  
Gain Bandwidth Product  
Full Power Bandwidth (Note 2)  
Slew Rate  
GBW  
60  
400  
70  
MHz  
kHz  
V/s  
%
G = +2, V = 11 V  
200  
out  
PP  
SR  
Total Harmonic Distortion + Noise  
THD+N  
G = +1, R = 50 ,  
0.015  
L
PP  
V
O
= 8 V , f = 1 kHz  
G = +1, R = 50 ,  
0.067  
L
V
= 8 V , f = 100 kHz  
O
PP  
Output  
Voltage Output Swing from Rail  
From Positive Rail  
From Negative Rail  
Voltage Output Swing from Rail  
From Positive Rail  
Negative Rail  
V
= +12 V, V = 0 V  
CC EE  
V
I
I
= 1.5 A to MidSupply  
= 1.5 A to MidSupply  
0.7  
0.4  
1
1
V
V
OH  
out  
out  
V
OL  
V
CC  
= +6 V, V = 6 V  
EE  
V
OH  
I
I
= 1.5 A to GND  
= 1.5 A to GND  
0.7  
0.4  
1
1
V
V
out  
out  
V
OL  
Output Impedance  
Enabled Mode  
Z0  
Closed Loop G = +1,  
f = 100 kHz  
0.065  
12  
Mꢃ  
Shutdown Mode  
Capacitive Load Drive  
C
500  
nF  
LOAD  
BOTH AMPLIFIERS COMBINED  
Junction Temperature  
T
J
°C  
°C  
°C  
At Shutdown (Note 2)  
+150  
+160  
+135  
10  
At Recovery from Shutdown  
Thermal Warning Tolerance  
T
is determined by the ratio of  
warning  
two resistors (see Figure 8) (Note 3)  
Current Limit Tolerance  
ILimit is determined by a single  
resistor (see Figure 5 text) (Note 3)  
50  
mA  
Power Supply  
Operating Voltage Range  
V
S
V
SingleSupply Operation (V Tied  
6 to 12  
13.2  
EE  
to System Common)  
Dual BalancedSupply operation  
3.0 to 6.0  
Quiescent Current  
Enabled Mode  
I
Q
V = +6 V, V = 6 V  
CC EE  
20  
120  
40  
150  
mA  
A  
Shutdown Mode  
V
COM  
V
= 12 V, V = 0 V  
5.8  
6.0  
6.2  
V
CC  
EE  
Internal resistor divider.  
Bypass purposes only.  
2. Guaranteed by characterization or design.  
3. Formula accuracy requires a resistor with $1% tolerance.  
http://onsemi.com  
5
NCS5650  
ELECTRICAL CHARACTERISTICS V = 12 V All limits apply over the temperature range, T = –40°C to +125°C, unless  
S
J
otherwise noted. Total supply V = V V  
.
S
CC  
EE  
NCS5650  
Typ  
Min  
Max  
Parameter  
LOGIC INPUT/OUTPUT  
Logic/flag Supply Range  
Symbol  
Condition  
Units  
V_c  
Logic/flag supply for operation with  
external MCU  
3.0  
5.5  
V
Reference Point for GND_c  
V
g c  
With SingleSided Power Supply  
V
EE  
(Pins 10 and 11) Connected to System  
Common  
With DualBalanced Power Supply  
Common of Dual Supply Connected to  
System Common  
Shutdown Input Mode  
Output Enabled  
Ve/s LOW  
Ve/s HIGH  
E/S Pin Open or Forced LOW  
E/S Pin Forced HIGH  
V
V
+
V
V
0.8  
g c  
g c  
0.4  
Output Shutdown  
V
g c  
V_c  
+ 2  
Output Enabled  
Ie/s LOW  
Ie/s HIGH  
E/S Pin LOW  
E/S Pin HIGH  
0.1  
10  
60  
5
A  
A  
ns  
s  
Output Shutdown  
Output Shutdown Time  
Output Enable Time (Note 2)  
All Flag Outputs  
10  
HIGH State  
V
V
V
+ 2  
g c  
LOW State  
V
+
0.8  
g c  
2. Guaranteed by characterization or design.  
3. Formula accuracy requires a resistor with $1% tolerance.  
http://onsemi.com  
6
 
NCS5650  
APPLICATIONS INFORMATION  
Bypassing  
Exposed Thermal Pad  
The NCS5650 is capable of delivering 1.5 A, into a  
reactive load. Output signal swing should be kept as high as  
possible to minimize internal heat generation to keep the  
internal junction temperature as low as possible. The  
NCS5650 can swing to within 1 V of either rail without  
adding distortion. An exposed thermal pad is provided on  
the bottom of the device to facilitate heat dissipation.  
Application Note AND8402/D provides considerable  
details for optimizing the soldering down of the exposed  
Optimal stability and noise rejection will be implemented  
with powersupply bypassing placed as physically close to  
the device as possible. A parallel combination of 10 F and  
0.01 F is recommended (ceramic and tantalum,  
respectively) for each sensitive point. For either  
singlesupply operation or split supply operation, bypass  
should be placed directly across V to V . In addition add  
CC  
EE  
bypass from V to GND . Reference Figure 4.  
C  
c  
VCOM VCC  
pad.  
A very good example of the exposed pad  
implementation is provided in the layout information  
included with the NCS5650 Demo Board. The demo board  
implements 14 vias, each with an 18 mil diameter and  
1.5 mils Copper walls.  
C11  
C13  
C5  
C14  
2
6
7
MultiFeedback Filter (MFB)  
CENELEC EN 500651 is a European standard for  
signaling on lowvoltage electrical installations in the  
frequency range 3 kHz to 148. 5kHz. More specifically Part  
1 of that specification deals with frequency bands and  
electromagnetic disturbances introduced into the electrical  
mains. A practical solution to meet this requirement is to  
place a 4thorder filter between the output of the modem and  
the isolation transformer connected to the mains. In this  
datasheet a MFB filter topology is proposed to help meet the  
requirements of the CENELEC standard. Four (4) pole  
filters require two op amps for implementation. The  
NCS5650 has an input preamplifier and an output power  
amplifier. Therefore only passive components (R’s and C’s)  
need to be added. In addition the NCS5650 has a midsupply  
VO  
11  
10  
C9  
C10  
C6  
VEE VC  
Figure 4.  
Current Limit (RLimit)  
The 2 A output current of the NCS5650 can be  
programmed by the simple addition of a resistor (R  
from pin 15 to V (see Figure 5). If the load current tries to  
flag will go logic High  
signaling the user to take any necessary action. When the  
current output recovers, the I flag will return to logic  
Low. The curve in Figure 5 is tolerance typically to 50 mA.  
Unlike traditional power amplifiers the NCS5650 current  
limits functions both when sourcing and sinking current. To  
calculate the resistance required to program a desired  
current limit the following equation can be used:  
)
Limit  
EE  
exceed the set current limit, the I  
LIM  
virtual common at pin 2 (V ) to facilitate implementation  
com  
LIM  
of the filter topology when powered from a singlesided  
power supply.  
Figure 3 below shows the frequency response for each  
stage and the overall filter.  
16  
14  
1.215  
RCL  
ILIM  
+
  8197  
Total Gain  
12  
10  
AmpA Gain  
8
6
VO  
AmpB Gain  
4
15  
11  
2
0
RLIM  
2  
0.1  
Figure 5.  
1
10  
100  
1000  
FREQUENCY (kHz)  
Figure 6 graphically illustrates the required resistance in  
ohms to program the current limit.  
Figure 3. Amplifier Voltage vs. Frequency  
http://onsemi.com  
7
 
NCS5650  
20  
15  
10  
5
3
2.75  
2.5  
2.25  
2
1.75  
1.5  
1.25  
1
0
0
0.25  
0.5  
0.75  
1
1.25 1.5  
1.75  
2
40 20  
0
20  
40  
60  
80 100 120 140  
T (°C)  
J
CURRENT LIMITS (A)  
Figure 6.  
Figure 8.  
Thermal Shutdown and Thermal Warning Flag  
Virtual Common (Vcom  
)
In the event load conditions cause internal overheating  
the amplifier will go into shutdown to prevent damage.  
Under these conditions pin 17 the TSD flag (Thermal Shut  
Down) will go logic High. Thermal shutdown takes place at  
an internal junction temperature of approximately 160°C;  
the amplifier will recover to the Enabled mode when the  
junction temperature cools back down to approximately  
145°C.  
The principal purpose of V  
is to provide a convenient  
com  
virtual common for implementing the 4thorder CENELEC  
filter when operating on singlesided power supply. When  
operating on balanced split supplies it is recommended to  
use the power supply common for the filter implementation  
and to leave V  
floating.  
com  
Digital Power Supply GNDReference and Translators  
In many mixed signal applications analog GND and  
digital GND are not always at the same potential. To  
minimize GND loop issues, the NCS5650 has a separate  
GND pin (pin 20) which should be used to reference the  
digital supply and the warning flags (pins 16, 17, and 18). In  
most applications this would be the same GND reference  
used for the PLC modem. Please note that at some point in  
the application digital GND and analog GND must be tied  
together.  
The user has the option to avoid entering into the TSD  
mode by monitoring the junction temperature via the  
Thermal Warning feature. Figure 8 shows how the user can  
select any junction temperature (T  
to 145°C by applying the appropriate voltage to pin 14. A  
simple way to implement this feature is by setting the ratio  
) in the range 105°C  
warn  
of a voltage divider between V (pins 6,7) and V (the  
CC  
EE  
negative supply, pin 10 or 11). The voltage ratio required to  
program the thermal warning of the NCS5650 can be  
calculated using the following equation:  
3  
VTW = 6.665 x 10 (T ) + 1.72  
J
Figure 8 illustrates the linearity of the internal junction  
temperature to the required voltage on pin 14 (T  
).  
warn  
VCC  
R9  
14  
VO  
R10  
VEE  
Figure 7.  
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8
 
NCS5650  
PACKAGE DIMENSIONS  
QFN20, 4x4, 0.5P  
CASE 485E01  
ISSUE A  
NOTES:  
1. DIMENSIONING AND TOLERANCING PER ASME  
Y14.5M, 1994.  
2. CONTROLLING DIMENSION: MILLIMETERS.  
3. DIMENSION b APPLIES TO PLATED TERMINAL  
AND IS MEASURED BETWEEN 0.15 AND 0.30 MM  
FROM THE TERMINAL TIP.  
A
B
D
A3  
EXPOSED Cu  
MOLD CMPD  
PIN ONE  
REFERENCE  
4. COPLANARITY APPLIES TO THE EXPOSED PAD  
AS WELL AS THE TERMINALS.  
E
A1  
2X  
MILLIMETERS  
DETAIL B  
DIM MIN  
MAX  
1.00  
0.05  
0.15  
C
OPTIONAL CONSTRUCTIONS  
A
A1  
A3  
b
0.80  
---  
2X  
0.20 REF  
0.15  
C
0.20  
0.30  
L
L
TOP VIEW  
D
4.00 BSC  
D2  
E
2.70  
2.90  
4.00 BSC  
(A3)  
DETAIL B  
L1  
A
E2  
e
2.70  
2.90  
0.10  
C
0.50 BSC  
0.20 REF  
K
DETAIL A  
L
0.35  
0.00  
0.45  
0.15  
OPTIONAL CONSTRUCTIONS  
L1  
0.08  
C
SEATING  
PLANE  
A1  
C
SIDE VIEW  
SOLDERING FOOTPRINT*  
0.10 C A B  
4.30  
20X  
D2  
0.58  
DETAIL A  
20X L  
2.88  
6
0.10 C A B  
11  
E2  
1
1
2.88  
4.30  
20  
K
20X b  
e
0.10 C A B  
0.05  
PKG  
OUTLINE  
C
NOTE 3  
20X  
0.35  
BOTTOM VIEW  
0.50  
PITCH  
DIMENSIONS: MILLIMETERS  
*For additional information on our PbFree strategy and soldering  
details, please download the ON Semiconductor Soldering and  
Mounting Techniques Reference Manual, SOLDERRM/D.  
ON Semiconductor and  
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice  
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability  
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.  
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All  
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights  
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications  
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should  
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,  
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death  
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal  
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.  
PUBLICATION ORDERING INFORMATION  
LITERATURE FULFILLMENT:  
N. American Technical Support: 8002829855 Toll Free  
USA/Canada  
Europe, Middle East and Africa Technical Support:  
Phone: 421 33 790 2910  
Japan Customer Focus Center  
Phone: 81357733850  
ON Semiconductor Website: www.onsemi.com  
Order Literature: http://www.onsemi.com/orderlit  
Literature Distribution Center for ON Semiconductor  
P.O. Box 5163, Denver, Colorado 80217 USA  
Phone: 3036752175 or 8003443860 Toll Free USA/Canada  
Fax: 3036752176 or 8003443867 Toll Free USA/Canada  
Email: orderlit@onsemi.com  
For additional information, please contact your local  
Sales Representative  
NCS5650/D  

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