NCV1455BDR2 [ONSEMI]
Timers; 计时器
| 型号： | NCV1455BDR2 |
| 厂家： | 
ONSEMI |
| 描述： | Timers |
| 文件： | 总10页 (文件大小：151K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MC1455, MC1455B,
NCV1455B
Timers
The MC1455 monolithic timing circuit is a highly stable controller
capable of producing accurate time delays or oscillation. Additional
terminals are provided for triggering or resetting if desired. In the time
delay mode, time is precisely controlled by one external resistor and
capacitor. For astable operation as an oscillator, the free−running
frequency and the duty cycle are both accurately controlled with two
external resistors and one capacitor. The circuit may be triggered and
reset on falling waveforms, and the output structure can source or sink
up to 200 mA or drive MTTL circuits.
• Direct Replacement for NE555 Timers
• Timing from Microseconds through Hours
• Operates in Both Astable and Monostable Modes
• Adjustable Duty Cycle
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MARKING
DIAGRAMS
XXXXXXXXX
AWL
8
YYWW
1
P1 SUFFIX
PLASTIC PACKAGE
CASE 626
• High Current Output Can Source or Sink 200 mA
• Output Can Drive MTTL
• Temperature Stability of 0.005% per °C
• Normally ON or Normally OFF Output
8
8
XXXXXX
ALYW
1
D SUFFIX
PLASTIC PACKAGE
CASE 751
1
xx
A
= Specific Device Code
= Assembly Location
WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week
1.0 k
Load
MT2
3
8
MT1
6
7
G
4
2
R
20ꢀM
C
10 k
MC1455
ORDERING INFORMATION
5
See detailed ordering and shipping information in the package
dimensions section on page ___ of this data sheet.
(Create − Named − OrderingInfoText.)
0.01 mF
1.0 mF
0.1 mF
1
1N4003
−10 V
3.5 k
−
10 mF
1N4740
t = 1.1; R and C = 22 sec
Time delay (t) is variable by
changing R and C (see Figure 16).
+
250 V
Figure 1. 22 Second Solid State Time Delay Relay Circuit
V
CC
I
CC
V
R
Reset
4
8
700
7
5
V
CC
V
CC
+
Control
Voltage
0.01 mF
Discharge
8
MC1455
3
5 k
Threshold
6
7
3
6
5
V
S
Discharge
Output
+
Threshold
2.0 k
Output
I
th
Comp
A
Flip
Flop
Gnd
1
Trigger
I
Sink
V
O
R
S
−
Control Voltage
2
I
Source
Q
5 k
5 k
Inhibit/
Reset
+
Comp
B
2
Trigger
Test circuit for measuring DC parameters (to set output and
measure parameters):
a) When V w 2/3 V , V is low.
−
S
CC
O
b) When V v 1/3 V , V is high.
S
CC
O
1
4
c) When V is low, Pin 7 sinks current. To test for Reset, set V
O
O
Gnd
Reset
c) high, apply Reset voltage, and test for current flowing into Pin 7.
c) When Reset is not in use, it should be tied to V
.
CC
Figure 2. Representative Block Diagram
Figure 3. General Test Circuit
Semiconductor Components Industries, LLC, 2004
1
Publication Order Number:
MC1455/D
March, 2004 − Rev. 8
MC1455, MC1455B, NCV1455B
MAXIMUM RATINGS (T = +25°C, unless otherwise noted.)
A
Rating
Symbol
Value
+18
Unit
Vdc
mA
Power Supply Voltage
V
CC
Discharge Current (Pin 7)
I
7
200
Power Dissipation (Package Limitation)
P1 Suffix, Plastic Package
P
625
5.0
625
160
mW
mW/°C
mW
D
Derate above T = +25°C
A
P
D
D Suffix, Plastic Package
°C/W
Derate above T = +25°C
A
Operating Temperature Range (Ambient)
MC1455B
MC1455
T
A
°C
−40 to +85
0 to +70
−40 to +125
NCV1455B
Maximum Operating Die Junction Temperature
Storage Temperature Range
T
+150
°C
°C
J
T
stg
−65 to +150
ELECTRICAL CHARACTERISTICS (T = +25°C, V = +5.0 V to +15 V, unless otherwise noted.)
A
CC
Characteristics
Operating Supply Voltage Range
Supply Current
Symbol
Min
Typ
Max
Unit
V
V
4.5
−
16
CC
CC
I
mA
−
−
3.0
10
6.0
15
V
CC
V
CC
= 5.0 V, R = R
L
= 15 V, R = R, Low State (Note 1)
L
Timing Error (R = 1.0 kW to 100 kW) (Note 2)
Initial Accuracy C = 0.1 mF
Drift with Temperature
−
−
−
1.0
50
0.1
−
−
−
%
PPM/°C
%/V
Drift with Supply Voltage
Threshold Voltage/Supply Voltage
Trigger Voltage
V /V
−
2/3
−
th CC
V
T
V
−
−
5.0
1.67
−
−
V
CC
V
CC
= 15 V
= 5.0 V
Trigger Current
I
−
0.4
−
0.5
0.7
0.1
0.1
−
−
1.0
−
mA
V
T
Reset Voltage
V
R
Reset Current
I
R
mA
mA
nA
V
Threshold Current (Note 3)
Discharge Leakage Current (Pin 7)
Control Voltage Level
I
th
−
0.25
100
I
−
dischg
V
CL
OL
9.0
2.6
10
3.33
11
4.0
V
CC
V
CC
= 15 V
= 5.0 V
Output Voltage Low
V
V
−
−
−
−
−
−
0.1
0.4
2.0
2.5
−
0.25
0.75
2.5
−
−
0.35
I
I
I
I
I
I
= 10 mA (V = 15 V)
CC
Sink
Sink
Sink
Sink
Sink
Sink
= 50 mA (V = 15 V)
CC
= 100 mA (V = 15 V)
CC
= 200 mA (V = 15 V)
CC
= 8.0 mA (V = 5.0 V)
CC
0.25
= 5.0 mA (V = 5.0 V)
CC
Output Voltage High
V
OH
V
−
12.5
13.3
3.3
−
−
−
V
CC
V
CC
V
CC
= 15 V (I
= 15 V (I
= 5.0 V (I
= 200 mA)
= 100 mA)
= 100 mA)
Source
Source
12.75
2.75
Source
Rise Time Differential Output
Fall Time Differential Output
t
−
−
100
100
−
−
ns
ns
r
t
f
1. ‘Supply current when output is high is typically 1.0 mA less.
2. Tested at V = 5.0 V and V = 15 V Monostable mode.
CC
CC
3. This will determine the maximum value of R + R for 15 V operation. The maximum total R = 20 MW.
A
B
4. T
= 0°C for MC1455, T = −40°C for MC1455B, NCV1455B
low
low
T
high
= +70°C for MC1455, T
= +85°C for MC1455B, T
= +125°C for NCV1455B
high
high
5. NCV prefix is for Automotive and other applications requiring site and change control.
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2
MC1455, MC1455B, NCV1455B
150
125
100
10
25°C
8.0
6.0
0°C
75
50
4.0
25°C
70°C
2.0
25
0
0
0
0.1
0.2
0.3
0.4
5.0
10
V , SUPPLY VOLTAGE (Vdc)
CC
15
V
Tꢀ(min)
, MINIMUM TRIGGER VOLTAGE (x V = Vdc)
CC
Figure 4. Trigger Pulse Width
Figure 5. Supply Current
2.0
1.8
10
1.6
1.4
25°C
25°C
1.0
0.1
1.2
1.0
0.8
0.6
0.4
5.0 V ≤ V ≤ 15 V
CC
0.2
0
0.01
1.0
2.0
5.0
10
(mA)
20
50
100
1.0
2.0
5.0
10
(mA)
20
50
100
I
I
Sink
Source
Figure 6. High Output Voltage
Figure 7. Low Output Voltage
@ VCC = 5.0 Vdc
10
10
25°C
1.0
1.0
0.1
0.1
25°C
0.01
0.01
1.0
1.0
2.0
5.0
10
(mA)
20
50
100
2.0
5.0
10
20
50
100
I
I
(mA)
Sink
Sink
Figure 8. Low Output Voltage
@ VCC = 10 Vdc
Figure 9. Low Output Voltage
@ VCC = 15 Vdc
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3
MC1455, MC1455B, NCV1455B
1.015
1.010
1.015
1.010
1.005
1.000
1.005
1.000
0.995
0.990
0.985
0.995
0.990
0.985
0
5.0
10
15
20
−75
−50
−25
0
25
50
75
100
125
V
CC
, SUPPLY VOLTAGE (Vdc)
T , AMBIENT TEMPERATURE (°C)
A
Figure 10. Delay Time versus Supply Voltage
Figure 11. Delay Time versus Temperature
300
250
200
150
0°C
100
25°C
70°C
50
0
0
0.1
0.2
0.3
0.4
V
Tꢀ(min)
, MINIMUM TRIGGER VOLTAGE (x V = Vdc)
CC
Figure 12. Propagation Delay
versus Trigger Voltage
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MC1455, MC1455B, NCV1455B
Control Voltage
Threshold
Comparator
Trigger
Comparator
Flip−Flop
Output
V
CC
6.8 k
4.7 k
830
4.7ꢀk
1.0 k
5.0 k
Threshold
7.0 k
3.9 k
b
10 k
Output
c b
e
c
4.7 k
5.0 k
5.0 k
Trigger
Reset
220
Reset
100 k
4.7 k
Discharge
Gnd
Discharge
100
Figure 13. Representative Circuit Schematic
GENERAL OPERATION
The MC1455 is a monolithic timing circuit which uses an
external resistor − capacitor network as its timing element. It
can be used in both the monostable (one−shot) and astable
modes with frequency and duty cycle controlled by the
capacitor and resistor values. While the timing is dependent
upon the external passive components, the monolithic circuit
provides the starting circuit, voltage comparison and other
functions needed for a complete timing circuit. Internal to the
integrated circuit are two comparators, one for the input
signal and the other for capacitor voltage; also a flip−flop and
digital output are included. The comparator reference
voltages are always a fixed ratio of the supply voltage thus
providing output timing independent of supply voltage.
has been triggered by an input signal, it cannot be retriggered
until the present timing period has been completed. The time
that the output is high is given by the equation t = 1.1 R C.
A
Various combinations of R and C and their associated times
are shown in Figure 16. The trigger pulse width must be less
than the timing period.
A reset pin is provided to discharge the capacitor, thus
interrupting the timing cycle. As long as the reset pin is low,
the capacitor discharge transistor is turned “on” and
prevents the capacitor from charging. While the reset
voltage is applied the digital output will remain the same.
The reset pin should be tied to the supply voltage when not
in use.
Monostable Mode
+V (5.0 V to 15 V)
CC
In the monostable mode, a capacitor and a single resistor
are used for the timing network. Both the threshold terminal
and the discharge transistor terminal are connected together
in this mode (refer to circuit in Figure 14). When the input
Reset
4
R
V
8
A
CC
R
L
Discharge
7
voltage to the trigger comparator falls below 1/3 V , the
CC
Output
3
comparator output triggers the flip−flop so that its output
sets low. This turns the capacitor discharge transistor “off”
and drives the digital output to the high state. This condition
allows the capacitor to charge at an exponential rate which
is set by the RC time constant. When the capacitor voltage
6
MC1455
Threshold
5
C
2
R
L
Trigger
Control
Voltage
1
0.01 mF
reaches 2/3 V , the threshold comparator resets the
CC
flip−flop. This action discharges the timing capacitor and
returns the digital output to the low state. Once the flip−flop
Figure 14. Monostable Circuit
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5
MC1455, MC1455B, NCV1455B
100
10
1.0
0.1
0.01
0.001
t = 50 ms/cm
(R = 10 kW, C = 0.01 mF, R = 1.0 kW, V = 15 V)
10 ms 100 ms 1.0 ms 10 ms 100 ms
1.0
10
100
t , TIME DELAY (s)
d
A
L
CC
Figure 15. Monostable Waveforms
Figure 16. Time Delay
+V (5.0 V to 15 V)
CC
Reset
4
R
A
V
8
CC
R
L
Output
7ꢁDischarge
6ꢁThreshold
5
3
Trigger
2
MC1455
R
B
Control
Voltage
R
L
1
C
t = 20 ms/cm
(R = 5.1 kW, C = 0.01 mF, R = 1.0 kW; R = 3.9 kW, V = 15 V)
A
L
B
CC
Figure 17. Astable Circuit
Figure 18. Astable Waveforms
Astable Mode
In the astable mode the timer is connected so that it will
retrigger itself and cause the capacitor voltage to oscillate
To obtain the maximum duty cycle R must be as small as
A
possible; but it must also be large enough to limit the
discharge current (Pin 7 current) within the maximum rating
of the discharge transistor (200 mA).
between 1/3 V and 2/3 V . See Figure 17.
CC
CC
The external capacitor changes to 2/3 V through R and
CC
A
R and discharges to 1/3 V through R . By varying the
The minimum value of R is given by:
B
CC
B
A
ratio of these resistors the duty cycle can be varied. The
charge and discharge times are independent of the supply
voltage.
V
(Vdc)
V
(Vdc)
CC
0.2
CC
R
w
w
A
I7 (A)
100
10
The charge time (output high) is given by:
t
1
+ 0.695(R ) R )C
A B
The discharge time (output low) is given by:
t
+ 0.695(R )C
B
2
1.0
0.1
Thus the total period is given by:
T + t ) t + 0.695(R ) 2R )C
1
2
A
B
1
1
1.44
(R ) 2R )C
0.01
The frequency of oscillation is then:
f +
+
A
B
(R + 2 R )
A B
0.001
and may be easily found as shown in Figure 19.
0.1
1.0
10
100
1.0 k
f, FREE RUNNING FREQUENCY (Hz)
10 k
100
R
B
The duty cycle is given by:
DC +
R
) 2R
B
A
Figure 19. Free Running Frequency
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MC1455, MC1455B, NCV1455B
APPLICATIONS INFORMATION
Missing Pulse Detector
Linear Voltage Ramp
In the monostable mode, the resistor can be replaced by a
constant current source to provide a linear ramp voltage. The
The timer can be used to produce an output when an input
pulse fails to occur within the delay of the timer. To
accomplish this, set the time delay to be slightly longer than
the time between successive input pulses. The timing cycle
is then continuously reset by the input pulse train until a
change in frequency or a missing pulse allows completion of
the timing cycle, causing a change in the output level.
capacitor still charges from 0 V to 2/3 V . The linear
CC
CC
ramp time is given by:
2
3
VCC
1
V
CC − VB − VBE
RE
t =
, where I =
If V is much larger than V , then t can be made
B
BE
independent of V
.
CC
+V (5.0 V to 15 V)
CC
V
V
CC
V
CC
Reset
4
R
L
R
A
8
Reset
4
8
CC
Discharge
3
R
R1
E
2N4403
or Equiv
7
Output
Input
3
V
E
Digital
Output
Threshold
MC1455
7
6
5
V
B
Control
Voltage
6
5
C
2
I
MC1455
Trigger
2
0.01 mF
Sweep
Output
R2
1
Trigger
C
2N4403
or Equiv
Control
Voltage
1
0.01 mF
Figure 20. Linear Voltage Sweep Circuit
Figure 21. Missing Pulse Detector
t = 100 ms/cm
t = 500 ms/cm
(R = 10 kW, R2 = 100 kW, R1 = 39 kW, C = 0.01 mF, V = 15 V)
E CC
(R = 2.0 kW, R = 1.0 kW, C = 0.01 mF, V = 15 V)
A L CC
Figure 22. Linear Voltage Ramp Waveforms
Figure 23. Missing Pulse Detector Waveforms
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7
MC1455, MC1455B, NCV1455B
Pulse Width Modulation
If the timer is triggered with a continuous pulse train in the
monostable mode of operation, the charge time of the
capacitor can be varied by changing the control voltage at
Pin 5. In this manner, the output pulse width can be
modulated by applying a modulating signal that controls the
threshold voltage.
+V (5.0 V to 15 V)
CC
R
A
R
L
4
8
t = 0.5 ms/cm
(R = 10 kW, C = 0.02 mF, V = 15 V)
A
CC
7
3
2
Output
C
Figure 25. Pulse Width Modulation Waveforms
6
5
MC1455
Test Sequences
Clock
Input
Modulation
Input
Several timers can be connected to drive each other for
sequential timing. An example is shown in Figure 26 where
the sequence is started by triggering the first timer which
runs for 10 ms. The output then switches low momentarily
and starts the second timer which runs for 50 ms and so forth.
1
Figure 24. Pulse Width Modulator
V
CC
(5.0 V to 15 V)
18.2 k
6
9.1 k
9.1 k
6
27 k
27 k
8
4
8
4
8
4
0.01 mF
0.01 mF
0.01 mF
6
5
3
5
3
5
3
7
2
7
2
MC1455
MC1455
MC1455
7
0.001 mF
5.0 mF
0.001 mF
5.0 mF
2
1
1
1
1.0 mF
Load
Load
Load
Figure 26. Sequential Timer
DEVICE ORDERING INFORMATION
Device
MC1455P1
Operating Temperature Range
T = 0°C to +70°C
Package
Plastic Dip
SO−8
Shipping
50 Units/Rail
98 Units/Rail
98 Units/Rail
50 Units/Rail
A
MC1455D
T = 0°C to +70°C
A
MC1455BD
T = −40°C to +85°C
A
SO−8
MC1455BP1
NCV1455BDR2*
T = −40°C to +85°C
A
Plastic Dip
SO−8
T = −40°C to +125°C
A
2500/Tape & Rail
*NCV prefix is for automotive and other applications requiring site and control changes.
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8
MC1455, MC1455B, NCV1455B
PACKAGE DIMENSIONS
P1 SUFFIX
PLASTIC PACKAGE
CASE 626−05
ISSUE L
NOTES:
1. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
2. PACKAGE CONTOUR OPTIONAL (ROUND OR
SQUARE CORNERS).
8
5
3. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
−B−
MILLIMETERS
INCHES
1
4
DIM MIN
MAX
10.16
6.60
4.45
0.51
1.78
MIN
MAX
0.400
0.260
0.175
0.020
0.070
A
B
C
D
F
9.40
6.10
3.94
0.38
1.02
0.370
0.240
0.155
0.015
0.040
F
−A−
NOTE 2
L
G
H
J
K
L
2.54 BSC
0.100 BSC
0.76
0.20
2.92
1.27
0.30
3.43
0.030
0.008
0.115
0.050
0.012
0.135
C
7.62 BSC
0.300 BSC
M
N
−−−
0.76
10
_
1.01
−−−
0.030
10
_
0.040
J
−T−
SEATING
PLANE
N
M
D
K
G
H
M
M
M
0.13 (0.005)
T
A
B
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MC1455, MC1455B, NCV1455B
PACKAGE DIMENSIONS
D SUFFIX
PLASTIC PACKAGE
CASE 751−07
(SO−8)
ISSUE AA
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
−X−
A
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE MOLD
PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER
SIDE.
8
5
4
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN
EXCESS OF THE D DIMENSION AT MAXIMUM
MATERIAL CONDITION.
S
M
M
B
0.25 (0.010)
Y
1
K
−Y−
6. 751−01 THRU 751−06 ARE OBSOLETE. NEW
STANDARD IS 751−07.
G
MILLIMETERS
INCHES
DIM MIN
MAX
5.00
4.00
1.75
0.51
MIN
MAX
0.197
0.157
0.069
0.020
A
B
C
D
G
H
J
K
M
N
S
4.80
3.80
1.35
0.33
0.189
0.150
0.053
0.013
0.050 BSC
0.004
0.007
0.016
0
0.010
0.228
C
N X 45
_
SEATING
PLANE
−Z−
1.27 BSC
0.10 (0.004)
0.10
0.19
0.40
0
0.25
0.25
1.27
8
0.010
0.010
0.050
8
M
J
H
D
_
_
_
_
0.25
5.80
0.50
6.20
0.020
0.244
M
S
S
X
0.25 (0.010)
Z
Y
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
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“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
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MC1455/D
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