NCV30161MNWTXG [ONSEMI]
Buck Regulator, Constant Current, for Driving High Power LEDs;
| 型号： | NCV30161MNWTXG |
| 厂家： | 
ONSEMI |
| 描述： | Buck Regulator, Constant Current, for Driving High Power LEDs 驱动 光电二极管 接口集成电路 |
| 文件： | 总10页 (文件大小：251K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
NCV30161
Constant-Current Buck
Regulator for Driving High
Power LEDs
The NCV30161 is a hysteretic step−down, constant−current driver
for high power LEDs. Ideal for industrial and automotive applications
utilizing minimal external components. The NCV30161 operates with
an input voltage range from 6.3 V to 40 V. The hysteretic control gives
good power supply rejection and fast response during load transients
and PWM dimming to LED arrays of varying number and type. A
dedicated PWM input (DIM/EN) enables a wide range of pulsed
dimming, and a high switching frequency allows the use of smaller
external components minimizing space and cost. Protection features
include resistor−programmed constant LED current, shorted LED
protection, under−voltage and thermal shutdown. The NCV30161 is
available in a DFN10 3 mm x 3 mm package with wettable flanks.
www.onsemi.com
DFNW10
CASE 507AE
MARKING DIAGRAM
NCV
30161
ALYW
G
Features
• VIN Range 6.3 V to 40 V
• Short LED Shutdown Protection: (NCV30161 Latching)
• No Control Loop Compensation Required
• Adjustable LED Current
• Single Pin Brightness and Enable/Disable Control Using PWM
• Supports All−Ceramic Output Capacitors and Capacitor−less Outputs
• Thermal Shutdown Protection
NCV30161 = Specific Device Code
A
L
Y
W
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
• Capable of 100% Duty Cycle Operation
• Thermally Enhanced DFN10 with Wettable Flanks
• AEC−Q100 Qualified and PPAP Capable
• Specified from −40°C to +125°C
PIN CONNECTIONS
GATE
VIN
CS 1
10
• This is a Pb−Free Device
NC
2
3
4
5
9
8
7
6
Typical Applications
• LED Driver
DIM/EN
GND
NC
• Constant Current Source
• Automotive Lighting
• Industrial Lighting
NC
ROT
VCC
D1
VIN
(Top View)
C
IN
L1
ORDERING INFORMATION
LED
LED
†
Device
Package
Shipping
NCV30161MNWTXG DFNW10
3000 / Tape &
Reel
VIN
GATE
(Pb−Free)
DIM/Enable
ROT
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
CS
R
C
R
OT
SENSE
NCV30161
VCC
GND
VCC
Figure 1. Typical Application Circuit
© Semiconductor Components Industries, LLC, 2018
1
Publication Order Number:
June, 2019 − Rev. 1
NCV30161/D
NCV30161
PIN FUNCTION DESCRIPTION
Pin
Pin Name
Description
Application Information
1
CS
Current Sense feedback pin
Set the current through the LED array by connecting a resistor from this pin to
ground.
2, 4, 7
NC
No Connect
Ground Pin
3
5
GND
VCC
Ground. Reference point for all voltages
Output of Internal 5 V linear
regulator
The VCC pin supplies the power to the internal circuitry. The VCC is the out-
put of a linear regulator which is powered from VIN. A 2 mF ceramic capacitor
is recommended for bypassing and should be placed as close as possible to
the VCC and GND pins. Do not connect to an external load.
6
8
9
ROT
DIM/EN
VIN
Initial Off−Time Setting
Resistor ROT from this pin to VCC sets the initial off−time range for the hys-
Resistor
teretic controller.
PWM Dimming Control and
ENABLE
Connect a logic−level PWM signal to this pin to enable/disable the power
MOSFET and LED array
Input Voltage Pin
Driver Output
Nominal operating input range is 6.3 V to 40 V. Input supply pin to the internal
circuitry and the positive input to the current sense comparators. Due to high
frequency noise, a 10 mF ceramic capacitor is recommended to be placed as
close as possible to VIN and power ground.
10
11
GATE
FLAG
Connect to the gate of the external MOSFET.
Thermal flag. There is no electrical connection to the IC. Connect to ground
plane.
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2
NCV30161
MAXIMUM RATINGS
Rating
Symbol
VIN
Min
−0.3
−0.3
−0.3
−0.3
−0.3
−0.3
Max
40
6.5
6
Unit
V
VIN to GND
Driver Output Voltage to GND
VCC to GND
GATE
VCC
DIM
CS
V
V
DIM/EN to GND
CS to GND
6
V
6
V
ROT to GND
ROT
T
6
V
Absolute Maximum junction temperature
Operating Junction Temperature Range
Storage Temperature Range
150
°C
°C
°C
(MAX)
J
TJ
−40
125
T
stg
−55 to +125
Thermal Characteristics
DFN10 3x3 Plastic Package
Maximum Power Dissipation @ T = 25°C (Note 1)
PD
1.46
86
W
°C/W
°C
A
Thermal Resistance Junction−to−Ambient (Note 2)
R
q
JA
Lead Temperature Soldering (10 sec):
Reflow (SMD styles only) Pb−Free (Note 3)
TL
260
Moisture Sensitivity Level (Note 4)
MSL
1
−
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. The maximum package power dissipation limit must not be exceeded.
T
J(max) * TA
PD
+
RqJA
2
2. When mounted on a multi−layer board with 35 mm copper area, using 1 oz Cu.
3. 60−180 seconds minimum above 237°C.
4. Moisture Sensitivity Level (MSL): 1 per IPC/JEDEC standard: J−STD−020A.
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3
NCV30161
ELECTRICAL CHARACTERISTICS (Unless otherwise noted: V = 12 V, T = −40°C to +125°C. Typical values at T = 25°C)
IN
A
A
Symbol
Characteristics
Min
Typ
Max
Unit
SYSTEM PARAMETERS
V
IN
Input Supply Voltage Range
Normal Operation
Functional (Note 5)
8.0
6.3
40
V
I
Quiescent Current into V
0.075
4.0
1.5
5.0
6.0
5.6
2.15
5.5
6.5
mA
V
Q_IN
IN
V
Internal Regulator Output (Note 6)
Under−Voltage Lock−out Threshold (V Rising)
CC
V
V
5.5
V
UV+
IN
Under−Voltage Lock−out Threshold (V Falling)
5.2
6.3
V
UV−
IN
CURRENT LIMIT AND REGULATION
V
CS Regulation Upper Limit
25°C
25°C
213
174
220
180
226
186
mV
mV
CS_UL
(CS Increasing, FET Turns−OFF)
V
CS Regulation Lower Limit
(CS Decreasing, FET Turns−ON)
CS_LL
VHYS
CS Hysteresis
40
mV
mV
kHz
pF
V
OCP
Over Current Protect Limit (Reference to CS Pin)
Switching Frequency Range (Note 7)
CS Pin Input Capacitance (Note 7)
CS Blanking Timer (Note 7)
406
500
594
2400
6.0
F
SW
C
4.0
50
5.0
73
in_CS
BLANKING
t
105
ns
DIM INPUT
V
PWM (DIM/EN) high level input voltage
PWM (DIM/EN) low level input voltage
DIM/EN Pull−up Resistor
1.36
V
V
PWMH/L
V
0.45
20
PWML
R
100
100
kW
kHz
%
DIM−PU
f
PWM (DIM/EN) dimming frequency range
Maximum Duty Cycle
pwm
d
max
MOSFET DRIVER
R
Sourcing Current
Sinking Current
3.0
0.2
9.0
0.4
12
W
W
GATE_Source
R
0.9
GATE_Sink
THERMAL SHUTDOWN
T
Thermal Shutdown (Note 7)
Thermal Hysteresis (Note 7)
160
30
165
40
180
60
°C
°C
SD
T
Hyst
OFF TIMER
t
Minimum Off−time
110
137
170
ns
OFF−MIN
5. The functional range of V is the voltage range over which the device will function. Output current and internal parameters may deviate from
IN
normal values for V and V voltages between 6.3 V and 8 V, depending on load conditions
IN
CC
6. V should not be driven from a voltage higher than V or in the absence of a voltage at V .
CC
IN
IN
7. Guaranteed by design.
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4
NCV30161
VIN
DIM / Enable
V
CC
V
CC
Enable Pull−Up
5 V Regulator
Resistor
Gate Driver
(6.3 V to 40 V
)
max
GATE
Q
Q
S
R
VCC
ROT
Peak Current
Comparator
220 mV
CS
Timer (t
&
Thermal
)
Valley Current
Comparator
off
Shutdown
180 mV
500 mV
Short Circuit Protection
Comparator
GND
Figure 2. Simplified Block Diagram
D1
VIN
C
IN
L1
LED
LED
VIN
GATE
CS
DIM/Enable
ROT
R
C
R
OT
SENSE
NCV30161
VCC
GND
VCC
Figure 3. Typical Application Circuit To Drive Multiple LEDs (Buck)
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5
NCV30161
Theory of Operation
circuit during startup. To protect against this, the NCV30161
comes with a short circuit protection feature. If the voltage
on the CS pin is detected to be greater than the over current
protection limit, the NCV30161 will turn off the FET, and
prevent the FET from turning on again until power is
recycled to the NCV30161.
The NCV30161 implements a TSD feature that protects
the part when the junction temperature exceeds 165 degrees.
There may be TSD events where the NCV30161 will turn
the FET off until power is recycled then Soft start is initiated
and regulation reestablished.
This switching power supply is comprised of an inverted
buck regulator controlled by a current mode, hysteretic
control circuit. The buck regulator operates exactly like a
conventional buck regulator except the power device
placement has been inverted to allow for a low side power
FET. Referring to Figure 1, when the FET is conducting,
current flows from the input, through the inductor, the LED
and the FET to ground.
When the FET shuts off, current continues to flow through
the inductor and LED, but is diverted through the diode
(D1). This operation keeps the current in the LED
continuous with a continuous current ramp.
Undervoltage Lockout
When VIN rises above the UVLO threshold voltage,
switching operation of the FET will begin. However, until
the VIN voltage reaches 8 V, the VCC regulator may not
provide the expected gate drive voltage to the FET. This
The control circuit controls the current hysteretically.
Figure 2 illustrates the operation of this circuit. The CS
comparator thresholds are set to provide a 10% current
ripple. The peak current comparator threshold of 220 mV
could result in the R
of the FET being higher than
DS(on)
sets I
at 10% above the average current while the valley
peak
expected or there not being enough gate drive capability to
operate at the maximum rated switching frequency. For
optimal performance, it is recommended to operate the part
at a VIN voltage of 8 V or greater.
current comparator threshold of 180 mV sets I
below the average current.
at 10%
valley
When the FET is conducting, the current in the inductor
ramps up. This current is sensed by the sense resistor that is
connected from CS to ground. When the voltage on the CS
pin reaches 220 mV, the peak current comparator turns off
the power FET. A conventional hysteretic controller would
monitor the load current and turn the switch back on when
the CS pin reaches 180 mV. But in this topology the current
information is not available to the control circuit when the
FET is off. To set the proper FET off time, the CS voltage is
sensed when the FET is turned back on and a correction
signal is sent to the off time circuit to adjust the off time as
necessary. When the FET is turned on, there can be a lot of
ringing on the CS pin that would make the voltage on the CS
pin be an unreliable measure of the current through the FET.
An 85 ns blanking timer is started when the GATE voltage
starts to go high, to allow this ringing to settle down. At the
end of this blanking timer, CS voltage is sensed to determine
the valley current.
Setting The Output Current
The average output current is determined as being the
middle of the peak and valley of the output current, set by the
CS comparator thresholds. The nominal average output
current will be the current value equivalent to 200 mV at the
CS pin. The proper R
value for a desired average
SENSE
output current can be calculated by:
200 mV
ILED
RSENSE
+
PWM Dimming
For a given R
value, the average output current, and
SENSE
therefore the brightness of the LED, can be set to a lower
value through the DIM/EN pin. When the DIM/EN pin is
brought low, the internal FET will turn off and switching
will remain off until the DIM/EN pin is brought back into its
high state.
By applying a pulsed signal to DIM/EN, the average
output current can be adjusted to the duty ratio of the pulsed
signal. It is recommended to keep the frequency of the
DIM/EN signal above 100 Hz to avoid any visible flickering
of the LED.
Figure 4. Typical Current Waveforms
The current wave shape is triangular, and the peak and
valley currents are controlled. The average value for a
triangular wave shape is halfway between the peak and
valley, so even with changes in duty cycle due to input
voltage variations or load changes, the average current will
remain constant.
Over Current Protection & TSD Features
In the event there is a short−circuit across the LEDs, a
large amount of current could potentially flow through the
Figure 5. ILED vs. FDIM
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6
NCV30161
Inductor Selection
t
OFF
I
+ I
OUT
The inductor that is used directly affects the switching
frequency the driver operates at. The value of the inductor
sets the slope at which the output current rises and falls
during the switching operation. The slope of the current, in
turn, determines how long it takes the current to go from the
valley point of the current ripple to the peak when the FET
is on and the current and rising, and how long it takes the
current to go from the peak point of the current to the valley
when the FET is off and the current is falling. These times
can be approximated from the following equations:
avg_diode
t
) t
ON
OFF
It is also important to select a diode that is capable of
withstanding the peak reverse voltage it will see in the
application. It is recommended to select a diode with a rated
reverse voltage greater than VIN. It is also recommended to
use a low−capacitance Schottky diode for better efficiency
performance.
Selecting The Off−Time Setting Resistor
The off−time setting resistor (R ) programs the
OT
t
NCV30161 with the initial time duration that the MOSFET
is turned off when the switching operation begins. During
subsequent switching cycles, the voltage at the CS pin is
sensed every time the MOSFET is turned on, and the
off−time will be adjusted depending on how much of a
discrepancy exists between the sensed value and the CS
ON
L DI
+
ǒFET
SENSEǓ
VIN * V
* I
(on) ) DCR ) R
L
LED
OFF
OUT
R
DS
L DI
t
+
V
) V
) I
DCR
OUT
L
lower limit threshold value. Selecting an appropriate R
LED
diode
OT
value allows the system to quickly achieve the intended
Where DCR is the dc resistance of the inductor, V
is the
is the
is the
L
LED
current regulation. The R value can be calculated using
OT
forward voltages of the LEDs, FET
RDS(ON)
the following equation:
on−resistance of the power MOSFET, and V
diode
11
forward voltage of the catch diode.
R
+ t
10
OFF
W
OT
The switching frequency can then be approximated from
the following:
Where t
is the expected off time during normal switching
OFF
operation, calculated in the Inductor Selection section
above. The ROT value can range from a minimum of 20 kW
to a maximum of 1 MW resistor.
1
f
+
SW
t
) t
OFF
ON
Higher values of inductance lead to slower rates of rise
and fall of the output current. This allows for smaller
discrepancies between the expected and actual output
current ripple due to propagation delays between sensing at
the CS pin and the turning on and off of the power MOSFET.
However, the inductor value should be chosen such that the
peak output current value does not exceed the rated
saturation current of the inductor.
Every time the DIM/EN pin is brought from a low state to
a high state, the initial off−time program is reset. The first
off−time of the MOSFET after the DIM/EN is brought high
will be set by the ROT value. The off−time will then be
adjusted in subsequent switching cycles.
Input Capacitor
A decoupling capacitor from VIN to ground should be
used to provide the current needed when the power
MOSFET turns on. A 10 mF ceramic capacitor is
recommended.
Catch Diode Selection
The catch diode needs to be selected such that the average
current through the diode does not exceed the rated average
forward current of the diode. The average current through
the diode can be calculated as:
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7
NCV30161
Dimming Event
Figure 6. 12 Vin, 3.3 mH, 2 LEDs, 200 mW Rsense, 1 Khz FDIM
Purple: LED Current, Yellow: CS Pin, Green: DIM Pin
100% Duty Cycle Event at 1 A LED Current
Figure 7. 12 Vin, 3.3 mH, 200 mW Rsense , 2 LEDs VF ~ 3.5 V
Purple: LED Current, Yellow: CS Pin
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8
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
DFNW10, 3x3, 0.5P
CASE 507AE
ISSUE A
1
DATE 15 JUN 2018
SCALE 2:1
NOTES:
A
B
L3
L3
D
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.15 AND
0.30mm FROM THE TERMINAL TIP.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
5. THIS DEVICE CONTAINS WETTABLE FLANK
DESIGN FEATURE TO AID IN FILLET FORMA-
TION ON THE LEADS DURING MOUNTING.
L
L
ALTERNATE
CONSTRUCTION
DETAIL A
E
PIN ONE
REFERENCE
EXPOSED
COPPER
MILLIMETERS
A4
A1
DIM MIN
NOM
0.90
−−−
MAX
1.00
0.05
A
A1
A3
A4
b
0.80
−−−
0.20 REF
−−−
0.25
PLATING
A1
A4
TOP VIEW
ALTERNATE
CONSTRUCTION
0.10
0.20
−−−
0.30
A
DETAIL B
b2
D
D2
E
E2
e
K
0.25 REF
3.00
2.40
3.00
1.65
0.50 BSC
0.28 REF
0.40
DETAIL B
0.05
0.05
C
C
2.90
2.30
2.90
1.55
3.10
2.50
3.10
1.75
A4
A3
C
C
L3
PLATED
SURFACES
SEATING
PLANE
NOTE 4
L
L3
0.30
0.50
C
L
SIDE VIEW
D2
0.05 REF
SECTION C−C
DETAIL A
GENERIC
10X
MARKING DIAGRAM*
5
1
1
XXXXX
XXXXX
ALYWG
G
E2
e
XXXXX = Specific Device Code
4X b2
A
L
Y
W
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
10
6
10X b
e
0.10
0.05
C
C
A B
NOTE 3
BOTTOM VIEW
(Note: Microdot may be in either location)
RECOMMENDED
SOLDERING FOOTPRINT*
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present. Some products
may not follow the Generic Marking.
3.30
2.50
10X
0.58
PACKAGE
OUTLINE
0.50
PITCH
1.75 3.30
4X
0.28
1
10X
0.30
0.50
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON17793G
DFNW10 3x3, 0.5P
PAGE 1 OF 1
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